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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Macros | |
| #define | AT91_MATRIX_MCFG 0x00 /* Master Configuration Register */ |
| #define | AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ |
| #define | AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ |
| #define | AT91_MATRIX_SCFG0 0x04 /* Slave Configuration Register 0 */ |
| #define | AT91_MATRIX_SCFG1 0x08 /* Slave Configuration Register 1 */ |
| #define | AT91_MATRIX_SCFG2 0x0C /* Slave Configuration Register 2 */ |
| #define | AT91_MATRIX_SCFG3 0x10 /* Slave Configuration Register 3 */ |
| #define | AT91_MATRIX_SCFG4 0x14 /* Slave Configuration Register 4 */ |
| #define | AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ |
| #define | AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ |
| #define | AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) |
| #define | AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) |
| #define | AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) |
| #define | AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ |
| #define | AT91_MATRIX_TCR 0x24 /* TCM Configuration Register */ |
| #define | AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ |
| #define | AT91_MATRIX_ITCM_0 (0 << 0) |
| #define | AT91_MATRIX_ITCM_16 (5 << 0) |
| #define | AT91_MATRIX_ITCM_32 (6 << 0) |
| #define | AT91_MATRIX_ITCM_64 (7 << 0) |
| #define | AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ |
| #define | AT91_MATRIX_DTCM_0 (0 << 4) |
| #define | AT91_MATRIX_DTCM_16 (5 << 4) |
| #define | AT91_MATRIX_DTCM_32 (6 << 4) |
| #define | AT91_MATRIX_DTCM_64 (7 << 4) |
| #define | AT91_MATRIX_EBICSA 0x30 /* EBI Chip Select Assignment Register */ |
| #define | AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ |
| #define | AT91_MATRIX_CS1A_SMC (0 << 1) |
| #define | AT91_MATRIX_CS1A_SDRAMC (1 << 1) |
| #define | AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ |
| #define | AT91_MATRIX_CS3A_SMC (0 << 3) |
| #define | AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) |
| #define | AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ |
| #define | AT91_MATRIX_CS4A_SMC (0 << 4) |
| #define | AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) |
| #define | AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ |
| #define | AT91_MATRIX_CS5A_SMC (0 << 5) |
| #define | AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) |
| #define | AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ |
| #define | AT91_MATRIX_USBPUCR 0x34 /* USB Pad Pull-Up Control Register */ |
| #define | AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */ |
| #define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ |
Definition at line 47 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_CS1A_SDRAMC (1 << 1) |
Definition at line 49 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_CS1A_SMC (0 << 1) |
Definition at line 48 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ |
Definition at line 50 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_CS3A_SMC (0 << 3) |
Definition at line 51 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) |
Definition at line 52 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ |
Definition at line 53 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_CS4A_SMC (0 << 4) |
Definition at line 54 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) |
Definition at line 55 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ |
Definition at line 56 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_CS5A_SMC (0 << 5) |
Definition at line 57 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) |
Definition at line 58 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ |
Definition at line 59 of file at91sam9261_matrix.h.
Definition at line 28 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) |
Definition at line 31 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) |
Definition at line 30 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) |
Definition at line 29 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_DTCM_0 (0 << 4) |
Definition at line 41 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_DTCM_16 (5 << 4) |
Definition at line 42 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_DTCM_32 (6 << 4) |
Definition at line 43 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_DTCM_64 (7 << 4) |
Definition at line 44 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ |
Definition at line 40 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_EBICSA 0x30 /* EBI Chip Select Assignment Register */ |
Definition at line 46 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */ |
Definition at line 32 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_ITCM_0 (0 << 0) |
Definition at line 36 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_ITCM_16 (5 << 0) |
Definition at line 37 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_ITCM_32 (6 << 0) |
Definition at line 38 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_ITCM_64 (7 << 0) |
Definition at line 39 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ |
Definition at line 35 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_MCFG 0x00 /* Master Configuration Register */ |
Definition at line 18 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ |
Definition at line 19 of file at91sam9261_matrix.h.
Definition at line 20 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_SCFG0 0x04 /* Slave Configuration Register 0 */ |
Definition at line 22 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_SCFG1 0x08 /* Slave Configuration Register 1 */ |
Definition at line 23 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_SCFG2 0x0C /* Slave Configuration Register 2 */ |
Definition at line 24 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_SCFG3 0x10 /* Slave Configuration Register 3 */ |
Definition at line 25 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_SCFG4 0x14 /* Slave Configuration Register 4 */ |
Definition at line 26 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ |
Definition at line 27 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_TCR 0x24 /* TCM Configuration Register */ |
Definition at line 34 of file at91sam9261_matrix.h.
| #define AT91_MATRIX_USBPUCR 0x34 /* USB Pad Pull-Up Control Register */ |
Definition at line 61 of file at91sam9261_matrix.h.
1.8.2