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Macros
at91sam9x5.h File Reference

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Macros

#define AT91SAM9X5_ID_PIOAB   2 /* Parallel I/O Controller A and B */
 
#define AT91SAM9X5_ID_PIOCD   3 /* Parallel I/O Controller C and D */
 
#define AT91SAM9X5_ID_SMD   4 /* SMD Soft Modem (SMD) */
 
#define AT91SAM9X5_ID_USART0   5 /* USART 0 */
 
#define AT91SAM9X5_ID_USART1   6 /* USART 1 */
 
#define AT91SAM9X5_ID_USART2   7 /* USART 2 */
 
#define AT91SAM9X5_ID_USART3   8 /* USART 3 */
 
#define AT91SAM9X5_ID_TWI0   9 /* Two-Wire Interface 0 */
 
#define AT91SAM9X5_ID_TWI1   10 /* Two-Wire Interface 1 */
 
#define AT91SAM9X5_ID_TWI2   11 /* Two-Wire Interface 2 */
 
#define AT91SAM9X5_ID_MCI0   12 /* High Speed Multimedia Card Interface 0 */
 
#define AT91SAM9X5_ID_SPI0   13 /* Serial Peripheral Interface 0 */
 
#define AT91SAM9X5_ID_SPI1   14 /* Serial Peripheral Interface 1 */
 
#define AT91SAM9X5_ID_UART0   15 /* UART 0 */
 
#define AT91SAM9X5_ID_UART1   16 /* UART 1 */
 
#define AT91SAM9X5_ID_TCB   17 /* Timer Counter 0, 1, 2, 3, 4 and 5 */
 
#define AT91SAM9X5_ID_PWM   18 /* Pulse Width Modulation Controller */
 
#define AT91SAM9X5_ID_ADC   19 /* ADC Controller */
 
#define AT91SAM9X5_ID_DMA0   20 /* DMA Controller 0 */
 
#define AT91SAM9X5_ID_DMA1   21 /* DMA Controller 1 */
 
#define AT91SAM9X5_ID_UHPHS   22 /* USB Host High Speed */
 
#define AT91SAM9X5_ID_UDPHS   23 /* USB Device High Speed */
 
#define AT91SAM9X5_ID_EMAC0   24 /* Ethernet MAC0 */
 
#define AT91SAM9X5_ID_LCDC   25 /* LCD Controller */
 
#define AT91SAM9X5_ID_ISI   25 /* Image Sensor Interface */
 
#define AT91SAM9X5_ID_MCI1   26 /* High Speed Multimedia Card Interface 1 */
 
#define AT91SAM9X5_ID_EMAC1   27 /* Ethernet MAC1 */
 
#define AT91SAM9X5_ID_SSC   28 /* Synchronous Serial Controller */
 
#define AT91SAM9X5_ID_CAN0   29 /* CAN Controller 0 */
 
#define AT91SAM9X5_ID_CAN1   30 /* CAN Controller 1 */
 
#define AT91SAM9X5_ID_IRQ0   31 /* Advanced Interrupt Controller */
 
#define AT91SAM9X5_BASE_USART0   0xf801c000
 
#define AT91SAM9X5_BASE_USART1   0xf8020000
 
#define AT91SAM9X5_BASE_USART2   0xf8024000
 
#define AT91SAM9X5_SRAM_BASE   0x00300000 /* Internal SRAM base address */
 
#define AT91SAM9X5_SRAM_SIZE   SZ_32K /* Internal SRAM size (32Kb) */
 
#define AT91SAM9X5_ROM_BASE   0x00400000 /* Internal ROM base address */
 
#define AT91SAM9X5_ROM_SIZE   SZ_64K /* Internal ROM size (64Kb) */
 

Macro Definition Documentation

#define AT91SAM9X5_BASE_USART0   0xf801c000

Definition at line 53 of file at91sam9x5.h.

#define AT91SAM9X5_BASE_USART1   0xf8020000

Definition at line 54 of file at91sam9x5.h.

#define AT91SAM9X5_BASE_USART2   0xf8024000

Definition at line 55 of file at91sam9x5.h.

#define AT91SAM9X5_ID_ADC   19 /* ADC Controller */

Definition at line 35 of file at91sam9x5.h.

#define AT91SAM9X5_ID_CAN0   29 /* CAN Controller 0 */

Definition at line 46 of file at91sam9x5.h.

#define AT91SAM9X5_ID_CAN1   30 /* CAN Controller 1 */

Definition at line 47 of file at91sam9x5.h.

#define AT91SAM9X5_ID_DMA0   20 /* DMA Controller 0 */

Definition at line 36 of file at91sam9x5.h.

#define AT91SAM9X5_ID_DMA1   21 /* DMA Controller 1 */

Definition at line 37 of file at91sam9x5.h.

#define AT91SAM9X5_ID_EMAC0   24 /* Ethernet MAC0 */

Definition at line 40 of file at91sam9x5.h.

#define AT91SAM9X5_ID_EMAC1   27 /* Ethernet MAC1 */

Definition at line 44 of file at91sam9x5.h.

#define AT91SAM9X5_ID_IRQ0   31 /* Advanced Interrupt Controller */

Definition at line 48 of file at91sam9x5.h.

#define AT91SAM9X5_ID_ISI   25 /* Image Sensor Interface */

Definition at line 42 of file at91sam9x5.h.

#define AT91SAM9X5_ID_LCDC   25 /* LCD Controller */

Definition at line 41 of file at91sam9x5.h.

#define AT91SAM9X5_ID_MCI0   12 /* High Speed Multimedia Card Interface 0 */

Definition at line 28 of file at91sam9x5.h.

#define AT91SAM9X5_ID_MCI1   26 /* High Speed Multimedia Card Interface 1 */

Definition at line 43 of file at91sam9x5.h.

#define AT91SAM9X5_ID_PIOAB   2 /* Parallel I/O Controller A and B */

Definition at line 18 of file at91sam9x5.h.

#define AT91SAM9X5_ID_PIOCD   3 /* Parallel I/O Controller C and D */

Definition at line 19 of file at91sam9x5.h.

#define AT91SAM9X5_ID_PWM   18 /* Pulse Width Modulation Controller */

Definition at line 34 of file at91sam9x5.h.

#define AT91SAM9X5_ID_SMD   4 /* SMD Soft Modem (SMD) */

Definition at line 20 of file at91sam9x5.h.

#define AT91SAM9X5_ID_SPI0   13 /* Serial Peripheral Interface 0 */

Definition at line 29 of file at91sam9x5.h.

#define AT91SAM9X5_ID_SPI1   14 /* Serial Peripheral Interface 1 */

Definition at line 30 of file at91sam9x5.h.

#define AT91SAM9X5_ID_SSC   28 /* Synchronous Serial Controller */

Definition at line 45 of file at91sam9x5.h.

#define AT91SAM9X5_ID_TCB   17 /* Timer Counter 0, 1, 2, 3, 4 and 5 */

Definition at line 33 of file at91sam9x5.h.

#define AT91SAM9X5_ID_TWI0   9 /* Two-Wire Interface 0 */

Definition at line 25 of file at91sam9x5.h.

#define AT91SAM9X5_ID_TWI1   10 /* Two-Wire Interface 1 */

Definition at line 26 of file at91sam9x5.h.

#define AT91SAM9X5_ID_TWI2   11 /* Two-Wire Interface 2 */

Definition at line 27 of file at91sam9x5.h.

#define AT91SAM9X5_ID_UART0   15 /* UART 0 */

Definition at line 31 of file at91sam9x5.h.

#define AT91SAM9X5_ID_UART1   16 /* UART 1 */

Definition at line 32 of file at91sam9x5.h.

#define AT91SAM9X5_ID_UDPHS   23 /* USB Device High Speed */

Definition at line 39 of file at91sam9x5.h.

#define AT91SAM9X5_ID_UHPHS   22 /* USB Host High Speed */

Definition at line 38 of file at91sam9x5.h.

#define AT91SAM9X5_ID_USART0   5 /* USART 0 */

Definition at line 21 of file at91sam9x5.h.

#define AT91SAM9X5_ID_USART1   6 /* USART 1 */

Definition at line 22 of file at91sam9x5.h.

#define AT91SAM9X5_ID_USART2   7 /* USART 2 */

Definition at line 23 of file at91sam9x5.h.

#define AT91SAM9X5_ID_USART3   8 /* USART 3 */

Definition at line 24 of file at91sam9x5.h.

#define AT91SAM9X5_ROM_BASE   0x00400000 /* Internal ROM base address */

Definition at line 63 of file at91sam9x5.h.

#define AT91SAM9X5_ROM_SIZE   SZ_64K /* Internal ROM size (64Kb) */

Definition at line 64 of file at91sam9x5.h.

#define AT91SAM9X5_SRAM_BASE   0x00300000 /* Internal SRAM base address */

Definition at line 60 of file at91sam9x5.h.

#define AT91SAM9X5_SRAM_SIZE   SZ_32K /* Internal SRAM size (32Kb) */

Definition at line 61 of file at91sam9x5.h.