au1xxx_ide.h File Reference

Go to the source code of this file.

Data Structures
struct	_auide_hwif

Macros
#define	NUM_DESCRIPTORS   2
#define	AU1XXX_ATA_RQSIZE   128
#define	CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON   0
#define	TCSOE_MASK   (0x07 << 29)
#define	TOECS_MASK   (0x07 << 26)
#define	TWCS_MASK   (0x07 << 28)
#define	TCSH_MASK   (0x0F << 24)
#define	TCSOFF_MASK   (0x07 << 20)
#define	TWP_MASK   (0x3F << 14)
#define	TCSW_MASK   (0x0F << 10)
#define	TPM_MASK   (0x0F << 6)
#define	TA_MASK   (0x3F << 0)
#define	TS_MASK   (1 << 8)
#define	SBC_IDE_PIO0_TCSOE   (0x04 << 29)
#define	SBC_IDE_PIO0_TOECS   (0x01 << 26)
#define	SBC_IDE_PIO0_TWCS   (0x02 << 28)
#define	SBC_IDE_PIO0_TCSH   (0x08 << 24)
#define	SBC_IDE_PIO0_TCSOFF   (0x07 << 20)
#define	SBC_IDE_PIO0_TWP   (0x10 << 14)
#define	SBC_IDE_PIO0_TCSW   (0x04 << 10)
#define	SBC_IDE_PIO0_TPM   (0x00 << 6)
#define	SBC_IDE_PIO0_TA   (0x15 << 0)
#define	SBC_IDE_PIO1_TCSOE   (0x03 << 29)
#define	SBC_IDE_PIO1_TOECS   (0x01 << 26)
#define	SBC_IDE_PIO1_TWCS   (0x01 << 28)
#define	SBC_IDE_PIO1_TCSH   (0x06 << 24)
#define	SBC_IDE_PIO1_TCSOFF   (0x06 << 20)
#define	SBC_IDE_PIO1_TWP   (0x08 << 14)
#define	SBC_IDE_PIO1_TCSW   (0x03 << 10)
#define	SBC_IDE_PIO1_TPM   (0x00 << 6)
#define	SBC_IDE_PIO1_TA   (0x0B << 0)
#define	SBC_IDE_PIO2_TCSOE   (0x05 << 29)
#define	SBC_IDE_PIO2_TOECS   (0x01 << 26)
#define	SBC_IDE_PIO2_TWCS   (0x01 << 28)
#define	SBC_IDE_PIO2_TCSH   (0x07 << 24)
#define	SBC_IDE_PIO2_TCSOFF   (0x07 << 20)
#define	SBC_IDE_PIO2_TWP   (0x1F << 14)
#define	SBC_IDE_PIO2_TCSW   (0x05 << 10)
#define	SBC_IDE_PIO2_TPM   (0x00 << 6)
#define	SBC_IDE_PIO2_TA   (0x22 << 0)
#define	SBC_IDE_PIO3_TCSOE   (0x05 << 29)
#define	SBC_IDE_PIO3_TOECS   (0x01 << 26)
#define	SBC_IDE_PIO3_TWCS   (0x01 << 28)
#define	SBC_IDE_PIO3_TCSH   (0x0D << 24)
#define	SBC_IDE_PIO3_TCSOFF   (0x0D << 20)
#define	SBC_IDE_PIO3_TWP   (0x15 << 14)
#define	SBC_IDE_PIO3_TCSW   (0x05 << 10)
#define	SBC_IDE_PIO3_TPM   (0x00 << 6)
#define	SBC_IDE_PIO3_TA   (0x1A << 0)
#define	SBC_IDE_PIO4_TCSOE   (0x04 << 29)
#define	SBC_IDE_PIO4_TOECS   (0x01 << 26)
#define	SBC_IDE_PIO4_TWCS   (0x01 << 28)
#define	SBC_IDE_PIO4_TCSH   (0x04 << 24)
#define	SBC_IDE_PIO4_TCSOFF   (0x04 << 20)
#define	SBC_IDE_PIO4_TWP   (0x0D << 14)
#define	SBC_IDE_PIO4_TCSW   (0x03 << 10)
#define	SBC_IDE_PIO4_TPM   (0x00 << 6)
#define	SBC_IDE_PIO4_TA   (0x12 << 0)
#define	SBC_IDE_MDMA0_TCSOE   (0x03 << 29)
#define	SBC_IDE_MDMA0_TOECS   (0x01 << 26)
#define	SBC_IDE_MDMA0_TWCS   (0x01 << 28)
#define	SBC_IDE_MDMA0_TCSH   (0x07 << 24)
#define	SBC_IDE_MDMA0_TCSOFF   (0x07 << 20)
#define	SBC_IDE_MDMA0_TWP   (0x0C << 14)
#define	SBC_IDE_MDMA0_TCSW   (0x03 << 10)
#define	SBC_IDE_MDMA0_TPM   (0x00 << 6)
#define	SBC_IDE_MDMA0_TA   (0x0F << 0)
#define	SBC_IDE_MDMA1_TCSOE   (0x05 << 29)
#define	SBC_IDE_MDMA1_TOECS   (0x01 << 26)
#define	SBC_IDE_MDMA1_TWCS   (0x01 << 28)
#define	SBC_IDE_MDMA1_TCSH   (0x05 << 24)
#define	SBC_IDE_MDMA1_TCSOFF   (0x05 << 20)
#define	SBC_IDE_MDMA1_TWP   (0x0F << 14)
#define	SBC_IDE_MDMA1_TCSW   (0x05 << 10)
#define	SBC_IDE_MDMA1_TPM   (0x00 << 6)
#define	SBC_IDE_MDMA1_TA   (0x15 << 0)
#define	SBC_IDE_MDMA2_TCSOE   (0x04 << 29)
#define	SBC_IDE_MDMA2_TOECS   (0x01 << 26)
#define	SBC_IDE_MDMA2_TWCS   (0x01 << 28)
#define	SBC_IDE_MDMA2_TCSH   (0x04 << 24)
#define	SBC_IDE_MDMA2_TCSOFF   (0x04 << 20)
#define	SBC_IDE_MDMA2_TWP   (0x0D << 14)
#define	SBC_IDE_MDMA2_TCSW   (0x04 << 10)
#define	SBC_IDE_MDMA2_TPM   (0x00 << 6)
#define	SBC_IDE_MDMA2_TA   (0x12 << 0)
#define	SBC_IDE_TIMING(mode)

Macro Definition Documentation

#define AU1XXX_ATA_RQSIZE   128

Definition at line 41 of file au1xxx_ide.h.

#define CONFIG_BLK_DEV_IDE_AU1XXX_BURSTABLE_ON   0

Definition at line 46 of file au1xxx_ide.h.

#define NUM_DESCRIPTORS   2

Definition at line 37 of file au1xxx_ide.h.

#define SBC_IDE_MDMA0_TA   (0x0F << 0)

Definition at line 149 of file au1xxx_ide.h.

#define SBC_IDE_MDMA0_TCSH   (0x07 << 24)

Definition at line 144 of file au1xxx_ide.h.

#define SBC_IDE_MDMA0_TCSOE   (0x03 << 29)

Definition at line 141 of file au1xxx_ide.h.

#define SBC_IDE_MDMA0_TCSOFF   (0x07 << 20)

Definition at line 145 of file au1xxx_ide.h.

#define SBC_IDE_MDMA0_TCSW   (0x03 << 10)

Definition at line 147 of file au1xxx_ide.h.

#define SBC_IDE_MDMA0_TOECS   (0x01 << 26)

Definition at line 142 of file au1xxx_ide.h.

#define SBC_IDE_MDMA0_TPM   (0x00 << 6)

Definition at line 148 of file au1xxx_ide.h.

#define SBC_IDE_MDMA0_TWCS   (0x01 << 28)

Definition at line 143 of file au1xxx_ide.h.

#define SBC_IDE_MDMA0_TWP   (0x0C << 14)

Definition at line 146 of file au1xxx_ide.h.

#define SBC_IDE_MDMA1_TA   (0x15 << 0)

Definition at line 159 of file au1xxx_ide.h.

#define SBC_IDE_MDMA1_TCSH   (0x05 << 24)

Definition at line 154 of file au1xxx_ide.h.

#define SBC_IDE_MDMA1_TCSOE   (0x05 << 29)

Definition at line 151 of file au1xxx_ide.h.

#define SBC_IDE_MDMA1_TCSOFF   (0x05 << 20)

Definition at line 155 of file au1xxx_ide.h.

#define SBC_IDE_MDMA1_TCSW   (0x05 << 10)

Definition at line 157 of file au1xxx_ide.h.

#define SBC_IDE_MDMA1_TOECS   (0x01 << 26)

Definition at line 152 of file au1xxx_ide.h.

#define SBC_IDE_MDMA1_TPM   (0x00 << 6)

Definition at line 158 of file au1xxx_ide.h.

#define SBC_IDE_MDMA1_TWCS   (0x01 << 28)

Definition at line 153 of file au1xxx_ide.h.

#define SBC_IDE_MDMA1_TWP   (0x0F << 14)

Definition at line 156 of file au1xxx_ide.h.

#define SBC_IDE_MDMA2_TA   (0x12 << 0)

Definition at line 169 of file au1xxx_ide.h.

#define SBC_IDE_MDMA2_TCSH   (0x04 << 24)

Definition at line 164 of file au1xxx_ide.h.

#define SBC_IDE_MDMA2_TCSOE   (0x04 << 29)

Definition at line 161 of file au1xxx_ide.h.

#define SBC_IDE_MDMA2_TCSOFF   (0x04 << 20)

Definition at line 165 of file au1xxx_ide.h.

#define SBC_IDE_MDMA2_TCSW   (0x04 << 10)

Definition at line 167 of file au1xxx_ide.h.

#define SBC_IDE_MDMA2_TOECS   (0x01 << 26)

Definition at line 162 of file au1xxx_ide.h.

#define SBC_IDE_MDMA2_TPM   (0x00 << 6)

Definition at line 168 of file au1xxx_ide.h.

#define SBC_IDE_MDMA2_TWCS   (0x01 << 28)

Definition at line 163 of file au1xxx_ide.h.

#define SBC_IDE_MDMA2_TWP   (0x0D << 14)

Definition at line 166 of file au1xxx_ide.h.

#define SBC_IDE_PIO0_TA   (0x15 << 0)

Definition at line 99 of file au1xxx_ide.h.

#define SBC_IDE_PIO0_TCSH   (0x08 << 24)

Definition at line 94 of file au1xxx_ide.h.

#define SBC_IDE_PIO0_TCSOE   (0x04 << 29)

Definition at line 91 of file au1xxx_ide.h.

#define SBC_IDE_PIO0_TCSOFF   (0x07 << 20)

Definition at line 95 of file au1xxx_ide.h.

#define SBC_IDE_PIO0_TCSW   (0x04 << 10)

Definition at line 97 of file au1xxx_ide.h.

#define SBC_IDE_PIO0_TOECS   (0x01 << 26)

Definition at line 92 of file au1xxx_ide.h.

#define SBC_IDE_PIO0_TPM   (0x00 << 6)

Definition at line 98 of file au1xxx_ide.h.

#define SBC_IDE_PIO0_TWCS   (0x02 << 28)

Definition at line 93 of file au1xxx_ide.h.

#define SBC_IDE_PIO0_TWP   (0x10 << 14)

Definition at line 96 of file au1xxx_ide.h.

#define SBC_IDE_PIO1_TA   (0x0B << 0)

Definition at line 109 of file au1xxx_ide.h.

#define SBC_IDE_PIO1_TCSH   (0x06 << 24)

Definition at line 104 of file au1xxx_ide.h.

#define SBC_IDE_PIO1_TCSOE   (0x03 << 29)

Definition at line 101 of file au1xxx_ide.h.

#define SBC_IDE_PIO1_TCSOFF   (0x06 << 20)

Definition at line 105 of file au1xxx_ide.h.

#define SBC_IDE_PIO1_TCSW   (0x03 << 10)

Definition at line 107 of file au1xxx_ide.h.

#define SBC_IDE_PIO1_TOECS   (0x01 << 26)

Definition at line 102 of file au1xxx_ide.h.

#define SBC_IDE_PIO1_TPM   (0x00 << 6)

Definition at line 108 of file au1xxx_ide.h.

#define SBC_IDE_PIO1_TWCS   (0x01 << 28)

Definition at line 103 of file au1xxx_ide.h.

#define SBC_IDE_PIO1_TWP   (0x08 << 14)

Definition at line 106 of file au1xxx_ide.h.

#define SBC_IDE_PIO2_TA   (0x22 << 0)

Definition at line 119 of file au1xxx_ide.h.

#define SBC_IDE_PIO2_TCSH   (0x07 << 24)

Definition at line 114 of file au1xxx_ide.h.

#define SBC_IDE_PIO2_TCSOE   (0x05 << 29)

Definition at line 111 of file au1xxx_ide.h.

#define SBC_IDE_PIO2_TCSOFF   (0x07 << 20)

Definition at line 115 of file au1xxx_ide.h.

#define SBC_IDE_PIO2_TCSW   (0x05 << 10)

Definition at line 117 of file au1xxx_ide.h.

#define SBC_IDE_PIO2_TOECS   (0x01 << 26)

Definition at line 112 of file au1xxx_ide.h.

#define SBC_IDE_PIO2_TPM   (0x00 << 6)

Definition at line 118 of file au1xxx_ide.h.

#define SBC_IDE_PIO2_TWCS   (0x01 << 28)

Definition at line 113 of file au1xxx_ide.h.

#define SBC_IDE_PIO2_TWP   (0x1F << 14)

Definition at line 116 of file au1xxx_ide.h.

#define SBC_IDE_PIO3_TA   (0x1A << 0)

Definition at line 129 of file au1xxx_ide.h.

#define SBC_IDE_PIO3_TCSH   (0x0D << 24)

Definition at line 124 of file au1xxx_ide.h.

#define SBC_IDE_PIO3_TCSOE   (0x05 << 29)

Definition at line 121 of file au1xxx_ide.h.

#define SBC_IDE_PIO3_TCSOFF   (0x0D << 20)

Definition at line 125 of file au1xxx_ide.h.

#define SBC_IDE_PIO3_TCSW   (0x05 << 10)

Definition at line 127 of file au1xxx_ide.h.

#define SBC_IDE_PIO3_TOECS   (0x01 << 26)

Definition at line 122 of file au1xxx_ide.h.

#define SBC_IDE_PIO3_TPM   (0x00 << 6)

Definition at line 128 of file au1xxx_ide.h.

#define SBC_IDE_PIO3_TWCS   (0x01 << 28)

Definition at line 123 of file au1xxx_ide.h.

#define SBC_IDE_PIO3_TWP   (0x15 << 14)

Definition at line 126 of file au1xxx_ide.h.

#define SBC_IDE_PIO4_TA   (0x12 << 0)

Definition at line 139 of file au1xxx_ide.h.

#define SBC_IDE_PIO4_TCSH   (0x04 << 24)

Definition at line 134 of file au1xxx_ide.h.

#define SBC_IDE_PIO4_TCSOE   (0x04 << 29)

Definition at line 131 of file au1xxx_ide.h.

#define SBC_IDE_PIO4_TCSOFF   (0x04 << 20)

Definition at line 135 of file au1xxx_ide.h.

#define SBC_IDE_PIO4_TCSW   (0x03 << 10)

Definition at line 137 of file au1xxx_ide.h.

#define SBC_IDE_PIO4_TOECS   (0x01 << 26)

Definition at line 132 of file au1xxx_ide.h.

#define SBC_IDE_PIO4_TPM   (0x00 << 6)

Definition at line 138 of file au1xxx_ide.h.

#define SBC_IDE_PIO4_TWCS   (0x01 << 28)

Definition at line 133 of file au1xxx_ide.h.

#define SBC_IDE_PIO4_TWP   (0x0D << 14)

Definition at line 136 of file au1xxx_ide.h.

#define SBC_IDE_TIMING

(

mode

)

Value:

(SBC_IDE_##mode##_TWCS | \
     SBC_IDE_##mode##_TCSH | \
     SBC_IDE_##mode##_TCSOFF | \
     SBC_IDE_##mode##_TWP | \
     SBC_IDE_##mode##_TCSW | \
     SBC_IDE_##mode##_TPM | \
     SBC_IDE_##mode##_TA)

Definition at line 171 of file au1xxx_ide.h.

#define TA_MASK   (0x3F << 0)

Definition at line 87 of file au1xxx_ide.h.

#define TCSH_MASK   (0x0F << 24)

Definition at line 82 of file au1xxx_ide.h.

#define TCSOE_MASK   (0x07 << 29)

Definition at line 79 of file au1xxx_ide.h.

#define TCSOFF_MASK   (0x07 << 20)

Definition at line 83 of file au1xxx_ide.h.

#define TCSW_MASK   (0x0F << 10)

Definition at line 85 of file au1xxx_ide.h.

#define TOECS_MASK   (0x07 << 26)

Definition at line 80 of file au1xxx_ide.h.

#define TPM_MASK   (0x0F << 6)

Definition at line 86 of file au1xxx_ide.h.

#define TS_MASK   (1 << 8)

Definition at line 88 of file au1xxx_ide.h.

#define TWCS_MASK   (0x07 << 28)

Definition at line 81 of file au1xxx_ide.h.

#define TWP_MASK   (0x3F << 14)

Definition at line 84 of file au1xxx_ide.h.