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10 #ifndef BNX2X_FW_DEFS_H
11 #define BNX2X_FW_DEFS_H
13 #define CSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[148].base)
14 #define CSTORM_ASSERT_LIST_OFFSET(assertListEntry) \
15 (IRO[147].base + ((assertListEntry) * IRO[147].m1))
16 #define CSTORM_EVENT_RING_DATA_OFFSET(pfId) \
17 (IRO[153].base + (((pfId)>>1) * IRO[153].m1) + (((pfId)&1) * \
19 #define CSTORM_EVENT_RING_PROD_OFFSET(pfId) \
20 (IRO[154].base + (((pfId)>>1) * IRO[154].m1) + (((pfId)&1) * \
22 #define CSTORM_FINAL_CLEANUP_COMPLETE_OFFSET(funcId) \
23 (IRO[159].base + ((funcId) * IRO[159].m1))
24 #define CSTORM_FUNC_EN_OFFSET(funcId) \
25 (IRO[149].base + ((funcId) * IRO[149].m1))
26 #define CSTORM_IGU_MODE_OFFSET (IRO[157].base)
27 #define CSTORM_ISCSI_CQ_SIZE_OFFSET(pfId) \
28 (IRO[316].base + ((pfId) * IRO[316].m1))
29 #define CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \
30 (IRO[317].base + ((pfId) * IRO[317].m1))
31 #define CSTORM_ISCSI_EQ_CONS_OFFSET(pfId, iscsiEqId) \
32 (IRO[309].base + ((pfId) * IRO[309].m1) + ((iscsiEqId) * IRO[309].m2))
33 #define CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfId, iscsiEqId) \
34 (IRO[311].base + ((pfId) * IRO[311].m1) + ((iscsiEqId) * IRO[311].m2))
35 #define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfId, iscsiEqId) \
36 (IRO[310].base + ((pfId) * IRO[310].m1) + ((iscsiEqId) * IRO[310].m2))
37 #define CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfId, iscsiEqId) \
38 (IRO[312].base + ((pfId) * IRO[312].m1) + ((iscsiEqId) * IRO[312].m2))
39 #define CSTORM_ISCSI_EQ_PROD_OFFSET(pfId, iscsiEqId) \
40 (IRO[308].base + ((pfId) * IRO[308].m1) + ((iscsiEqId) * IRO[308].m2))
41 #define CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfId, iscsiEqId) \
42 (IRO[314].base + ((pfId) * IRO[314].m1) + ((iscsiEqId) * IRO[314].m2))
43 #define CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfId, iscsiEqId) \
44 (IRO[313].base + ((pfId) * IRO[313].m1) + ((iscsiEqId) * IRO[313].m2))
45 #define CSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) \
46 (IRO[315].base + ((pfId) * IRO[315].m1))
47 #define CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \
48 (IRO[307].base + ((pfId) * IRO[307].m1))
49 #define CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \
50 (IRO[306].base + ((pfId) * IRO[306].m1))
51 #define CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \
52 (IRO[305].base + ((pfId) * IRO[305].m1))
53 #define CSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \
54 (IRO[151].base + ((funcId) * IRO[151].m1))
55 #define CSTORM_SP_STATUS_BLOCK_DATA_OFFSET(pfId) \
56 (IRO[142].base + ((pfId) * IRO[142].m1))
57 #define CSTORM_SP_STATUS_BLOCK_DATA_STATE_OFFSET(pfId) \
58 (IRO[143].base + ((pfId) * IRO[143].m1))
59 #define CSTORM_SP_STATUS_BLOCK_OFFSET(pfId) \
60 (IRO[141].base + ((pfId) * IRO[141].m1))
61 #define CSTORM_SP_STATUS_BLOCK_SIZE (IRO[141].size)
62 #define CSTORM_SP_SYNC_BLOCK_OFFSET(pfId) \
63 (IRO[144].base + ((pfId) * IRO[144].m1))
64 #define CSTORM_SP_SYNC_BLOCK_SIZE (IRO[144].size)
65 #define CSTORM_STATUS_BLOCK_DATA_FLAGS_OFFSET(sbId, hcIndex) \
66 (IRO[136].base + ((sbId) * IRO[136].m1) + ((hcIndex) * IRO[136].m2))
67 #define CSTORM_STATUS_BLOCK_DATA_OFFSET(sbId) \
68 (IRO[133].base + ((sbId) * IRO[133].m1))
69 #define CSTORM_STATUS_BLOCK_DATA_STATE_OFFSET(sbId) \
70 (IRO[134].base + ((sbId) * IRO[134].m1))
71 #define CSTORM_STATUS_BLOCK_DATA_TIMEOUT_OFFSET(sbId, hcIndex) \
72 (IRO[135].base + ((sbId) * IRO[135].m1) + ((hcIndex) * IRO[135].m2))
73 #define CSTORM_STATUS_BLOCK_OFFSET(sbId) \
74 (IRO[132].base + ((sbId) * IRO[132].m1))
75 #define CSTORM_STATUS_BLOCK_SIZE (IRO[132].size)
76 #define CSTORM_SYNC_BLOCK_OFFSET(sbId) \
77 (IRO[137].base + ((sbId) * IRO[137].m1))
78 #define CSTORM_SYNC_BLOCK_SIZE (IRO[137].size)
79 #define CSTORM_VF_PF_CHANNEL_STATE_OFFSET(vfId) \
80 (IRO[155].base + ((vfId) * IRO[155].m1))
81 #define CSTORM_VF_PF_CHANNEL_VALID_OFFSET(vfId) \
82 (IRO[156].base + ((vfId) * IRO[156].m1))
83 #define CSTORM_VF_TO_PF_OFFSET(funcId) \
84 (IRO[150].base + ((funcId) * IRO[150].m1))
85 #define TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET (IRO[204].base)
86 #define TSTORM_APPROXIMATE_MATCH_MULTICAST_FILTERING_OFFSET(pfId) \
87 (IRO[203].base + ((pfId) * IRO[203].m1))
88 #define TSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[102].base)
89 #define TSTORM_ASSERT_LIST_OFFSET(assertListEntry) \
90 (IRO[101].base + ((assertListEntry) * IRO[101].m1))
91 #define TSTORM_FUNCTION_COMMON_CONFIG_OFFSET(pfId) \
92 (IRO[201].base + ((pfId) * IRO[201].m1))
93 #define TSTORM_FUNC_EN_OFFSET(funcId) \
94 (IRO[103].base + ((funcId) * IRO[103].m1))
95 #define TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) \
96 (IRO[272].base + ((pfId) * IRO[272].m1))
97 #define TSTORM_ISCSI_L2_ISCSI_OOO_CID_TABLE_OFFSET(pfId) \
98 (IRO[273].base + ((pfId) * IRO[273].m1))
99 #define TSTORM_ISCSI_L2_ISCSI_OOO_CLIENT_ID_TABLE_OFFSET(pfId) \
100 (IRO[274].base + ((pfId) * IRO[274].m1))
101 #define TSTORM_ISCSI_L2_ISCSI_OOO_PROD_OFFSET(pfId) \
102 (IRO[275].base + ((pfId) * IRO[275].m1))
103 #define TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \
104 (IRO[271].base + ((pfId) * IRO[271].m1))
105 #define TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \
106 (IRO[270].base + ((pfId) * IRO[270].m1))
107 #define TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \
108 (IRO[269].base + ((pfId) * IRO[269].m1))
109 #define TSTORM_ISCSI_RQ_SIZE_OFFSET(pfId) \
110 (IRO[268].base + ((pfId) * IRO[268].m1))
111 #define TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfId) \
112 (IRO[277].base + ((pfId) * IRO[277].m1))
113 #define TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) \
114 (IRO[264].base + ((pfId) * IRO[264].m1))
115 #define TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfId) \
116 (IRO[265].base + ((pfId) * IRO[265].m1))
117 #define TSTORM_ISCSI_TCP_VARS_MID_LOCAL_MAC_ADDR_OFFSET(pfId) \
118 (IRO[266].base + ((pfId) * IRO[266].m1))
119 #define TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfId) \
120 (IRO[267].base + ((pfId) * IRO[267].m1))
121 #define TSTORM_MAC_FILTER_CONFIG_OFFSET(pfId) \
122 (IRO[202].base + ((pfId) * IRO[202].m1))
123 #define TSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \
124 (IRO[105].base + ((funcId) * IRO[105].m1))
125 #define TSTORM_TCP_MAX_CWND_OFFSET(pfId) \
126 (IRO[217].base + ((pfId) * IRO[217].m1))
127 #define TSTORM_VF_TO_PF_OFFSET(funcId) \
128 (IRO[104].base + ((funcId) * IRO[104].m1))
129 #define USTORM_AGG_DATA_OFFSET (IRO[206].base)
130 #define USTORM_AGG_DATA_SIZE (IRO[206].size)
131 #define USTORM_ASSERT_LIST_INDEX_OFFSET (IRO[177].base)
132 #define USTORM_ASSERT_LIST_OFFSET(assertListEntry) \
133 (IRO[176].base + ((assertListEntry) * IRO[176].m1))
134 #define USTORM_CQE_PAGE_NEXT_OFFSET(portId, clientId) \
135 (IRO[205].base + ((portId) * IRO[205].m1) + ((clientId) * \
137 #define USTORM_ETH_PAUSE_ENABLED_OFFSET(portId) \
138 (IRO[183].base + ((portId) * IRO[183].m1))
139 #define USTORM_FCOE_EQ_PROD_OFFSET(pfId) \
140 (IRO[318].base + ((pfId) * IRO[318].m1))
141 #define USTORM_FUNC_EN_OFFSET(funcId) \
142 (IRO[178].base + ((funcId) * IRO[178].m1))
143 #define USTORM_ISCSI_CQ_SIZE_OFFSET(pfId) \
144 (IRO[282].base + ((pfId) * IRO[282].m1))
145 #define USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfId) \
146 (IRO[283].base + ((pfId) * IRO[283].m1))
147 #define USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfId) \
148 (IRO[287].base + ((pfId) * IRO[287].m1))
149 #define USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfId) \
150 (IRO[284].base + ((pfId) * IRO[284].m1))
151 #define USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \
152 (IRO[280].base + ((pfId) * IRO[280].m1))
153 #define USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \
154 (IRO[279].base + ((pfId) * IRO[279].m1))
155 #define USTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \
156 (IRO[278].base + ((pfId) * IRO[278].m1))
157 #define USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \
158 (IRO[281].base + ((pfId) * IRO[281].m1))
159 #define USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfId) \
160 (IRO[285].base + ((pfId) * IRO[285].m1))
161 #define USTORM_ISCSI_RQ_SIZE_OFFSET(pfId) \
162 (IRO[286].base + ((pfId) * IRO[286].m1))
163 #define USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(pfId) \
164 (IRO[182].base + ((pfId) * IRO[182].m1))
165 #define USTORM_RECORD_SLOW_PATH_OFFSET(funcId) \
166 (IRO[180].base + ((funcId) * IRO[180].m1))
167 #define USTORM_RX_PRODS_E1X_OFFSET(portId, clientId) \
168 (IRO[209].base + ((portId) * IRO[209].m1) + ((clientId) * \
170 #define USTORM_RX_PRODS_E2_OFFSET(qzoneId) \
171 (IRO[210].base + ((qzoneId) * IRO[210].m1))
172 #define USTORM_TPA_BTR_OFFSET (IRO[207].base)
173 #define USTORM_TPA_BTR_SIZE (IRO[207].size)
174 #define USTORM_VF_TO_PF_OFFSET(funcId) \
175 (IRO[179].base + ((funcId) * IRO[179].m1))
176 #define XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE (IRO[67].base)
177 #define XSTORM_AGG_INT_FINAL_CLEANUP_INDEX (IRO[66].base)
178 #define XSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[51].base)
179 #define XSTORM_ASSERT_LIST_OFFSET(assertListEntry) \
180 (IRO[50].base + ((assertListEntry) * IRO[50].m1))
181 #define XSTORM_CMNG_PER_PORT_VARS_OFFSET(portId) \
182 (IRO[43].base + ((portId) * IRO[43].m1))
183 #define XSTORM_FAIRNESS_PER_VN_VARS_OFFSET(pfId) \
184 (IRO[45].base + ((pfId) * IRO[45].m1))
185 #define XSTORM_FUNC_EN_OFFSET(funcId) \
186 (IRO[47].base + ((funcId) * IRO[47].m1))
187 #define XSTORM_ISCSI_HQ_SIZE_OFFSET(pfId) \
188 (IRO[295].base + ((pfId) * IRO[295].m1))
189 #define XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfId) \
190 (IRO[298].base + ((pfId) * IRO[298].m1))
191 #define XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfId) \
192 (IRO[299].base + ((pfId) * IRO[299].m1))
193 #define XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfId) \
194 (IRO[300].base + ((pfId) * IRO[300].m1))
195 #define XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfId) \
196 (IRO[301].base + ((pfId) * IRO[301].m1))
197 #define XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfId) \
198 (IRO[302].base + ((pfId) * IRO[302].m1))
199 #define XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfId) \
200 (IRO[303].base + ((pfId) * IRO[303].m1))
201 #define XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfId) \
202 (IRO[304].base + ((pfId) * IRO[304].m1))
203 #define XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfId) \
204 (IRO[294].base + ((pfId) * IRO[294].m1))
205 #define XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfId) \
206 (IRO[293].base + ((pfId) * IRO[293].m1))
207 #define XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfId) \
208 (IRO[292].base + ((pfId) * IRO[292].m1))
209 #define XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfId) \
210 (IRO[297].base + ((pfId) * IRO[297].m1))
211 #define XSTORM_ISCSI_SQ_SIZE_OFFSET(pfId) \
212 (IRO[296].base + ((pfId) * IRO[296].m1))
213 #define XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfId) \
214 (IRO[291].base + ((pfId) * IRO[291].m1))
215 #define XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(pfId) \
216 (IRO[290].base + ((pfId) * IRO[290].m1))
217 #define XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfId) \
218 (IRO[289].base + ((pfId) * IRO[289].m1))
219 #define XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfId) \
220 (IRO[288].base + ((pfId) * IRO[288].m1))
221 #define XSTORM_RATE_SHAPING_PER_VN_VARS_OFFSET(pfId) \
222 (IRO[44].base + ((pfId) * IRO[44].m1))
223 #define XSTORM_RECORD_SLOW_PATH_OFFSET(funcId) \
224 (IRO[49].base + ((funcId) * IRO[49].m1))
225 #define XSTORM_SPQ_DATA_OFFSET(funcId) \
226 (IRO[32].base + ((funcId) * IRO[32].m1))
227 #define XSTORM_SPQ_DATA_SIZE (IRO[32].size)
228 #define XSTORM_SPQ_PAGE_BASE_OFFSET(funcId) \
229 (IRO[30].base + ((funcId) * IRO[30].m1))
230 #define XSTORM_SPQ_PROD_OFFSET(funcId) \
231 (IRO[31].base + ((funcId) * IRO[31].m1))
232 #define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(portId) \
233 (IRO[211].base + ((portId) * IRO[211].m1))
234 #define XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(portId) \
235 (IRO[212].base + ((portId) * IRO[212].m1))
236 #define XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfId) \
237 (IRO[214].base + (((pfId)>>1) * IRO[214].m1) + (((pfId)&1) * \
239 #define XSTORM_VF_TO_PF_OFFSET(funcId) \
240 (IRO[48].base + ((funcId) * IRO[48].m1))
241 #define COMMON_ASM_INVALID_ASSERT_OPCODE 0x0
244 #define X_ETH_LOCAL_RING_SIZE 13
245 #define FIRST_BD_IN_PKT 0
246 #define PARSE_BD_INDEX 1
247 #define NUM_OF_ETH_BDS_IN_PAGE ((PAGE_SIZE)/(STRUCT_SIZE(eth_tx_bd)/8))
248 #define U_ETH_NUM_OF_SGES_TO_FETCH 8
249 #define U_ETH_MAX_SGES_FOR_PACKET 3
252 #define U_ETH_LOCAL_BD_RING_SIZE 8
253 #define U_ETH_LOCAL_SGE_RING_SIZE 10
254 #define U_ETH_SGL_SIZE 8
257 #define IP_HEADER_ALIGNMENT_PADDING 2
259 #define U_ETH_SGES_PER_PAGE_INVERSE_MASK \
260 (0xFFFF - ((PAGE_SIZE/((STRUCT_SIZE(eth_rx_sge))/8))-1))
262 #define TU_ETH_CQES_PER_PAGE (PAGE_SIZE/(STRUCT_SIZE(eth_rx_cqe)/8))
263 #define U_ETH_BDS_PER_PAGE (PAGE_SIZE/(STRUCT_SIZE(eth_rx_bd)/8))
264 #define U_ETH_SGES_PER_PAGE (PAGE_SIZE/(STRUCT_SIZE(eth_rx_sge)/8))
266 #define U_ETH_BDS_PER_PAGE_MASK (U_ETH_BDS_PER_PAGE-1)
267 #define U_ETH_CQE_PER_PAGE_MASK (TU_ETH_CQES_PER_PAGE-1)
268 #define U_ETH_SGES_PER_PAGE_MASK (U_ETH_SGES_PER_PAGE-1)
270 #define U_ETH_UNDEFINED_Q 0xFF
272 #define T_ETH_INDIRECTION_TABLE_SIZE 128
273 #define T_ETH_RSS_KEY 10
274 #define ETH_NUM_OF_RSS_ENGINES_E2 72
276 #define FILTER_RULES_COUNT 16
277 #define MULTICAST_RULES_COUNT 16
278 #define CLASSIFY_RULES_COUNT 16
281 #define ETH_CRC32_HASH_SEED 0x00000000
283 #define ETH_CRC32_HASH_BIT_SIZE (8)
284 #define ETH_CRC32_HASH_MASK EVAL((1<<ETH_CRC32_HASH_BIT_SIZE)-1)
287 #define ETH_MAX_RX_CLIENTS_E1 18
288 #define ETH_MAX_RX_CLIENTS_E1H 28
289 #define ETH_MAX_RX_CLIENTS_E2 152
292 #define MAX_STAT_COUNTER_ID_E1 36
293 #define MAX_STAT_COUNTER_ID_E1H 56
294 #define MAX_STAT_COUNTER_ID_E2 140
296 #define MAX_MAC_CREDIT_E1 192
297 #define MAX_MAC_CREDIT_E1H 256
298 #define MAX_MAC_CREDIT_E2 272
299 #define MAX_VLAN_CREDIT_E1 0
300 #define MAX_VLAN_CREDIT_E1H 0
301 #define MAX_VLAN_CREDIT_E2 272
305 #define ETH_MAX_AGGREGATION_QUEUES_E1 32
306 #define ETH_MAX_AGGREGATION_QUEUES_E1H_E2 64
309 #define ETH_NUM_OF_MCAST_BINS 256
310 #define ETH_NUM_OF_MCAST_ENGINES_E2 72
312 #define ETH_MIN_RX_CQES_WITHOUT_TPA (MAX_RAMRODS_PER_PORT + 3)
313 #define ETH_MIN_RX_CQES_WITH_TPA_E1 \
314 (ETH_MAX_AGGREGATION_QUEUES_E1 + ETH_MIN_RX_CQES_WITHOUT_TPA)
315 #define ETH_MIN_RX_CQES_WITH_TPA_E1H_E2 \
316 (ETH_MAX_AGGREGATION_QUEUES_E1H_E2 + ETH_MIN_RX_CQES_WITHOUT_TPA)
318 #define DISABLE_STATISTIC_COUNTER_ID_VALUE 0
323 #define PROTOCOL_STATE_BIT_OFFSET 6
325 #define ETH_STATE (ETH_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET)
326 #define TOE_STATE (TOE_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET)
327 #define RDMA_STATE (RDMA_CONNECTION_TYPE << PROTOCOL_STATE_BIT_OFFSET)
330 #define MC_PAGE_SIZE 4096
333 #define HC_SP_SB_MAX_INDICES 16
336 #define HC_SB_MAX_INDICES_E1X 8
337 #define HC_SB_MAX_INDICES_E2 8
339 #define HC_SB_MAX_SB_E1X 32
340 #define HC_SB_MAX_SB_E2 136
342 #define HC_SP_SB_ID 0xde
344 #define HC_SB_MAX_SM 2
346 #define HC_SB_MAX_DYNAMIC_INDICES 4
349 #define MAX_RAMRODS_PER_PORT 8
354 #define TIMERS_TICK_SIZE_CHIP (1e-3)
356 #define TSEMI_CLK1_RESUL_CHIP (1e-3)
358 #define XSEMI_CLK1_RESUL_CHIP (1e-3)
360 #define SDM_TIMER_TICK_RESUL_CHIP (4 * (1e-6))
364 #define XSTORM_IP_ID_ROLL_HALF 0x8000
365 #define XSTORM_IP_ID_ROLL_ALL 0
367 #define FW_LOG_LIST_SIZE 50
369 #define NUM_OF_SAFC_BITS 16
370 #define MAX_COS_NUMBER 4
371 #define MAX_TRAFFIC_TYPES 8
372 #define MAX_PFC_PRIORITIES 8
376 #define LLFC_TRAFFIC_TYPE_TO_PRIORITY_UNMAPPED 0xFF
379 #define C_ERES_PER_PAGE \
380 (PAGE_SIZE / BITS_TO_BYTES(STRUCT_SIZE(event_ring_elem)))
381 #define C_ERE_PER_PAGE_MASK (C_ERES_PER_PAGE - 1)
383 #define STATS_QUERY_CMD_COUNT 16
385 #define AFEX_LIST_TABLE_SIZE 4096
387 #define INVALID_VNIC_ID 0xFF
390 #define UNDEF_IRO 0x80000000