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board-neuros-osd2.c
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1 /*
2  * Neuros Technologies OSD2 board support
3  *
4  * Modified from original 644X-EVM board support.
5  * 2008 (c) Neuros Technology, LLC.
6  * 2009 (c) Jorge Luis Zapata Muga <[email protected]>
7  * 2009 (c) Andrey A. Porodko <[email protected]>
8  *
9  * The Neuros OSD 2.0 is the hardware component of the Neuros Open
10  * Internet Television Platform. Hardware is very close to TI
11  * DM644X-EVM board. It has:
12  * DM6446M02 module with 256MB NAND, 256MB RAM, TLV320AIC32 AIC,
13  * USB, Ethernet, SD/MMC, UART, THS8200, TVP7000 for video.
14  * Additionally realtime clock, IR remote control receiver,
15  * IR Blaster based on MSP430 (firmware although is different
16  * from used in DM644X-EVM), internal ATA-6 3.5” HDD drive
17  * with PATA interface, two muxed red-green leds.
18  *
19  * For more information please refer to
20  * http://wiki.neurostechnology.com/index.php/OSD_2.0_HD
21  *
22  * This file is licensed under the terms of the GNU General Public
23  * License version 2. This program is licensed "as is" without any
24  * warranty of any kind, whether express or implied.
25  */
26 #include <linux/platform_device.h>
27 #include <linux/gpio.h>
28 #include <linux/mtd/partitions.h>
29 
30 #include <asm/mach-types.h>
31 #include <asm/mach/arch.h>
32 
33 #include <mach/common.h>
35 #include <mach/serial.h>
36 #include <mach/mux.h>
40 
41 #include "davinci.h"
42 
43 #define NEUROS_OSD2_PHY_ID "davinci_mdio-0:01"
44 #define LXT971_PHY_ID 0x001378e2
45 #define LXT971_PHY_MASK 0xfffffff0
46 
47 #define NTOSD2_AUDIOSOC_I2C_ADDR 0x18
48 #define NTOSD2_MSP430_I2C_ADDR 0x59
49 #define NTOSD2_MSP430_IRQ 2
50 
51 /* Neuros OSD2 has a Samsung 256 MByte NAND flash (Dev ID of 0xAA,
52  * 2048 blocks in the device, 64 pages per block, 2048 bytes per
53  * page.
54  */
55 
56 #define NAND_BLOCK_SIZE SZ_128K
57 
58 static struct mtd_partition davinci_ntosd2_nandflash_partition[] = {
59  {
60  /* UBL (a few copies) plus U-Boot */
61  .name = "bootloader",
62  .offset = 0,
63  .size = 15 * NAND_BLOCK_SIZE,
64  .mask_flags = MTD_WRITEABLE, /* force read-only */
65  }, {
66  /* U-Boot environment */
67  .name = "params",
68  .offset = MTDPART_OFS_APPEND,
69  .size = 1 * NAND_BLOCK_SIZE,
70  .mask_flags = 0,
71  }, {
72  /* Kernel */
73  .name = "kernel",
74  .offset = MTDPART_OFS_APPEND,
75  .size = SZ_4M,
76  .mask_flags = 0,
77  }, {
78  /* File System */
79  .name = "filesystem",
80  .offset = MTDPART_OFS_APPEND,
81  .size = MTDPART_SIZ_FULL,
82  .mask_flags = 0,
83  }
84  /* A few blocks at end hold a flash Bad Block Table. */
85 };
86 
87 static struct davinci_nand_pdata davinci_ntosd2_nandflash_data = {
88  .parts = davinci_ntosd2_nandflash_partition,
89  .nr_parts = ARRAY_SIZE(davinci_ntosd2_nandflash_partition),
90  .ecc_mode = NAND_ECC_HW,
91  .bbt_options = NAND_BBT_USE_FLASH,
92 };
93 
94 static struct resource davinci_ntosd2_nandflash_resource[] = {
95  {
98  .flags = IORESOURCE_MEM,
99  }, {
102  .flags = IORESOURCE_MEM,
103  },
104 };
105 
106 static struct platform_device davinci_ntosd2_nandflash_device = {
107  .name = "davinci_nand",
108  .id = 0,
109  .dev = {
110  .platform_data = &davinci_ntosd2_nandflash_data,
111  },
112  .num_resources = ARRAY_SIZE(davinci_ntosd2_nandflash_resource),
113  .resource = davinci_ntosd2_nandflash_resource,
114 };
115 
116 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
117 
118 static struct platform_device davinci_fb_device = {
119  .name = "davincifb",
120  .id = -1,
121  .dev = {
122  .dma_mask = &davinci_fb_dma_mask,
123  .coherent_dma_mask = DMA_BIT_MASK(32),
124  },
125  .num_resources = 0,
126 };
127 
128 static struct snd_platform_data dm644x_ntosd2_snd_data;
129 
130 static struct gpio_led ntosd2_leds[] = {
131  { .name = "led1_green", .gpio = GPIO(10), },
132  { .name = "led1_red", .gpio = GPIO(11), },
133  { .name = "led2_green", .gpio = GPIO(12), },
134  { .name = "led2_red", .gpio = GPIO(13), },
135 };
136 
137 static struct gpio_led_platform_data ntosd2_leds_data = {
138  .num_leds = ARRAY_SIZE(ntosd2_leds),
139  .leds = ntosd2_leds,
140 };
141 
142 static struct platform_device ntosd2_leds_dev = {
143  .name = "leds-gpio",
144  .id = -1,
145  .dev = {
146  .platform_data = &ntosd2_leds_data,
147  },
148 };
149 
150 
151 static struct platform_device *davinci_ntosd2_devices[] __initdata = {
152  &davinci_fb_device,
153  &ntosd2_leds_dev,
154 };
155 
156 static struct davinci_uart_config uart_config __initdata = {
157  .enabled_uarts = (1 << 0),
158 };
159 
160 static void __init davinci_ntosd2_map_io(void)
161 {
162  dm644x_init();
163 }
164 
165 static struct davinci_mmc_config davinci_ntosd2_mmc_config = {
166  .wires = 4,
167  .version = MMC_CTLR_VERSION_1
168 };
169 
170 
171 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
172  defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
173 #define HAS_ATA 1
174 #else
175 #define HAS_ATA 0
176 #endif
177 
178 #if defined(CONFIG_MTD_NAND_DAVINCI) || \
179  defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
180 #define HAS_NAND 1
181 #else
182 #define HAS_NAND 0
183 #endif
184 
185 static __init void davinci_ntosd2_init(void)
186 {
187  struct clk *aemif_clk;
188  struct davinci_soc_info *soc_info = &davinci_soc_info;
189 
190  aemif_clk = clk_get(NULL, "aemif");
191  clk_enable(aemif_clk);
192 
193  if (HAS_ATA) {
194  if (HAS_NAND)
195  pr_warning("WARNING: both IDE and Flash are "
196  "enabled, but they share AEMIF pins.\n"
197  "\tDisable IDE for NAND/NOR support.\n");
199  } else if (HAS_NAND) {
202 
203  /* only one device will be jumpered and detected */
204  if (HAS_NAND)
206  &davinci_ntosd2_nandflash_device);
207  }
208 
209  platform_add_devices(davinci_ntosd2_devices,
210  ARRAY_SIZE(davinci_ntosd2_devices));
211 
212  davinci_serial_init(&uart_config);
213  dm644x_init_asp(&dm644x_ntosd2_snd_data);
214 
215  soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID;
216 
217  davinci_setup_usb(1000, 8);
218  /*
219  * Mux the pins to be GPIOs, VLYNQEN is already done at startup.
220  * The AEAWx are five new AEAW pins that can be muxed by separately.
221  * They are a bitmask for GPIO management. According TI
222  * documentation (http://www.ti.com/lit/gpn/tms320dm6446) to employ
223  * gpio(10,11,12,13) for leds any combination of bits works except
224  * four last. So we are to reset all five.
225  */
231 
232  davinci_setup_mmc(0, &davinci_ntosd2_mmc_config);
233 }
234 
235 MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
236  /* Maintainer: Neuros Technologies <[email protected]> */
237  .atag_offset = 0x100,
238  .map_io = davinci_ntosd2_map_io,
239  .init_irq = davinci_irq_init,
240  .timer = &davinci_timer,
241  .init_machine = davinci_ntosd2_init,
242  .init_late = davinci_init_late,
243  .dma_zone_size = SZ_128M,
244  .restart = davinci_restart,