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booke_wdt.c
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1 /*
2  * Watchdog timer for PowerPC Book-E systems
3  *
4  * Author: Matthew McClintock
5  * Maintainer: Kumar Gala <[email protected]>
6  *
7  * Copyright 2005, 2008, 2010-2011 Freescale Semiconductor Inc.
8  *
9  * This program is free software; you can redistribute it and/or modify it
10  * under the terms of the GNU General Public License as published by the
11  * Free Software Foundation; either version 2 of the License, or (at your
12  * option) any later version.
13  */
14 
15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16 
17 #include <linux/module.h>
18 #include <linux/fs.h>
19 #include <linux/smp.h>
20 #include <linux/miscdevice.h>
21 #include <linux/notifier.h>
22 #include <linux/watchdog.h>
23 #include <linux/uaccess.h>
24 
25 #include <asm/reg_booke.h>
26 #include <asm/time.h>
27 #include <asm/div64.h>
28 
29 /* If the kernel parameter wdt=1, the watchdog will be enabled at boot.
30  * Also, the wdt_period sets the watchdog timer period timeout.
31  * For E500 cpus the wdt_period sets which bit changing from 0->1 will
32  * trigger a watchog timeout. This watchdog timeout will occur 3 times, the
33  * first time nothing will happen, the second time a watchdog exception will
34  * occur, and the final time the board will reset.
35  */
36 
38 u32 booke_wdt_period = CONFIG_BOOKE_WDT_DEFAULT_TIMEOUT;
39 
40 #ifdef CONFIG_PPC_FSL_BOOK3E
41 #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15))
42 #define WDTP_MASK (WDTP(0x3f))
43 #else
44 #define WDTP(x) (TCR_WP(x))
45 #define WDTP_MASK (TCR_WP_MASK)
46 #endif
47 
48 static DEFINE_SPINLOCK(booke_wdt_lock);
49 
50 /* For the specified period, determine the number of seconds
51  * corresponding to the reset time. There will be a watchdog
52  * exception at approximately 3/5 of this time.
53  *
54  * The formula to calculate this is given by:
55  * 2.5 * (2^(63-period+1)) / timebase_freq
56  *
57  * In order to simplify things, we assume that period is
58  * at least 1. This will still result in a very long timeout.
59  */
60 static unsigned long long period_to_sec(unsigned int period)
61 {
62  unsigned long long tmp = 1ULL << (64 - period);
63  unsigned long tmp2 = ppc_tb_freq;
64 
65  /* tmp may be a very large number and we don't want to overflow,
66  * so divide the timebase freq instead of multiplying tmp
67  */
68  tmp2 = tmp2 / 5 * 2;
69 
70  do_div(tmp, tmp2);
71  return tmp;
72 }
73 
74 /*
75  * This procedure will find the highest period which will give a timeout
76  * greater than the one required. e.g. for a bus speed of 66666666 and
77  * and a parameter of 2 secs, then this procedure will return a value of 38.
78  */
79 static unsigned int sec_to_period(unsigned int secs)
80 {
81  unsigned int period;
82  for (period = 63; period > 0; period--) {
83  if (period_to_sec(period) >= secs)
84  return period;
85  }
86  return 0;
87 }
88 
89 static void __booke_wdt_set(void *data)
90 {
91  u32 val;
92 
93  val = mfspr(SPRN_TCR);
94  val &= ~WDTP_MASK;
95  val |= WDTP(booke_wdt_period);
96 
97  mtspr(SPRN_TCR, val);
98 }
99 
100 static void booke_wdt_set(void)
101 {
102  on_each_cpu(__booke_wdt_set, NULL, 0);
103 }
104 
105 static void __booke_wdt_ping(void *data)
106 {
107  mtspr(SPRN_TSR, TSR_ENW|TSR_WIS);
108 }
109 
110 static void booke_wdt_ping(void)
111 {
112  on_each_cpu(__booke_wdt_ping, NULL, 0);
113 }
114 
115 static void __booke_wdt_enable(void *data)
116 {
117  u32 val;
118 
119  /* clear status before enabling watchdog */
120  __booke_wdt_ping(NULL);
121  val = mfspr(SPRN_TCR);
122  val &= ~WDTP_MASK;
123  val |= (TCR_WIE|TCR_WRC(WRC_CHIP)|WDTP(booke_wdt_period));
124 
125  mtspr(SPRN_TCR, val);
126 }
127 
136 static void __booke_wdt_disable(void *data)
137 {
138  u32 val;
139 
140  val = mfspr(SPRN_TCR);
141  val &= ~(TCR_WIE | WDTP_MASK);
142  mtspr(SPRN_TCR, val);
143 
144  /* clear status to make sure nothing is pending */
145  __booke_wdt_ping(NULL);
146 
147 }
148 
149 static ssize_t booke_wdt_write(struct file *file, const char __user *buf,
150  size_t count, loff_t *ppos)
151 {
152  booke_wdt_ping();
153  return count;
154 }
155 
156 static struct watchdog_info ident = {
158  .identity = "PowerPC Book-E Watchdog",
159 };
160 
161 static long booke_wdt_ioctl(struct file *file,
162  unsigned int cmd, unsigned long arg)
163 {
164  u32 tmp = 0;
165  u32 __user *p = (u32 __user *)arg;
166 
167  switch (cmd) {
168  case WDIOC_GETSUPPORT:
169  return copy_to_user(p, &ident, sizeof(ident)) ? -EFAULT : 0;
170  case WDIOC_GETSTATUS:
171  return put_user(0, p);
172  case WDIOC_GETBOOTSTATUS:
173  /* XXX: something is clearing TSR */
174  tmp = mfspr(SPRN_TSR) & TSR_WRS(3);
175  /* returns CARDRESET if last reset was caused by the WDT */
176  return put_user((tmp ? WDIOF_CARDRESET : 0), p);
177  case WDIOC_SETOPTIONS:
178  if (get_user(tmp, p))
179  return -EFAULT;
180  if (tmp == WDIOS_ENABLECARD) {
181  booke_wdt_ping();
182  break;
183  } else
184  return -EINVAL;
185  return 0;
186  case WDIOC_KEEPALIVE:
187  booke_wdt_ping();
188  return 0;
189  case WDIOC_SETTIMEOUT:
190  if (get_user(tmp, p))
191  return -EFAULT;
192 #ifdef CONFIG_PPC_FSL_BOOK3E
193  /* period of 1 gives the largest possible timeout */
194  if (tmp > period_to_sec(1))
195  return -EINVAL;
196  booke_wdt_period = sec_to_period(tmp);
197 #else
199 #endif
200  booke_wdt_set();
201  /* Fall */
202  case WDIOC_GETTIMEOUT:
203 #ifdef CONFIG_FSL_BOOKE
204  return put_user(period_to_sec(booke_wdt_period), p);
205 #else
206  return put_user(booke_wdt_period, p);
207 #endif
208  default:
209  return -ENOTTY;
210  }
211 
212  return 0;
213 }
214 
215 /* wdt_is_active stores wether or not the /dev/watchdog device is opened */
216 static unsigned long wdt_is_active;
217 
218 static int booke_wdt_open(struct inode *inode, struct file *file)
219 {
220  /* /dev/watchdog can only be opened once */
221  if (test_and_set_bit(0, &wdt_is_active))
222  return -EBUSY;
223 
224  spin_lock(&booke_wdt_lock);
225  if (booke_wdt_enabled == 0) {
226  booke_wdt_enabled = 1;
227  on_each_cpu(__booke_wdt_enable, NULL, 0);
228  pr_debug("watchdog enabled (timeout = %llu sec)\n",
229  period_to_sec(booke_wdt_period));
230  }
231  spin_unlock(&booke_wdt_lock);
232 
233  return nonseekable_open(inode, file);
234 }
235 
236 static int booke_wdt_release(struct inode *inode, struct file *file)
237 {
238 #ifndef CONFIG_WATCHDOG_NOWAYOUT
239  /* Normally, the watchdog is disabled when /dev/watchdog is closed, but
240  * if CONFIG_WATCHDOG_NOWAYOUT is defined, then it means that the
241  * watchdog should remain enabled. So we disable it only if
242  * CONFIG_WATCHDOG_NOWAYOUT is not defined.
243  */
244  on_each_cpu(__booke_wdt_disable, NULL, 0);
245  booke_wdt_enabled = 0;
246  pr_debug("watchdog disabled\n");
247 #endif
248 
249  clear_bit(0, &wdt_is_active);
250 
251  return 0;
252 }
253 
254 static const struct file_operations booke_wdt_fops = {
255  .owner = THIS_MODULE,
256  .llseek = no_llseek,
257  .write = booke_wdt_write,
258  .unlocked_ioctl = booke_wdt_ioctl,
259  .open = booke_wdt_open,
260  .release = booke_wdt_release,
261 };
262 
263 static struct miscdevice booke_wdt_miscdev = {
264  .minor = WATCHDOG_MINOR,
265  .name = "watchdog",
266  .fops = &booke_wdt_fops,
267 };
268 
269 static void __exit booke_wdt_exit(void)
270 {
271  misc_deregister(&booke_wdt_miscdev);
272 }
273 
274 static int __init booke_wdt_init(void)
275 {
276  int ret = 0;
277 
278  pr_info("powerpc book-e watchdog driver loaded\n");
279  ident.firmware_version = cur_cpu_spec->pvr_value;
280 
281  ret = misc_register(&booke_wdt_miscdev);
282  if (ret) {
283  pr_err("cannot register device (minor=%u, ret=%i)\n",
284  WATCHDOG_MINOR, ret);
285  return ret;
286  }
287 
288  spin_lock(&booke_wdt_lock);
289  if (booke_wdt_enabled == 1) {
290  pr_info("watchdog enabled (timeout = %llu sec)\n",
291  period_to_sec(booke_wdt_period));
292  on_each_cpu(__booke_wdt_enable, NULL, 0);
293  }
294  spin_unlock(&booke_wdt_lock);
295 
296  return ret;
297 }
298 
299 module_init(booke_wdt_init);
300 module_exit(booke_wdt_exit);
301 
302 MODULE_DESCRIPTION("PowerPC Book-E watchdog driver");
303 MODULE_LICENSE("GPL");