24 #include <linux/module.h>
26 #include <linux/types.h>
38 #define CAST5_PARALLEL_BLOCKS 16
64 static inline bool cast5_fpu_begin(
bool fpu_enabled,
unsigned int nbytes)
67 NULL, fpu_enabled, nbytes);
70 static inline void cast5_fpu_end(
bool fpu_enabled)
72 return glue_fpu_end(fpu_enabled);
78 bool fpu_enabled =
false;
87 while ((nbytes = walk->
nbytes)) {
91 fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes);
97 cast5_enc_blk_xway(ctx, wdst, wsrc);
99 cast5_dec_blk_xway(ctx, wdst, wsrc);
104 }
while (nbytes >= bsize * CAST5_PARALLEL_BLOCKS);
120 }
while (nbytes >= bsize);
126 cast5_fpu_end(fpu_enabled);
135 blkcipher_walk_init(&walk, dst, src, nbytes);
136 return ecb_crypt(desc, &walk,
true);
144 blkcipher_walk_init(&walk, dst, src, nbytes);
145 return ecb_crypt(desc, &walk,
false);
151 struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->
tfm);
153 unsigned int nbytes = walk->
nbytes;
166 }
while (nbytes >= bsize);
168 *(
u64 *)walk->
iv = *iv;
178 blkcipher_walk_init(&walk, dst, src, nbytes);
181 while ((nbytes = walk.
nbytes)) {
182 nbytes = __cbc_encrypt(desc, &walk);
192 struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->
tfm);
194 unsigned int nbytes = walk->
nbytes;
197 u64 ivs[CAST5_PARALLEL_BLOCKS - 1];
202 src += nbytes / bsize - 1;
203 dst += nbytes / bsize - 1;
208 if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) {
210 nbytes -= bsize * (CAST5_PARALLEL_BLOCKS - 1);
211 src -= CAST5_PARALLEL_BLOCKS - 1;
212 dst -= CAST5_PARALLEL_BLOCKS - 1;
214 for (i = 0; i < CAST5_PARALLEL_BLOCKS - 1; i++)
217 cast5_dec_blk_xway(ctx, (
u8 *)dst, (
u8 *)src);
219 for (i = 0; i < CAST5_PARALLEL_BLOCKS - 1; i++)
220 *(dst + (i + 1)) ^= *(ivs +
i);
229 }
while (nbytes >= bsize * CAST5_PARALLEL_BLOCKS);
249 *dst ^= *(
u64 *)walk->
iv;
250 *(
u64 *)walk->
iv = last_iv;
258 bool fpu_enabled =
false;
262 blkcipher_walk_init(&walk, dst, src, nbytes);
266 while ((nbytes = walk.
nbytes)) {
267 fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes);
268 nbytes = __cbc_decrypt(desc, &walk);
272 cast5_fpu_end(fpu_enabled);
279 struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->
tfm);
280 u8 *ctrblk = walk->
iv;
284 unsigned int nbytes = walk->
nbytes;
288 memcpy(dst, keystream, nbytes);
296 struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->
tfm);
298 unsigned int nbytes = walk->
nbytes;
306 if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) {
316 cast5_enc_blk_xway_xor(ctx, (
u8 *)dst,
322 }
while (nbytes >= bsize * CAST5_PARALLEL_BLOCKS);
336 *dst ^= ctrblocks[0];
341 }
while (nbytes >= bsize);
351 bool fpu_enabled =
false;
355 blkcipher_walk_init(&walk, dst, src, nbytes);
360 fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes);
361 nbytes = __ctr_crypt(desc, &walk);
365 cast5_fpu_end(fpu_enabled);
368 ctr_crypt_final(desc, &walk);
377 .cra_name =
"__ecb-cast5-avx",
378 .cra_driver_name =
"__driver-ecb-cast5-avx",
391 .encrypt = ecb_encrypt,
392 .decrypt = ecb_decrypt,
396 .cra_name =
"__cbc-cast5-avx",
397 .cra_driver_name =
"__driver-cbc-cast5-avx",
410 .encrypt = cbc_encrypt,
411 .decrypt = cbc_decrypt,
415 .cra_name =
"__ctr-cast5-avx",
416 .cra_driver_name =
"__driver-ctr-cast5-avx",
430 .encrypt = ctr_crypt,
431 .decrypt = ctr_crypt,
435 .cra_name =
"ecb(cast5)",
436 .cra_driver_name =
"ecb-cast5-avx",
456 .cra_name =
"cbc(cast5)",
457 .cra_driver_name =
"cbc-cast5-avx",
478 .cra_name =
"ctr(cast5)",
479 .cra_driver_name =
"ctr-cast5-avx",
502 static int __init cast5_init(
void)
506 if (!cpu_has_avx || !cpu_has_osxsave) {
507 pr_info(
"AVX instructions are not detected.\n");
513 pr_info(
"AVX detected but unusable.\n");
520 static void __exit cast5_exit(
void)