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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Go to the source code of this file.
Macros | |
| #define | NR_PHYS_CTRS 4 |
| #define | NR_CTRS (NR_PHYS_CTRS * 2) |
| #define | CBE_PM_16BIT_CTR(ctr) (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1)))) |
| #define | CBE_PM_ENABLE_PERF_MON 0x80000000 |
| #define | CBE_PM_STOP_AT_MAX 0x40000000 |
| #define | CBE_PM_TRACE_MODE_GET(pm_control) (((pm_control) >> 28) & 0x3) |
| #define | CBE_PM_TRACE_MODE_SET(mode) (((mode) & 0x3) << 28) |
| #define | CBE_PM_TRACE_BUF_OVFLW(bit) (((bit) & 0x1) << 17) |
| #define | CBE_PM_COUNT_MODE_SET(count) (((count) & 0x3) << 18) |
| #define | CBE_PM_FREEZE_ALL_CTRS 0x00100000 |
| #define | CBE_PM_ENABLE_EXT_TRACE 0x00008000 |
| #define | CBE_PM_SPU_ADDR_TRACE_SET(msk) (((msk) & 0x3) << 9) |
| #define | CBE_PM_TRACE_BUF_FULL 0x00000800 |
| #define | CBE_PM_TRACE_BUF_EMPTY 0x00000400 |
| #define | CBE_PM_TRACE_BUF_DATA_COUNT(ta) ((ta) & 0x3ff) |
| #define | CBE_PM_TRACE_BUF_MAX_COUNT 0x400 |
| #define | CBE_PM_CTR_INPUT_MUX(pm07_control) (((pm07_control) >> 26) & 0x3f) |
| #define | CBE_PM_CTR_INPUT_CONTROL 0x02000000 |
| #define | CBE_PM_CTR_POLARITY 0x01000000 |
| #define | CBE_PM_CTR_COUNT_CYCLES 0x00800000 |
| #define | CBE_PM_CTR_ENABLE 0x00400000 |
| #define | PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26) |
| #define | PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25) |
| #define | PM07_CTR_POLARITY(x) (((x) & 1) << 24) |
| #define | PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23) |
| #define | PM07_CTR_ENABLE(x) (((x) & 1) << 22) |
| #define | CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7))) |
| #define | CBE_COUNT_SUPERVISOR_MODE 0 |
| #define | CBE_COUNT_HYPERVISOR_MODE 1 |
| #define | CBE_COUNT_PROBLEM_MODE 2 |
| #define | CBE_COUNT_ALL_MODES 3 |
Enumerations | |
| enum | pm_reg_name { group_control, debug_bus_control, trace_address, ext_tr_timer, pm_status, pm_control, pm_interval, pm_start_stop } |
Functions | |
| u32 | cbe_read_phys_ctr (u32 cpu, u32 phys_ctr) |
| void | cbe_write_phys_ctr (u32 cpu, u32 phys_ctr, u32 val) |
| u32 | cbe_read_ctr (u32 cpu, u32 ctr) |
| void | cbe_write_ctr (u32 cpu, u32 ctr, u32 val) |
| u32 | cbe_read_pm07_control (u32 cpu, u32 ctr) |
| void | cbe_write_pm07_control (u32 cpu, u32 ctr, u32 val) |
| u32 | cbe_read_pm (u32 cpu, enum pm_reg_name reg) |
| void | cbe_write_pm (u32 cpu, enum pm_reg_name reg, u32 val) |
| u32 | cbe_get_ctr_size (u32 cpu, u32 phys_ctr) |
| void | cbe_set_ctr_size (u32 cpu, u32 phys_ctr, u32 ctr_size) |
| void | cbe_enable_pm (u32 cpu) |
| void | cbe_disable_pm (u32 cpu) |
| void | cbe_read_trace_buffer (u32 cpu, u64 *buf) |
| void | cbe_enable_pm_interrupts (u32 cpu, u32 thread, u32 mask) |
| void | cbe_disable_pm_interrupts (u32 cpu) |
| u32 | cbe_get_and_clear_pm_interrupts (u32 cpu) |
| void | cbe_sync_irq (int node) |
| #define CBE_COUNT_ALL_MODES 3 |
Definition at line 105 of file cell-pmu.h.
| #define CBE_COUNT_HYPERVISOR_MODE 1 |
Definition at line 103 of file cell-pmu.h.
| #define CBE_COUNT_PROBLEM_MODE 2 |
Definition at line 104 of file cell-pmu.h.
| #define CBE_COUNT_SUPERVISOR_MODE 0 |
Definition at line 102 of file cell-pmu.h.
| #define CBE_PM_16BIT_CTR | ( | ctr | ) | (1 << (24 - ((ctr) & (NR_PHYS_CTRS - 1)))) |
Definition at line 35 of file cell-pmu.h.
Definition at line 41 of file cell-pmu.h.
| #define CBE_PM_CTR_COUNT_CYCLES 0x00800000 |
Definition at line 56 of file cell-pmu.h.
| #define CBE_PM_CTR_ENABLE 0x00400000 |
Definition at line 57 of file cell-pmu.h.
| #define CBE_PM_CTR_INPUT_CONTROL 0x02000000 |
Definition at line 54 of file cell-pmu.h.
| #define CBE_PM_CTR_INPUT_MUX | ( | pm07_control | ) | (((pm07_control) >> 26) & 0x3f) |
Definition at line 53 of file cell-pmu.h.
| #define CBE_PM_CTR_OVERFLOW_INTR | ( | ctr | ) | (1 << (31 - ((ctr) & 7))) |
Definition at line 65 of file cell-pmu.h.
| #define CBE_PM_CTR_POLARITY 0x01000000 |
Definition at line 55 of file cell-pmu.h.
| #define CBE_PM_ENABLE_EXT_TRACE 0x00008000 |
Definition at line 43 of file cell-pmu.h.
| #define CBE_PM_ENABLE_PERF_MON 0x80000000 |
Definition at line 36 of file cell-pmu.h.
| #define CBE_PM_FREEZE_ALL_CTRS 0x00100000 |
Definition at line 42 of file cell-pmu.h.
Definition at line 44 of file cell-pmu.h.
| #define CBE_PM_STOP_AT_MAX 0x40000000 |
Definition at line 37 of file cell-pmu.h.
Definition at line 49 of file cell-pmu.h.
| #define CBE_PM_TRACE_BUF_EMPTY 0x00000400 |
Definition at line 48 of file cell-pmu.h.
| #define CBE_PM_TRACE_BUF_FULL 0x00000800 |
Definition at line 47 of file cell-pmu.h.
| #define CBE_PM_TRACE_BUF_MAX_COUNT 0x400 |
Definition at line 50 of file cell-pmu.h.
Definition at line 40 of file cell-pmu.h.
| #define CBE_PM_TRACE_MODE_GET | ( | pm_control | ) | (((pm_control) >> 28) & 0x3) |
Definition at line 38 of file cell-pmu.h.
Definition at line 39 of file cell-pmu.h.
| #define NR_CTRS (NR_PHYS_CTRS * 2) |
Definition at line 32 of file cell-pmu.h.
| #define NR_PHYS_CTRS 4 |
Definition at line 31 of file cell-pmu.h.
Definition at line 61 of file cell-pmu.h.
Definition at line 62 of file cell-pmu.h.
Definition at line 59 of file cell-pmu.h.
Definition at line 58 of file cell-pmu.h.
Definition at line 60 of file cell-pmu.h.
| enum pm_reg_name |
| group_control | |
| debug_bus_control | |
| trace_address | |
| ext_tr_timer | |
| pm_status | |
| pm_control | |
| pm_interval | |
| pm_start_stop |
Definition at line 67 of file cell-pmu.h.
| u32 cbe_read_pm | ( | u32 | cpu, |
| enum pm_reg_name | reg | ||
| ) |
1.8.2