Linux Kernel
3.7.1
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Macros | |
#define | PCI_VENDOR_ID_TOSHIBA_2 0x102f |
#define | PCI_DEVICE_ID_TOSHIBA_SCC_PCIEXC_BRIDGE 0x01b0 |
#define | PCI_DEVICE_ID_TOSHIBA_SCC_EPCI_BRIDGE 0x01b1 |
#define | PCI_DEVICE_ID_TOSHIBA_SCC_BRIDGE 0x01b2 |
#define | PCI_DEVICE_ID_TOSHIBA_SCC_GBE 0x01b3 |
#define | PCI_DEVICE_ID_TOSHIBA_SCC_ATA 0x01b4 |
#define | PCI_DEVICE_ID_TOSHIBA_SCC_USB2 0x01b5 |
#define | PCI_DEVICE_ID_TOSHIBA_SCC_USB 0x01b6 |
#define | PCI_DEVICE_ID_TOSHIBA_SCC_ENCDEC 0x01b7 |
#define | SCC_EPCI_REG 0x0000d000 |
#define | SCC_EPCI_CNF10_REG 0x010 |
#define | SCC_EPCI_CNF14_REG 0x014 |
#define | SCC_EPCI_CNF18_REG 0x018 |
#define | SCC_EPCI_PVBAT 0x100 |
#define | SCC_EPCI_VPMBAT 0x104 |
#define | SCC_EPCI_VPIBAT 0x108 |
#define | SCC_EPCI_VCSR 0x110 |
#define | SCC_EPCI_VIENAB 0x114 |
#define | SCC_EPCI_VISTAT 0x118 |
#define | SCC_EPCI_VRDCOUNT 0x124 |
#define | SCC_EPCI_BAM0 0x12c |
#define | SCC_EPCI_BAM1 0x134 |
#define | SCC_EPCI_BAM2 0x13c |
#define | SCC_EPCI_IADR 0x164 |
#define | SCC_EPCI_CLKRST 0x800 |
#define | SCC_EPCI_INTSET 0x804 |
#define | SCC_EPCI_STATUS 0x808 |
#define | SCC_EPCI_ABTSET 0x80c |
#define | SCC_EPCI_WATRP 0x810 |
#define | SCC_EPCI_DUMYRADR 0x814 |
#define | SCC_EPCI_SWRESP 0x818 |
#define | SCC_EPCI_CNTOPT 0x81c |
#define | SCC_EPCI_ECMODE 0xf00 |
#define | SCC_EPCI_IOM_AC_NUM 5 |
#define | SCC_EPCI_IOM_ACTE(n) (0xf10 + (n) * 4) |
#define | SCC_EPCI_IOT_AC_NUM 4 |
#define | SCC_EPCI_IOT_ACTE(n) (0xf30 + (n) * 4) |
#define | SCC_EPCI_MAEA 0xf50 |
#define | SCC_EPCI_MAEC 0xf54 |
#define | SCC_EPCI_CKCTRL 0xff0 |
#define | SCC_EPCI_VCSR_FRE 0x00020000 |
#define | SCC_EPCI_VCSR_FWE 0x00010000 |
#define | SCC_EPCI_VCSR_DR 0x00000400 |
#define | SCC_EPCI_VCSR_SR 0x00000008 |
#define | SCC_EPCI_VCSR_AT 0x00000004 |
#define | SCC_EPCI_VISTAT_PMPE 0x00000008 |
#define | SCC_EPCI_VISTAT_PMFE 0x00000004 |
#define | SCC_EPCI_VISTAT_PRA 0x00000002 |
#define | SCC_EPCI_VISTAT_PRD 0x00000001 |
#define | SCC_EPCI_VISTAT_ALL 0x0000000f |
#define | SCC_EPCI_VIENAB_PMPEE 0x00000008 |
#define | SCC_EPCI_VIENAB_PMFEE 0x00000004 |
#define | SCC_EPCI_VIENAB_PRA 0x00000002 |
#define | SCC_EPCI_VIENAB_PRD 0x00000001 |
#define | SCC_EPCI_VIENAB_ALL 0x0000000f |
#define | SCC_EPCI_CLKRST_CKS_MASK 0x00030000 |
#define | SCC_EPCI_CLKRST_CKS_2 0x00000000 |
#define | SCC_EPCI_CLKRST_CKS_4 0x00010000 |
#define | SCC_EPCI_CLKRST_CKS_8 0x00020000 |
#define | SCC_EPCI_CLKRST_PCICRST 0x00000400 |
#define | SCC_EPCI_CLKRST_BC 0x00000200 |
#define | SCC_EPCI_CLKRST_PCIRST 0x00000100 |
#define | SCC_EPCI_CLKRST_PCKEN 0x00000001 |
#define | SCC_EPCI_INT_2M 0x01000000 |
#define | SCC_EPCI_INT_RERR 0x00200000 |
#define | SCC_EPCI_INT_SERR 0x00100000 |
#define | SCC_EPCI_INT_PRTER 0x00080000 |
#define | SCC_EPCI_INT_SER 0x00040000 |
#define | SCC_EPCI_INT_PER 0x00020000 |
#define | SCC_EPCI_INT_PAI 0x00010000 |
#define | SCC_EPCI_INT_1M 0x00000100 |
#define | SCC_EPCI_INT_PME 0x00000010 |
#define | SCC_EPCI_INT_INTD 0x00000008 |
#define | SCC_EPCI_INT_INTC 0x00000004 |
#define | SCC_EPCI_INT_INTB 0x00000002 |
#define | SCC_EPCI_INT_INTA 0x00000001 |
#define | SCC_EPCI_INT_DEVINT 0x0000000f |
#define | SCC_EPCI_INT_ALL 0x003f001f |
#define | SCC_EPCI_INT_ALLERR 0x003f0000 |
#define | SCC_EPCI_CKCTRL_CRST0 0x00010000 |
#define | SCC_EPCI_CKCTRL_CRST1 0x00020000 |
#define | SCC_EPCI_CKCTRL_OCLKEN 0x00000100 |
#define | SCC_EPCI_CKCTRL_LCLKEN 0x00000001 |
#define | SCC_EPCI_IDSEL_AD_TO_SLOT(ad) ((ad) - 10) |
#define | SCC_EPCI_MAX_DEVNU SCC_EPCI_IDSEL_AD_TO_SLOT(32) |
#define | SCC_EPCI_CNTOPT_O2PMB 0x00000002 |
#define | PEXCADRS 0x000 |
#define | PEXCWDATA 0x004 |
#define | PEXCRDATA 0x008 |
#define | PEXDADRS 0x010 |
#define | PEXDCMND 0x014 |
#define | PEXDWDATA 0x018 |
#define | PEXDRDATA 0x01c |
#define | PEXREQID 0x020 |
#define | PEXTIDMAP 0x024 |
#define | PEXINTMASK 0x028 |
#define | PEXINTSTS 0x02c |
#define | PEXAERRMASK 0x030 |
#define | PEXAERRSTS 0x034 |
#define | PEXPRERRMASK 0x040 |
#define | PEXPRERRSTS 0x044 |
#define | PEXPRERRID01 0x048 |
#define | PEXPRERRID23 0x04c |
#define | PEXVDMASK 0x050 |
#define | PEXVDSTS 0x054 |
#define | PEXRCVCPLIDA 0x060 |
#define | PEXLENERRIDA 0x068 |
#define | PEXPHYPLLST 0x070 |
#define | PEXDMRDEN0 0x100 |
#define | PEXDMRDADR0 0x104 |
#define | PEXDMRDENX 0x110 |
#define | PEXDMRDADRX 0x114 |
#define | PEXECMODE 0xf00 |
#define | PEXMAEA(n) (0xf50 + (8 * n)) |
#define | PEXMAEC(n) (0xf54 + (8 * n)) |
#define | PEXCCRCTRL 0xff0 |
#define | PEXCADRS_BYTE_EN_SHIFT 20 |
#define | PEXCADRS_CMD_SHIFT 16 |
#define | PEXCADRS_CMD_READ (0xa << PEXCADRS_CMD_SHIFT) |
#define | PEXCADRS_CMD_WRITE (0xb << PEXCADRS_CMD_SHIFT) |
#define | PEXDADRS_BUSNO_SHIFT 20 |
#define | PEXDADRS_DEVNO_SHIFT 15 |
#define | PEXDADRS_FUNCNO_SHIFT 12 |
#define | PEXDCMND_BYTE_EN_SHIFT 4 |
#define | PEXDCMND_IO_READ 0x2 |
#define | PEXDCMND_IO_WRITE 0x3 |
#define | PEXDCMND_CONFIG_READ 0xa |
#define | PEXDCMND_CONFIG_WRITE 0xb |
#define | PEXPHYPLLST_PEXPHYAPLLST 0x00000001 |
#define | PEXECMODE_ALL_THROUGH 0x00000000 |
#define | PEXECMODE_ALL_8BIT 0x00550155 |
#define | PEXECMODE_ALL_16BIT 0x00aa02aa |
#define | PEXCCRCTRL_PEXIPCOREEN 0x00040000 |
#define | PEXCCRCTRL_PEXIPCONTEN 0x00020000 |
#define | PEXCCRCTRL_PEXPHYPLLEN 0x00010000 |
#define | PEXCCRCTRL_PCIEXCAOCKEN 0x00000100 |
#define | PEXTCERRCHK 0x21c |
#define | PEXTAMAPB0 0x220 |
#define | PEXTAMAPL0 0x224 |
#define | PEXTAMAPB(n) (PEXTAMAPB0 + 8 * (n)) |
#define | PEXTAMAPL(n) (PEXTAMAPL0 + 8 * (n)) |
#define | PEXCHVC0P 0x500 |
#define | PEXCHVC0NP 0x504 |
#define | PEXCHVC0C 0x508 |
#define | PEXCDVC0P 0x50c |
#define | PEXCDVC0NP 0x510 |
#define | PEXCDVC0C 0x514 |
#define | PEXCHVCXP 0x518 |
#define | PEXCHVCXNP 0x51c |
#define | PEXCHVCXC 0x520 |
#define | PEXCDVCXP 0x524 |
#define | PEXCDVCXNP 0x528 |
#define | PEXCDVCXC 0x52c |
#define | PEXCTTRG 0x530 |
#define | PEXTSCTRL 0x700 |
#define | PEXTSSTS 0x704 |
#define | PEXSKPCTRL 0x708 |
#define | SCC_UHC_CKRCTRL 0xff0 |
#define | SCC_UHC_ECMODE 0xf00 |
#define | SCC_UHC_F48MCKLEN 0x00000001 |
#define | SCC_UHC_P_SUSPEND 0x00000002 |
#define | SCC_UHC_PHY_SUSPEND_SEL 0x00000004 |
#define | SCC_UHC_HCLKEN 0x00000100 |
#define | SCC_UHC_USBEN 0x00010000 |
#define | SCC_UHC_USBCEN 0x00020000 |
#define | SCC_UHC_PHYEN 0x00040000 |
#define | SCC_UHC_ECMODE_BY_BYTE 0x00000555 |
#define | SCC_UHC_ECMODE_BY_WORD 0x00000aaa |
#define PCI_DEVICE_ID_TOSHIBA_SCC_ATA 0x01b4 |
Definition at line 29 of file celleb_scc.h.
#define PCI_DEVICE_ID_TOSHIBA_SCC_BRIDGE 0x01b2 |
Definition at line 27 of file celleb_scc.h.
#define PCI_DEVICE_ID_TOSHIBA_SCC_ENCDEC 0x01b7 |
Definition at line 32 of file celleb_scc.h.
#define PCI_DEVICE_ID_TOSHIBA_SCC_EPCI_BRIDGE 0x01b1 |
Definition at line 26 of file celleb_scc.h.
#define PCI_DEVICE_ID_TOSHIBA_SCC_GBE 0x01b3 |
Definition at line 28 of file celleb_scc.h.
#define PCI_DEVICE_ID_TOSHIBA_SCC_PCIEXC_BRIDGE 0x01b0 |
Definition at line 25 of file celleb_scc.h.
#define PCI_DEVICE_ID_TOSHIBA_SCC_USB 0x01b6 |
Definition at line 31 of file celleb_scc.h.
#define PCI_DEVICE_ID_TOSHIBA_SCC_USB2 0x01b5 |
Definition at line 30 of file celleb_scc.h.
#define PCI_VENDOR_ID_TOSHIBA_2 0x102f |
Definition at line 24 of file celleb_scc.h.
#define PEXAERRMASK 0x030 |
Definition at line 140 of file celleb_scc.h.
#define PEXAERRSTS 0x034 |
Definition at line 141 of file celleb_scc.h.
#define PEXCADRS 0x000 |
Definition at line 129 of file celleb_scc.h.
#define PEXCADRS_BYTE_EN_SHIFT 20 |
Definition at line 161 of file celleb_scc.h.
#define PEXCADRS_CMD_READ (0xa << PEXCADRS_CMD_SHIFT) |
Definition at line 163 of file celleb_scc.h.
#define PEXCADRS_CMD_SHIFT 16 |
Definition at line 162 of file celleb_scc.h.
#define PEXCADRS_CMD_WRITE (0xb << PEXCADRS_CMD_SHIFT) |
Definition at line 164 of file celleb_scc.h.
#define PEXCCRCTRL 0xff0 |
Definition at line 158 of file celleb_scc.h.
#define PEXCCRCTRL_PCIEXCAOCKEN 0x00000100 |
Definition at line 190 of file celleb_scc.h.
#define PEXCCRCTRL_PEXIPCONTEN 0x00020000 |
Definition at line 188 of file celleb_scc.h.
#define PEXCCRCTRL_PEXIPCOREEN 0x00040000 |
Definition at line 187 of file celleb_scc.h.
#define PEXCCRCTRL_PEXPHYPLLEN 0x00010000 |
Definition at line 189 of file celleb_scc.h.
#define PEXCDVC0C 0x514 |
Definition at line 203 of file celleb_scc.h.
#define PEXCDVC0NP 0x510 |
Definition at line 202 of file celleb_scc.h.
#define PEXCDVC0P 0x50c |
Definition at line 201 of file celleb_scc.h.
#define PEXCDVCXC 0x52c |
Definition at line 209 of file celleb_scc.h.
#define PEXCDVCXNP 0x528 |
Definition at line 208 of file celleb_scc.h.
#define PEXCDVCXP 0x524 |
Definition at line 207 of file celleb_scc.h.
#define PEXCHVC0C 0x508 |
Definition at line 200 of file celleb_scc.h.
#define PEXCHVC0NP 0x504 |
Definition at line 199 of file celleb_scc.h.
#define PEXCHVC0P 0x500 |
Definition at line 198 of file celleb_scc.h.
#define PEXCHVCXC 0x520 |
Definition at line 206 of file celleb_scc.h.
#define PEXCHVCXNP 0x51c |
Definition at line 205 of file celleb_scc.h.
#define PEXCHVCXP 0x518 |
Definition at line 204 of file celleb_scc.h.
#define PEXCRDATA 0x008 |
Definition at line 131 of file celleb_scc.h.
#define PEXCTTRG 0x530 |
Definition at line 210 of file celleb_scc.h.
#define PEXCWDATA 0x004 |
Definition at line 130 of file celleb_scc.h.
#define PEXDADRS 0x010 |
Definition at line 132 of file celleb_scc.h.
#define PEXDADRS_BUSNO_SHIFT 20 |
Definition at line 167 of file celleb_scc.h.
#define PEXDADRS_DEVNO_SHIFT 15 |
Definition at line 168 of file celleb_scc.h.
#define PEXDADRS_FUNCNO_SHIFT 12 |
Definition at line 169 of file celleb_scc.h.
#define PEXDCMND 0x014 |
Definition at line 133 of file celleb_scc.h.
#define PEXDCMND_BYTE_EN_SHIFT 4 |
Definition at line 172 of file celleb_scc.h.
#define PEXDCMND_CONFIG_READ 0xa |
Definition at line 175 of file celleb_scc.h.
#define PEXDCMND_CONFIG_WRITE 0xb |
Definition at line 176 of file celleb_scc.h.
#define PEXDCMND_IO_READ 0x2 |
Definition at line 173 of file celleb_scc.h.
#define PEXDCMND_IO_WRITE 0x3 |
Definition at line 174 of file celleb_scc.h.
#define PEXDMRDADR0 0x104 |
Definition at line 152 of file celleb_scc.h.
#define PEXDMRDADRX 0x114 |
Definition at line 154 of file celleb_scc.h.
#define PEXDMRDEN0 0x100 |
Definition at line 151 of file celleb_scc.h.
#define PEXDMRDENX 0x110 |
Definition at line 153 of file celleb_scc.h.
#define PEXDRDATA 0x01c |
Definition at line 135 of file celleb_scc.h.
#define PEXDWDATA 0x018 |
Definition at line 134 of file celleb_scc.h.
#define PEXECMODE 0xf00 |
Definition at line 155 of file celleb_scc.h.
#define PEXECMODE_ALL_16BIT 0x00aa02aa |
Definition at line 184 of file celleb_scc.h.
#define PEXECMODE_ALL_8BIT 0x00550155 |
Definition at line 183 of file celleb_scc.h.
#define PEXECMODE_ALL_THROUGH 0x00000000 |
Definition at line 182 of file celleb_scc.h.
#define PEXINTMASK 0x028 |
Definition at line 138 of file celleb_scc.h.
#define PEXINTSTS 0x02c |
Definition at line 139 of file celleb_scc.h.
#define PEXLENERRIDA 0x068 |
Definition at line 149 of file celleb_scc.h.
#define PEXMAEA | ( | n | ) | (0xf50 + (8 * n)) |
Definition at line 156 of file celleb_scc.h.
#define PEXMAEC | ( | n | ) | (0xf54 + (8 * n)) |
Definition at line 157 of file celleb_scc.h.
#define PEXPHYPLLST 0x070 |
Definition at line 150 of file celleb_scc.h.
#define PEXPHYPLLST_PEXPHYAPLLST 0x00000001 |
Definition at line 179 of file celleb_scc.h.
#define PEXPRERRID01 0x048 |
Definition at line 144 of file celleb_scc.h.
#define PEXPRERRID23 0x04c |
Definition at line 145 of file celleb_scc.h.
#define PEXPRERRMASK 0x040 |
Definition at line 142 of file celleb_scc.h.
#define PEXPRERRSTS 0x044 |
Definition at line 143 of file celleb_scc.h.
#define PEXRCVCPLIDA 0x060 |
Definition at line 148 of file celleb_scc.h.
#define PEXREQID 0x020 |
Definition at line 136 of file celleb_scc.h.
#define PEXSKPCTRL 0x708 |
Definition at line 213 of file celleb_scc.h.
#define PEXTAMAPB | ( | n | ) | (PEXTAMAPB0 + 8 * (n)) |
Definition at line 196 of file celleb_scc.h.
#define PEXTAMAPB0 0x220 |
Definition at line 194 of file celleb_scc.h.
#define PEXTAMAPL | ( | n | ) | (PEXTAMAPL0 + 8 * (n)) |
Definition at line 197 of file celleb_scc.h.
#define PEXTAMAPL0 0x224 |
Definition at line 195 of file celleb_scc.h.
#define PEXTCERRCHK 0x21c |
Definition at line 193 of file celleb_scc.h.
#define PEXTIDMAP 0x024 |
Definition at line 137 of file celleb_scc.h.
#define PEXTSCTRL 0x700 |
Definition at line 211 of file celleb_scc.h.
#define PEXTSSTS 0x704 |
Definition at line 212 of file celleb_scc.h.
#define PEXVDMASK 0x050 |
Definition at line 146 of file celleb_scc.h.
#define PEXVDSTS 0x054 |
Definition at line 147 of file celleb_scc.h.
#define SCC_EPCI_ABTSET 0x80c |
Definition at line 54 of file celleb_scc.h.
#define SCC_EPCI_BAM0 0x12c |
Definition at line 47 of file celleb_scc.h.
#define SCC_EPCI_BAM1 0x134 |
Definition at line 48 of file celleb_scc.h.
#define SCC_EPCI_BAM2 0x13c |
Definition at line 49 of file celleb_scc.h.
#define SCC_EPCI_CKCTRL 0xff0 |
Definition at line 66 of file celleb_scc.h.
#define SCC_EPCI_CKCTRL_CRST0 0x00010000 |
Definition at line 117 of file celleb_scc.h.
#define SCC_EPCI_CKCTRL_CRST1 0x00020000 |
Definition at line 118 of file celleb_scc.h.
#define SCC_EPCI_CKCTRL_LCLKEN 0x00000001 |
Definition at line 120 of file celleb_scc.h.
#define SCC_EPCI_CKCTRL_OCLKEN 0x00000100 |
Definition at line 119 of file celleb_scc.h.
#define SCC_EPCI_CLKRST 0x800 |
Definition at line 51 of file celleb_scc.h.
#define SCC_EPCI_CLKRST_BC 0x00000200 |
Definition at line 94 of file celleb_scc.h.
#define SCC_EPCI_CLKRST_CKS_2 0x00000000 |
Definition at line 90 of file celleb_scc.h.
#define SCC_EPCI_CLKRST_CKS_4 0x00010000 |
Definition at line 91 of file celleb_scc.h.
#define SCC_EPCI_CLKRST_CKS_8 0x00020000 |
Definition at line 92 of file celleb_scc.h.
#define SCC_EPCI_CLKRST_CKS_MASK 0x00030000 |
Definition at line 89 of file celleb_scc.h.
#define SCC_EPCI_CLKRST_PCICRST 0x00000400 |
Definition at line 93 of file celleb_scc.h.
#define SCC_EPCI_CLKRST_PCIRST 0x00000100 |
Definition at line 95 of file celleb_scc.h.
#define SCC_EPCI_CLKRST_PCKEN 0x00000001 |
Definition at line 96 of file celleb_scc.h.
#define SCC_EPCI_CNF10_REG 0x010 |
Definition at line 37 of file celleb_scc.h.
#define SCC_EPCI_CNF14_REG 0x014 |
Definition at line 38 of file celleb_scc.h.
#define SCC_EPCI_CNF18_REG 0x018 |
Definition at line 39 of file celleb_scc.h.
#define SCC_EPCI_CNTOPT 0x81c |
Definition at line 58 of file celleb_scc.h.
#define SCC_EPCI_CNTOPT_O2PMB 0x00000002 |
Definition at line 126 of file celleb_scc.h.
#define SCC_EPCI_DUMYRADR 0x814 |
Definition at line 56 of file celleb_scc.h.
#define SCC_EPCI_ECMODE 0xf00 |
Definition at line 59 of file celleb_scc.h.
#define SCC_EPCI_IADR 0x164 |
Definition at line 50 of file celleb_scc.h.
#define SCC_EPCI_IDSEL_AD_TO_SLOT | ( | ad | ) | ((ad) - 10) |
Definition at line 122 of file celleb_scc.h.
#define SCC_EPCI_INT_1M 0x00000100 |
Definition at line 106 of file celleb_scc.h.
#define SCC_EPCI_INT_2M 0x01000000 |
Definition at line 99 of file celleb_scc.h.
#define SCC_EPCI_INT_ALL 0x003f001f |
Definition at line 113 of file celleb_scc.h.
#define SCC_EPCI_INT_ALLERR 0x003f0000 |
Definition at line 114 of file celleb_scc.h.
#define SCC_EPCI_INT_DEVINT 0x0000000f |
Definition at line 112 of file celleb_scc.h.
#define SCC_EPCI_INT_INTA 0x00000001 |
Definition at line 111 of file celleb_scc.h.
#define SCC_EPCI_INT_INTB 0x00000002 |
Definition at line 110 of file celleb_scc.h.
#define SCC_EPCI_INT_INTC 0x00000004 |
Definition at line 109 of file celleb_scc.h.
#define SCC_EPCI_INT_INTD 0x00000008 |
Definition at line 108 of file celleb_scc.h.
#define SCC_EPCI_INT_PAI 0x00010000 |
Definition at line 105 of file celleb_scc.h.
#define SCC_EPCI_INT_PER 0x00020000 |
Definition at line 104 of file celleb_scc.h.
#define SCC_EPCI_INT_PME 0x00000010 |
Definition at line 107 of file celleb_scc.h.
#define SCC_EPCI_INT_PRTER 0x00080000 |
Definition at line 102 of file celleb_scc.h.
#define SCC_EPCI_INT_RERR 0x00200000 |
Definition at line 100 of file celleb_scc.h.
#define SCC_EPCI_INT_SER 0x00040000 |
Definition at line 103 of file celleb_scc.h.
#define SCC_EPCI_INT_SERR 0x00100000 |
Definition at line 101 of file celleb_scc.h.
#define SCC_EPCI_INTSET 0x804 |
Definition at line 52 of file celleb_scc.h.
#define SCC_EPCI_IOM_AC_NUM 5 |
Definition at line 60 of file celleb_scc.h.
#define SCC_EPCI_IOM_ACTE | ( | n | ) | (0xf10 + (n) * 4) |
Definition at line 61 of file celleb_scc.h.
#define SCC_EPCI_IOT_AC_NUM 4 |
Definition at line 62 of file celleb_scc.h.
#define SCC_EPCI_IOT_ACTE | ( | n | ) | (0xf30 + (n) * 4) |
Definition at line 63 of file celleb_scc.h.
#define SCC_EPCI_MAEA 0xf50 |
Definition at line 64 of file celleb_scc.h.
#define SCC_EPCI_MAEC 0xf54 |
Definition at line 65 of file celleb_scc.h.
#define SCC_EPCI_MAX_DEVNU SCC_EPCI_IDSEL_AD_TO_SLOT(32) |
Definition at line 123 of file celleb_scc.h.
#define SCC_EPCI_PVBAT 0x100 |
Definition at line 40 of file celleb_scc.h.
#define SCC_EPCI_REG 0x0000d000 |
Definition at line 34 of file celleb_scc.h.
#define SCC_EPCI_STATUS 0x808 |
Definition at line 53 of file celleb_scc.h.
#define SCC_EPCI_SWRESP 0x818 |
Definition at line 57 of file celleb_scc.h.
#define SCC_EPCI_VCSR 0x110 |
Definition at line 43 of file celleb_scc.h.
#define SCC_EPCI_VCSR_AT 0x00000004 |
Definition at line 73 of file celleb_scc.h.
#define SCC_EPCI_VCSR_DR 0x00000400 |
Definition at line 71 of file celleb_scc.h.
#define SCC_EPCI_VCSR_FRE 0x00020000 |
Definition at line 69 of file celleb_scc.h.
#define SCC_EPCI_VCSR_FWE 0x00010000 |
Definition at line 70 of file celleb_scc.h.
#define SCC_EPCI_VCSR_SR 0x00000008 |
Definition at line 72 of file celleb_scc.h.
#define SCC_EPCI_VIENAB 0x114 |
Definition at line 44 of file celleb_scc.h.
#define SCC_EPCI_VIENAB_ALL 0x0000000f |
Definition at line 86 of file celleb_scc.h.
#define SCC_EPCI_VIENAB_PMFEE 0x00000004 |
Definition at line 83 of file celleb_scc.h.
#define SCC_EPCI_VIENAB_PMPEE 0x00000008 |
Definition at line 82 of file celleb_scc.h.
#define SCC_EPCI_VIENAB_PRA 0x00000002 |
Definition at line 84 of file celleb_scc.h.
#define SCC_EPCI_VIENAB_PRD 0x00000001 |
Definition at line 85 of file celleb_scc.h.
#define SCC_EPCI_VISTAT 0x118 |
Definition at line 45 of file celleb_scc.h.
#define SCC_EPCI_VISTAT_ALL 0x0000000f |
Definition at line 80 of file celleb_scc.h.
#define SCC_EPCI_VISTAT_PMFE 0x00000004 |
Definition at line 77 of file celleb_scc.h.
#define SCC_EPCI_VISTAT_PMPE 0x00000008 |
Definition at line 76 of file celleb_scc.h.
#define SCC_EPCI_VISTAT_PRA 0x00000002 |
Definition at line 78 of file celleb_scc.h.
#define SCC_EPCI_VISTAT_PRD 0x00000001 |
Definition at line 79 of file celleb_scc.h.
#define SCC_EPCI_VPIBAT 0x108 |
Definition at line 42 of file celleb_scc.h.
#define SCC_EPCI_VPMBAT 0x104 |
Definition at line 41 of file celleb_scc.h.
#define SCC_EPCI_VRDCOUNT 0x124 |
Definition at line 46 of file celleb_scc.h.
#define SCC_EPCI_WATRP 0x810 |
Definition at line 55 of file celleb_scc.h.
#define SCC_UHC_CKRCTRL 0xff0 |
Definition at line 216 of file celleb_scc.h.
#define SCC_UHC_ECMODE 0xf00 |
Definition at line 217 of file celleb_scc.h.
#define SCC_UHC_ECMODE_BY_BYTE 0x00000555 |
Definition at line 229 of file celleb_scc.h.
#define SCC_UHC_ECMODE_BY_WORD 0x00000aaa |
Definition at line 230 of file celleb_scc.h.
#define SCC_UHC_F48MCKLEN 0x00000001 |
Definition at line 220 of file celleb_scc.h.
#define SCC_UHC_HCLKEN 0x00000100 |
Definition at line 223 of file celleb_scc.h.
#define SCC_UHC_P_SUSPEND 0x00000002 |
Definition at line 221 of file celleb_scc.h.
#define SCC_UHC_PHY_SUSPEND_SEL 0x00000004 |
Definition at line 222 of file celleb_scc.h.
#define SCC_UHC_PHYEN 0x00040000 |
Definition at line 226 of file celleb_scc.h.
#define SCC_UHC_USBCEN 0x00020000 |
Definition at line 225 of file celleb_scc.h.
#define SCC_UHC_USBEN 0x00010000 |
Definition at line 224 of file celleb_scc.h.