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cirrus_drv.h
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1 /*
2  * Copyright 2012 Red Hat
3  *
4  * This file is subject to the terms and conditions of the GNU General
5  * Public License version 2. See the file COPYING in the main
6  * directory of this archive for more details.
7  *
8  * Authors: Matthew Garrett
9  * Dave Airlie
10  */
11 #ifndef __CIRRUS_DRV_H__
12 #define __CIRRUS_DRV_H__
13 
14 #include <video/vga.h>
15 
16 #include <drm/drm_fb_helper.h>
17 
18 #include <drm/ttm/ttm_bo_api.h>
19 #include <drm/ttm/ttm_bo_driver.h>
20 #include <drm/ttm/ttm_placement.h>
21 #include <drm/ttm/ttm_memory.h>
22 #include <drm/ttm/ttm_module.h>
23 
24 #define DRIVER_AUTHOR "Matthew Garrett"
25 
26 #define DRIVER_NAME "cirrus"
27 #define DRIVER_DESC "qemu Cirrus emulation"
28 #define DRIVER_DATE "20110418"
29 
30 #define DRIVER_MAJOR 1
31 #define DRIVER_MINOR 0
32 #define DRIVER_PATCHLEVEL 0
33 
34 #define CIRRUSFB_CONN_LIMIT 1
35 
36 #define RREG8(reg) ioread8(((void __iomem *)cdev->rmmio) + (reg))
37 #define WREG8(reg, v) iowrite8(v, ((void __iomem *)cdev->rmmio) + (reg))
38 #define RREG32(reg) ioread32(((void __iomem *)cdev->rmmio) + (reg))
39 #define WREG32(reg, v) iowrite32(v, ((void __iomem *)cdev->rmmio) + (reg))
40 
41 #define SEQ_INDEX 4
42 #define SEQ_DATA 5
43 
44 #define WREG_SEQ(reg, v) \
45  do { \
46  WREG8(SEQ_INDEX, reg); \
47  WREG8(SEQ_DATA, v); \
48  } while (0) \
49 
50 #define CRT_INDEX 0x14
51 #define CRT_DATA 0x15
52 
53 #define WREG_CRT(reg, v) \
54  do { \
55  WREG8(CRT_INDEX, reg); \
56  WREG8(CRT_DATA, v); \
57  } while (0) \
58 
59 #define GFX_INDEX 0xe
60 #define GFX_DATA 0xf
61 
62 #define WREG_GFX(reg, v) \
63  do { \
64  WREG8(GFX_INDEX, reg); \
65  WREG8(GFX_DATA, v); \
66  } while (0) \
67 
68 /*
69  * Cirrus has a "hidden" DAC register that can be accessed by writing to
70  * the pixel mask register to reset the state, then reading from the register
71  * four times. The next write will then pass to the DAC
72  */
73 #define VGA_DAC_MASK 0x6
74 
75 #define WREG_HDR(v) \
76  do { \
77  RREG8(VGA_DAC_MASK); \
78  RREG8(VGA_DAC_MASK); \
79  RREG8(VGA_DAC_MASK); \
80  RREG8(VGA_DAC_MASK); \
81  WREG8(VGA_DAC_MASK, v); \
82  } while (0) \
83 
84 
85 #define CIRRUS_MAX_FB_HEIGHT 4096
86 #define CIRRUS_MAX_FB_WIDTH 4096
87 
88 #define CIRRUS_DPMS_CLEARED (-1)
89 
90 #define to_cirrus_crtc(x) container_of(x, struct cirrus_crtc, base)
91 #define to_cirrus_encoder(x) container_of(x, struct cirrus_encoder, base)
92 #define to_cirrus_framebuffer(x) container_of(x, struct cirrus_framebuffer, base)
93 
94 struct cirrus_crtc {
95  struct drm_crtc base;
96  u8 lut_r[256], lut_g[256], lut_b[256];
97  int last_dpms;
98  bool enabled;
99 };
100 
101 struct cirrus_fbdev;
102 struct cirrus_mode_info {
103  bool mode_config_initialized;
104  struct cirrus_crtc *crtc;
105  /* pointer to fbdev info structure */
106  struct cirrus_fbdev *gfbdev;
107 };
108 
109 struct cirrus_encoder {
110  struct drm_encoder base;
111  int last_dpms;
112 };
113 
114 struct cirrus_connector {
115  struct drm_connector base;
116 };
117 
118 struct cirrus_framebuffer {
119  struct drm_framebuffer base;
120  struct drm_gem_object *obj;
121 };
122 
123 struct cirrus_mc {
124  resource_size_t vram_size;
125  resource_size_t vram_base;
126 };
127 
128 struct cirrus_device {
129  struct drm_device *dev;
130  unsigned long flags;
131 
132  resource_size_t rmmio_base;
133  resource_size_t rmmio_size;
134  void __iomem *rmmio;
135 
136  struct cirrus_mc mc;
137  struct cirrus_mode_info mode_info;
138 
139  int num_crtc;
140  int fb_mtrr;
141 
142  struct {
143  struct drm_global_reference mem_global_ref;
144  struct ttm_bo_global_ref bo_global_ref;
145  struct ttm_bo_device bdev;
146  } ttm;
147  bool mm_inited;
148 };
149 
150 
151 struct cirrus_fbdev {
152  struct drm_fb_helper helper;
153  struct cirrus_framebuffer gfb;
154  struct list_head fbdev_list;
155  void *sysram;
156  int size;
157 };
158 
159 struct cirrus_bo {
160  struct ttm_buffer_object bo;
161  struct ttm_placement placement;
162  struct ttm_bo_kmap_obj kmap;
163  struct drm_gem_object gem;
164  u32 placements[3];
165  int pin_count;
166 };
167 #define gem_to_cirrus_bo(gobj) container_of((gobj), struct cirrus_bo, gem)
168 
169 static inline struct cirrus_bo *
170 cirrus_bo(struct ttm_buffer_object *bo)
171 {
172  return container_of(bo, struct cirrus_bo, bo);
173 }
174 
175 
176 #define to_cirrus_obj(x) container_of(x, struct cirrus_gem_object, base)
177 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
178 
179  /* cirrus_mode.c */
180 void cirrus_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
181  u16 blue, int regno);
182 void cirrus_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
183  u16 *blue, int regno);
184 
185 
186  /* cirrus_main.c */
187 int cirrus_device_init(struct cirrus_device *cdev,
188  struct drm_device *ddev,
189  struct pci_dev *pdev,
190  uint32_t flags);
191 void cirrus_device_fini(struct cirrus_device *cdev);
192 int cirrus_gem_init_object(struct drm_gem_object *obj);
193 void cirrus_gem_free_object(struct drm_gem_object *obj);
194 int cirrus_dumb_mmap_offset(struct drm_file *file,
195  struct drm_device *dev,
196  uint32_t handle,
197  uint64_t *offset);
198 int cirrus_gem_create(struct drm_device *dev,
199  u32 size, bool iskernel,
200  struct drm_gem_object **obj);
201 int cirrus_dumb_create(struct drm_file *file,
202  struct drm_device *dev,
203  struct drm_mode_create_dumb *args);
204 int cirrus_dumb_destroy(struct drm_file *file,
205  struct drm_device *dev,
206  uint32_t handle);
207 
208 int cirrus_framebuffer_init(struct drm_device *dev,
209  struct cirrus_framebuffer *gfb,
210  struct drm_mode_fb_cmd2 *mode_cmd,
211  struct drm_gem_object *obj);
212 
213  /* cirrus_display.c */
214 int cirrus_modeset_init(struct cirrus_device *cdev);
215 void cirrus_modeset_fini(struct cirrus_device *cdev);
216 
217  /* cirrus_fbdev.c */
218 int cirrus_fbdev_init(struct cirrus_device *cdev);
219 void cirrus_fbdev_fini(struct cirrus_device *cdev);
220 
221 
222 
223  /* cirrus_irq.c */
224 void cirrus_driver_irq_preinstall(struct drm_device *dev);
225 int cirrus_driver_irq_postinstall(struct drm_device *dev);
226 void cirrus_driver_irq_uninstall(struct drm_device *dev);
227 irqreturn_t cirrus_driver_irq_handler(DRM_IRQ_ARGS);
228 
229  /* cirrus_kms.c */
230 int cirrus_driver_load(struct drm_device *dev, unsigned long flags);
231 int cirrus_driver_unload(struct drm_device *dev);
232 extern struct drm_ioctl_desc cirrus_ioctls[];
233 extern int cirrus_max_ioctl;
234 
235 int cirrus_mm_init(struct cirrus_device *cirrus);
236 void cirrus_mm_fini(struct cirrus_device *cirrus);
237 void cirrus_ttm_placement(struct cirrus_bo *bo, int domain);
238 int cirrus_bo_create(struct drm_device *dev, int size, int align,
239  uint32_t flags, struct cirrus_bo **pcirrusbo);
240 int cirrus_mmap(struct file *filp, struct vm_area_struct *vma);
241 int cirrus_bo_reserve(struct cirrus_bo *bo, bool no_wait);
242 void cirrus_bo_unreserve(struct cirrus_bo *bo);
243 int cirrus_bo_push_sysram(struct cirrus_bo *bo);
244 int cirrus_bo_pin(struct cirrus_bo *bo, u32 pl_flag, u64 *gpu_addr);
245 #endif /* __CIRRUS_DRV_H__ */
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