12 #define pr_fmt(fmt) "clk-aux-synth: " fmt
15 #include <linux/slab.h>
30 #define to_clk_aux(_hw) container_of(_hw, struct clk_aux, hw)
44 static unsigned long aux_calc_rate(
struct clk_hw *
hw,
unsigned long prate,
51 return (((prate / 10000) * rtbl[index].
xscale) /
52 (rtbl[index].
yscale * eq)) * 10000;
55 static long clk_aux_round_rate(
struct clk_hw *hw,
unsigned long drate,
65 static unsigned long clk_aux_recalc_rate(
struct clk_hw *hw,
66 unsigned long parent_rate)
70 unsigned long flags = 0;
78 spin_unlock_irqrestore(aux->
lock, flags);
80 eqn = (
val >> aux->
masks->eq_sel_shift) & aux->
masks->eq_sel_mask;
81 if (eqn == aux->
masks->eq1_mask)
85 num = (
val >> aux->
masks->xscale_sel_shift) &
86 aux->
masks->xscale_sel_mask;
90 aux->
masks->yscale_sel_mask;
95 return (((parent_rate / 10000) * num) /
den) * 10000;
99 static int clk_aux_set_rate(
struct clk_hw *hw,
unsigned long drate,
104 unsigned long val, flags = 0;
114 ~(aux->
masks->eq_sel_mask << aux->
masks->eq_sel_shift);
115 val |= (rtbl[
i].
eq & aux->
masks->eq_sel_mask) <<
116 aux->
masks->eq_sel_shift;
117 val &= ~(aux->
masks->xscale_sel_mask << aux->
masks->xscale_sel_shift);
118 val |= (rtbl[
i].
xscale & aux->
masks->xscale_sel_mask) <<
119 aux->
masks->xscale_sel_shift;
120 val &= ~(aux->
masks->yscale_sel_mask << aux->
masks->yscale_sel_shift);
121 val |= (rtbl[
i].
yscale & aux->
masks->yscale_sel_mask) <<
122 aux->
masks->yscale_sel_shift;
123 writel_relaxed(val, aux->
reg);
126 spin_unlock_irqrestore(aux->
lock, flags);
131 static struct clk_ops clk_aux_ops = {
132 .recalc_rate = clk_aux_recalc_rate,
133 .round_rate = clk_aux_round_rate,
134 .set_rate = clk_aux_set_rate,
138 const char *parent_name,
unsigned long flags,
void __iomem *
reg,
143 struct clk_init_data init;
146 if (!aux_name || !parent_name || !reg || !rtbl || !rtbl_cnt) {
147 pr_err(
"Invalid arguments passed");
153 pr_err(
"could not allocate aux clk\n");
159 aux->
masks = &default_aux_masks;
169 init.name = aux_name;
170 init.ops = &clk_aux_ops;
172 init.parent_names = &parent_name;
173 init.num_parents = 1;
176 if (IS_ERR_OR_NULL(clk))
180 struct clk *tgate_clk;
183 aux->
masks->enable_bit, 0, lock);
184 if (IS_ERR_OR_NULL(tgate_clk))
188 *gate_clk = tgate_clk;
195 pr_err(
"clk register failed\n");