Macros
#define	OMAP4430_CM2_BASE 0x4a008000

#define	OMAP44XX_CM2_REGADDR(inst, reg) OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE + (inst) + (reg))

#define	OMAP4430_CM2_OCP_SOCKET_INST 0x0000

#define	OMAP4430_CM2_CKGEN_INST 0x0100

#define	OMAP4430_CM2_ALWAYS_ON_INST 0x0600

#define	OMAP4430_CM2_CORE_INST 0x0700

#define	OMAP4430_CM2_IVAHD_INST 0x0f00

#define	OMAP4430_CM2_CAM_INST 0x1000

#define	OMAP4430_CM2_DSS_INST 0x1100

#define	OMAP4430_CM2_GFX_INST 0x1200

#define	OMAP4430_CM2_L3INIT_INST 0x1300

#define	OMAP4430_CM2_L4PER_INST 0x1400

#define	OMAP4430_CM2_CEFUSE_INST 0x1600

#define	OMAP4430_CM2_RESTORE_INST 0x1e00

#define	OMAP4430_CM2_INSTR_INST 0x1f00

#define	OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS 0x0000

#define	OMAP4430_CM2_CORE_L3_1_CDOFFS 0x0000

#define	OMAP4430_CM2_CORE_L3_2_CDOFFS 0x0100

#define	OMAP4430_CM2_CORE_DUCATI_CDOFFS 0x0200

#define	OMAP4430_CM2_CORE_SDMA_CDOFFS 0x0300

#define	OMAP4430_CM2_CORE_MEMIF_CDOFFS 0x0400

#define	OMAP4430_CM2_CORE_D2D_CDOFFS 0x0500

#define	OMAP4430_CM2_CORE_L4CFG_CDOFFS 0x0600

#define	OMAP4430_CM2_CORE_L3INSTR_CDOFFS 0x0700

#define	OMAP4430_CM2_IVAHD_IVAHD_CDOFFS 0x0000

#define	OMAP4430_CM2_CAM_CAM_CDOFFS 0x0000

#define	OMAP4430_CM2_DSS_DSS_CDOFFS 0x0000

#define	OMAP4430_CM2_GFX_GFX_CDOFFS 0x0000

#define	OMAP4430_CM2_L3INIT_L3INIT_CDOFFS 0x0000

#define	OMAP4430_CM2_L4PER_L4PER_CDOFFS 0x0000

#define	OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180

#define	OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000

#define	OMAP4_REVISION_CM2_OFFSET 0x0000

#define	OMAP4430_REVISION_CM2 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_OCP_SOCKET_INST, 0x0000)

#define	OMAP4_CM_CM2_PROFILING_CLKCTRL_OFFSET 0x0040

#define	OMAP4430_CM_CM2_PROFILING_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_OCP_SOCKET_INST, 0x0040)

#define	OMAP4_CM_CLKSEL_DUCATI_ISS_ROOT_OFFSET 0x0000

#define	OMAP4430_CM_CLKSEL_DUCATI_ISS_ROOT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0000)

#define	OMAP4_CM_CLKSEL_USB_60MHZ_OFFSET 0x0004

#define	OMAP4430_CM_CLKSEL_USB_60MHZ OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0004)

#define	OMAP4_CM_SCALE_FCLK_OFFSET 0x0008

#define	OMAP4430_CM_SCALE_FCLK OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0008)

#define	OMAP4_CM_CORE_DVFS_PERF1_OFFSET 0x0010

#define	OMAP4430_CM_CORE_DVFS_PERF1 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0010)

#define	OMAP4_CM_CORE_DVFS_PERF2_OFFSET 0x0014

#define	OMAP4430_CM_CORE_DVFS_PERF2 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0014)

#define	OMAP4_CM_CORE_DVFS_PERF3_OFFSET 0x0018

#define	OMAP4430_CM_CORE_DVFS_PERF3 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0018)

#define	OMAP4_CM_CORE_DVFS_PERF4_OFFSET 0x001c

#define	OMAP4430_CM_CORE_DVFS_PERF4 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x001c)

#define	OMAP4_CM_CORE_DVFS_CURRENT_OFFSET 0x0024

#define	OMAP4430_CM_CORE_DVFS_CURRENT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0024)

#define	OMAP4_CM_IVA_DVFS_PERF_TESLA_OFFSET 0x0028

#define	OMAP4430_CM_IVA_DVFS_PERF_TESLA OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0028)

#define	OMAP4_CM_IVA_DVFS_PERF_IVAHD_OFFSET 0x002c

#define	OMAP4430_CM_IVA_DVFS_PERF_IVAHD OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x002c)

#define	OMAP4_CM_IVA_DVFS_PERF_ABE_OFFSET 0x0030

#define	OMAP4430_CM_IVA_DVFS_PERF_ABE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0030)

#define	OMAP4_CM_IVA_DVFS_CURRENT_OFFSET 0x0038

#define	OMAP4430_CM_IVA_DVFS_CURRENT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0038)

#define	OMAP4_CM_CLKMODE_DPLL_PER_OFFSET 0x0040

#define	OMAP4430_CM_CLKMODE_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0040)

#define	OMAP4_CM_IDLEST_DPLL_PER_OFFSET 0x0044

#define	OMAP4430_CM_IDLEST_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0044)

#define	OMAP4_CM_AUTOIDLE_DPLL_PER_OFFSET 0x0048

#define	OMAP4430_CM_AUTOIDLE_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0048)

#define	OMAP4_CM_CLKSEL_DPLL_PER_OFFSET 0x004c

#define	OMAP4430_CM_CLKSEL_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x004c)

#define	OMAP4_CM_DIV_M2_DPLL_PER_OFFSET 0x0050

#define	OMAP4430_CM_DIV_M2_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0050)

#define	OMAP4_CM_DIV_M3_DPLL_PER_OFFSET 0x0054

#define	OMAP4430_CM_DIV_M3_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0054)

#define	OMAP4_CM_DIV_M4_DPLL_PER_OFFSET 0x0058

#define	OMAP4430_CM_DIV_M4_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0058)

#define	OMAP4_CM_DIV_M5_DPLL_PER_OFFSET 0x005c

#define	OMAP4430_CM_DIV_M5_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x005c)

#define	OMAP4_CM_DIV_M6_DPLL_PER_OFFSET 0x0060

#define	OMAP4430_CM_DIV_M6_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0060)

#define	OMAP4_CM_DIV_M7_DPLL_PER_OFFSET 0x0064

#define	OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064)

#define	OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET 0x0068

#define	OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068)

#define	OMAP4_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET 0x006c

#define	OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c)

#define	OMAP4_CM_CLKMODE_DPLL_USB_OFFSET 0x0080

#define	OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080)

#define	OMAP4_CM_IDLEST_DPLL_USB_OFFSET 0x0084

#define	OMAP4430_CM_IDLEST_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0084)

#define	OMAP4_CM_AUTOIDLE_DPLL_USB_OFFSET 0x0088

#define	OMAP4430_CM_AUTOIDLE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0088)

#define	OMAP4_CM_CLKSEL_DPLL_USB_OFFSET 0x008c

#define	OMAP4430_CM_CLKSEL_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x008c)

#define	OMAP4_CM_DIV_M2_DPLL_USB_OFFSET 0x0090

#define	OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090)

#define	OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET 0x00a8

#define	OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8)

#define	OMAP4_CM_SSC_MODFREQDIV_DPLL_USB_OFFSET 0x00ac

#define	OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac)

#define	OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET 0x00b4

#define	OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4)

#define	OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET 0x00c0

#define	OMAP4430_CM_CLKMODE_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c0)

#define	OMAP4_CM_IDLEST_DPLL_UNIPRO_OFFSET 0x00c4

#define	OMAP4430_CM_IDLEST_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c4)

#define	OMAP4_CM_AUTOIDLE_DPLL_UNIPRO_OFFSET 0x00c8

#define	OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c8)

#define	OMAP4_CM_CLKSEL_DPLL_UNIPRO_OFFSET 0x00cc

#define	OMAP4430_CM_CLKSEL_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00cc)

#define	OMAP4_CM_DIV_M2_DPLL_UNIPRO_OFFSET 0x00d0

#define	OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0)

#define	OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET 0x00e8

#define	OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8)

#define	OMAP4_CM_SSC_MODFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec

#define	OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec)

#define	OMAP4_CM_ALWON_CLKSTCTRL_OFFSET 0x0000

#define	OMAP4430_CM_ALWON_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0000)

#define	OMAP4_CM_ALWON_MDMINTC_CLKCTRL_OFFSET 0x0020

#define	OMAP4430_CM_ALWON_MDMINTC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0020)

#define	OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET 0x0028

#define	OMAP4430_CM_ALWON_SR_MPU_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0028)

#define	OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET 0x0030

#define	OMAP4430_CM_ALWON_SR_IVA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0030)

#define	OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET 0x0038

#define	OMAP4430_CM_ALWON_SR_CORE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0038)

#define	OMAP4_CM_ALWON_USBPHY_CLKCTRL_OFFSET 0x0040

#define	OMAP4430_CM_ALWON_USBPHY_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0040)

#define	OMAP4_CM_L3_1_CLKSTCTRL_OFFSET 0x0000

#define	OMAP4430_CM_L3_1_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0000)

#define	OMAP4_CM_L3_1_DYNAMICDEP_OFFSET 0x0008

#define	OMAP4430_CM_L3_1_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0008)

#define	OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET 0x0020

#define	OMAP4430_CM_L3_1_L3_1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0020)

#define	OMAP4_CM_L3_2_CLKSTCTRL_OFFSET 0x0100

#define	OMAP4430_CM_L3_2_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0100)

#define	OMAP4_CM_L3_2_DYNAMICDEP_OFFSET 0x0108

#define	OMAP4430_CM_L3_2_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0108)

#define	OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET 0x0120

#define	OMAP4430_CM_L3_2_L3_2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0120)

#define	OMAP4_CM_L3_2_GPMC_CLKCTRL_OFFSET 0x0128

#define	OMAP4430_CM_L3_2_GPMC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0128)

#define	OMAP4_CM_L3_2_OCMC_RAM_CLKCTRL_OFFSET 0x0130

#define	OMAP4430_CM_L3_2_OCMC_RAM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0130)

#define	OMAP4_CM_DUCATI_CLKSTCTRL_OFFSET 0x0200

#define	OMAP4430_CM_DUCATI_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0200)

#define	OMAP4_CM_DUCATI_STATICDEP_OFFSET 0x0204

#define	OMAP4430_CM_DUCATI_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0204)

#define	OMAP4_CM_DUCATI_DYNAMICDEP_OFFSET 0x0208

#define	OMAP4430_CM_DUCATI_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0208)

#define	OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET 0x0220

#define	OMAP4430_CM_DUCATI_DUCATI_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0220)

#define	OMAP4_CM_SDMA_CLKSTCTRL_OFFSET 0x0300

#define	OMAP4430_CM_SDMA_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0300)

#define	OMAP4_CM_SDMA_STATICDEP_OFFSET 0x0304

#define	OMAP4430_CM_SDMA_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0304)

#define	OMAP4_CM_SDMA_DYNAMICDEP_OFFSET 0x0308

#define	OMAP4430_CM_SDMA_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0308)

#define	OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET 0x0320

#define	OMAP4430_CM_SDMA_SDMA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0320)

#define	OMAP4_CM_MEMIF_CLKSTCTRL_OFFSET 0x0400

#define	OMAP4430_CM_MEMIF_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0400)

#define	OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET 0x0420

#define	OMAP4430_CM_MEMIF_DMM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0420)

#define	OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET 0x0428

#define	OMAP4430_CM_MEMIF_EMIF_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0428)

#define	OMAP4_CM_MEMIF_EMIF_1_CLKCTRL_OFFSET 0x0430

#define	OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0430)

#define	OMAP4_CM_MEMIF_EMIF_2_CLKCTRL_OFFSET 0x0438

#define	OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0438)

#define	OMAP4_CM_MEMIF_DLL_CLKCTRL_OFFSET 0x0440

#define	OMAP4430_CM_MEMIF_DLL_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0440)

#define	OMAP4_CM_MEMIF_EMIF_H1_CLKCTRL_OFFSET 0x0450

#define	OMAP4430_CM_MEMIF_EMIF_H1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0450)

#define	OMAP4_CM_MEMIF_EMIF_H2_CLKCTRL_OFFSET 0x0458

#define	OMAP4430_CM_MEMIF_EMIF_H2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0458)

#define	OMAP4_CM_MEMIF_DLL_H_CLKCTRL_OFFSET 0x0460

#define	OMAP4430_CM_MEMIF_DLL_H_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0460)

#define	OMAP4_CM_D2D_CLKSTCTRL_OFFSET 0x0500

#define	OMAP4430_CM_D2D_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0500)

#define	OMAP4_CM_D2D_STATICDEP_OFFSET 0x0504

#define	OMAP4430_CM_D2D_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0504)

#define	OMAP4_CM_D2D_DYNAMICDEP_OFFSET 0x0508

#define	OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508)

#define	OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET 0x0520

#define	OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520)

#define	OMAP4_CM_D2D_MODEM_ICR_CLKCTRL_OFFSET 0x0528

#define	OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528)

#define	OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET 0x0530

#define	OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530)

#define	OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET 0x0600

#define	OMAP4430_CM_L4CFG_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0600)

#define	OMAP4_CM_L4CFG_DYNAMICDEP_OFFSET 0x0608

#define	OMAP4430_CM_L4CFG_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0608)

#define	OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET 0x0620

#define	OMAP4430_CM_L4CFG_L4_CFG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0620)

#define	OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET 0x0628

#define	OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0628)

#define	OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET 0x0630

#define	OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0630)

#define	OMAP4_CM_L4CFG_SAR_ROM_CLKCTRL_OFFSET 0x0638

#define	OMAP4430_CM_L4CFG_SAR_ROM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0638)

#define	OMAP4_CM_L3INSTR_CLKSTCTRL_OFFSET 0x0700

#define	OMAP4430_CM_L3INSTR_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0700)

#define	OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET 0x0720

#define	OMAP4430_CM_L3INSTR_L3_3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0720)

#define	OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET 0x0728

#define	OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0728)

#define	OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_OFFSET 0x0740

#define	OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0740)

#define	OMAP4_CM_IVAHD_CLKSTCTRL_OFFSET 0x0000

#define	OMAP4430_CM_IVAHD_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0000)

#define	OMAP4_CM_IVAHD_STATICDEP_OFFSET 0x0004

#define	OMAP4430_CM_IVAHD_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0004)

#define	OMAP4_CM_IVAHD_DYNAMICDEP_OFFSET 0x0008

#define	OMAP4430_CM_IVAHD_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0008)

#define	OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET 0x0020

#define	OMAP4430_CM_IVAHD_IVAHD_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0020)

#define	OMAP4_CM_IVAHD_SL2_CLKCTRL_OFFSET 0x0028

#define	OMAP4430_CM_IVAHD_SL2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0028)

#define	OMAP4_CM_CAM_CLKSTCTRL_OFFSET 0x0000

#define	OMAP4430_CM_CAM_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0000)

#define	OMAP4_CM_CAM_STATICDEP_OFFSET 0x0004

#define	OMAP4430_CM_CAM_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0004)

#define	OMAP4_CM_CAM_DYNAMICDEP_OFFSET 0x0008

#define	OMAP4430_CM_CAM_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0008)

#define	OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET 0x0020

#define	OMAP4430_CM_CAM_ISS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0020)

#define	OMAP4_CM_CAM_FDIF_CLKCTRL_OFFSET 0x0028

#define	OMAP4430_CM_CAM_FDIF_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0028)

#define	OMAP4_CM_DSS_CLKSTCTRL_OFFSET 0x0000

#define	OMAP4430_CM_DSS_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0000)

#define	OMAP4_CM_DSS_STATICDEP_OFFSET 0x0004

#define	OMAP4430_CM_DSS_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0004)

#define	OMAP4_CM_DSS_DYNAMICDEP_OFFSET 0x0008

#define	OMAP4430_CM_DSS_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0008)

#define	OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET 0x0020

#define	OMAP4430_CM_DSS_DSS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0020)

#define	OMAP4_CM_DSS_DEISS_CLKCTRL_OFFSET 0x0028

#define	OMAP4430_CM_DSS_DEISS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0028)

#define	OMAP4_CM_GFX_CLKSTCTRL_OFFSET 0x0000

#define	OMAP4430_CM_GFX_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0000)

#define	OMAP4_CM_GFX_STATICDEP_OFFSET 0x0004

#define	OMAP4430_CM_GFX_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0004)

#define	OMAP4_CM_GFX_DYNAMICDEP_OFFSET 0x0008

#define	OMAP4430_CM_GFX_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0008)

#define	OMAP4_CM_GFX_GFX_CLKCTRL_OFFSET 0x0020

#define	OMAP4430_CM_GFX_GFX_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0020)

#define	OMAP4_CM_L3INIT_CLKSTCTRL_OFFSET 0x0000

#define	OMAP4430_CM_L3INIT_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0000)

#define	OMAP4_CM_L3INIT_STATICDEP_OFFSET 0x0004

#define	OMAP4430_CM_L3INIT_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0004)

#define	OMAP4_CM_L3INIT_DYNAMICDEP_OFFSET 0x0008

#define	OMAP4430_CM_L3INIT_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0008)

#define	OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET 0x0028

#define	OMAP4430_CM_L3INIT_MMC1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0028)

#define	OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET 0x0030

#define	OMAP4430_CM_L3INIT_MMC2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0030)

#define	OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET 0x0038

#define	OMAP4430_CM_L3INIT_HSI_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0038)

#define	OMAP4_CM_L3INIT_UNIPRO1_CLKCTRL_OFFSET 0x0040

#define	OMAP4430_CM_L3INIT_UNIPRO1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0040)

#define	OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_OFFSET 0x0058

#define	OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0058)

#define	OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET 0x0060

#define	OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0060)

#define	OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_OFFSET 0x0068

#define	OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0068)

#define	OMAP4_CM_L3INIT_P1500_CLKCTRL_OFFSET 0x0078

#define	OMAP4430_CM_L3INIT_P1500_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0078)

#define	OMAP4_CM_L3INIT_EMAC_CLKCTRL_OFFSET 0x0080

#define	OMAP4430_CM_L3INIT_EMAC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0080)

#define	OMAP4_CM_L3INIT_SATA_CLKCTRL_OFFSET 0x0088

#define	OMAP4430_CM_L3INIT_SATA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0088)

#define	OMAP4_CM_L3INIT_TPPSS_CLKCTRL_OFFSET 0x0090

#define	OMAP4430_CM_L3INIT_TPPSS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0090)

#define	OMAP4_CM_L3INIT_PCIESS_CLKCTRL_OFFSET 0x0098

#define	OMAP4430_CM_L3INIT_PCIESS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0098)

#define	OMAP4_CM_L3INIT_CCPTX_CLKCTRL_OFFSET 0x00a8

#define	OMAP4430_CM_L3INIT_CCPTX_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00a8)

#define	OMAP4_CM_L3INIT_XHPI_CLKCTRL_OFFSET 0x00c0

#define	OMAP4430_CM_L3INIT_XHPI_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00c0)

#define	OMAP4_CM_L3INIT_MMC6_CLKCTRL_OFFSET 0x00c8

#define	OMAP4430_CM_L3INIT_MMC6_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00c8)

#define	OMAP4_CM_L3INIT_USB_HOST_FS_CLKCTRL_OFFSET 0x00d0

#define	OMAP4430_CM_L3INIT_USB_HOST_FS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00d0)

#define	OMAP4_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL_OFFSET 0x00e0

#define	OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00e0)

#define	OMAP4_CM_L4PER_CLKSTCTRL_OFFSET 0x0000

#define	OMAP4430_CM_L4PER_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0000)

#define	OMAP4_CM_L4PER_DYNAMICDEP_OFFSET 0x0008

#define	OMAP4430_CM_L4PER_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0008)

#define	OMAP4_CM_L4PER_ADC_CLKCTRL_OFFSET 0x0020

#define	OMAP4430_CM_L4PER_ADC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0020)

#define	OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET 0x0028

#define	OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0028)

#define	OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET 0x0030

#define	OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0030)

#define	OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET 0x0038

#define	OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0038)

#define	OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET 0x0040

#define	OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0040)

#define	OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET 0x0048

#define	OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0048)

#define	OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET 0x0050

#define	OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0050)

#define	OMAP4_CM_L4PER_ELM_CLKCTRL_OFFSET 0x0058

#define	OMAP4430_CM_L4PER_ELM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0058)

#define	OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET 0x0060

#define	OMAP4430_CM_L4PER_GPIO2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0060)

#define	OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET 0x0068

#define	OMAP4430_CM_L4PER_GPIO3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0068)

#define	OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET 0x0070

#define	OMAP4430_CM_L4PER_GPIO4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0070)

#define	OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET 0x0078

#define	OMAP4430_CM_L4PER_GPIO5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0078)

#define	OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET 0x0080

#define	OMAP4430_CM_L4PER_GPIO6_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0080)

#define	OMAP4_CM_L4PER_HDQ1W_CLKCTRL_OFFSET 0x0088

#define	OMAP4430_CM_L4PER_HDQ1W_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0088)

#define	OMAP4_CM_L4PER_HECC1_CLKCTRL_OFFSET 0x0090

#define	OMAP4430_CM_L4PER_HECC1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0090)

#define	OMAP4_CM_L4PER_HECC2_CLKCTRL_OFFSET 0x0098

#define	OMAP4430_CM_L4PER_HECC2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0098)

#define	OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET 0x00a0

#define	OMAP4430_CM_L4PER_I2C1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00a0)

#define	OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET 0x00a8

#define	OMAP4430_CM_L4PER_I2C2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00a8)

#define	OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET 0x00b0

#define	OMAP4430_CM_L4PER_I2C3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00b0)

#define	OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET 0x00b8

#define	OMAP4430_CM_L4PER_I2C4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00b8)

#define	OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET 0x00c0

#define	OMAP4430_CM_L4PER_L4PER_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00c0)

#define	OMAP4_CM_L4PER_MCASP2_CLKCTRL_OFFSET 0x00d0

#define	OMAP4430_CM_L4PER_MCASP2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00d0)

#define	OMAP4_CM_L4PER_MCASP3_CLKCTRL_OFFSET 0x00d8

#define	OMAP4430_CM_L4PER_MCASP3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00d8)

#define	OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET 0x00e0

#define	OMAP4430_CM_L4PER_MCBSP4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00e0)

#define	OMAP4_CM_L4PER_MGATE_CLKCTRL_OFFSET 0x00e8

#define	OMAP4430_CM_L4PER_MGATE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00e8)

#define	OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET 0x00f0

#define	OMAP4430_CM_L4PER_MCSPI1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00f0)

#define	OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET 0x00f8

#define	OMAP4430_CM_L4PER_MCSPI2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00f8)

#define	OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET 0x0100

#define	OMAP4430_CM_L4PER_MCSPI3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0100)

#define	OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET 0x0108

#define	OMAP4430_CM_L4PER_MCSPI4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0108)

#define	OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET 0x0120

#define	OMAP4430_CM_L4PER_MMCSD3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0120)

#define	OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET 0x0128

#define	OMAP4430_CM_L4PER_MMCSD4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0128)

#define	OMAP4_CM_L4PER_MSPROHG_CLKCTRL_OFFSET 0x0130

#define	OMAP4430_CM_L4PER_MSPROHG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0130)

#define	OMAP4_CM_L4PER_SLIMBUS2_CLKCTRL_OFFSET 0x0138

#define	OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0138)

#define	OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET 0x0140

#define	OMAP4430_CM_L4PER_UART1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0140)

#define	OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET 0x0148

#define	OMAP4430_CM_L4PER_UART2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0148)

#define	OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET 0x0150

#define	OMAP4430_CM_L4PER_UART3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0150)

#define	OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET 0x0158

#define	OMAP4430_CM_L4PER_UART4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0158)

#define	OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET 0x0160

#define	OMAP4430_CM_L4PER_MMCSD5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0160)

#define	OMAP4_CM_L4PER_I2C5_CLKCTRL_OFFSET 0x0168

#define	OMAP4430_CM_L4PER_I2C5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0168)

#define	OMAP4_CM_L4SEC_CLKSTCTRL_OFFSET 0x0180

#define	OMAP4430_CM_L4SEC_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0180)

#define	OMAP4_CM_L4SEC_STATICDEP_OFFSET 0x0184

#define	OMAP4430_CM_L4SEC_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0184)

#define	OMAP4_CM_L4SEC_DYNAMICDEP_OFFSET 0x0188

#define	OMAP4430_CM_L4SEC_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0188)

#define	OMAP4_CM_L4SEC_AES1_CLKCTRL_OFFSET 0x01a0

#define	OMAP4430_CM_L4SEC_AES1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01a0)

#define	OMAP4_CM_L4SEC_AES2_CLKCTRL_OFFSET 0x01a8

#define	OMAP4430_CM_L4SEC_AES2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01a8)

#define	OMAP4_CM_L4SEC_DES3DES_CLKCTRL_OFFSET 0x01b0

#define	OMAP4430_CM_L4SEC_DES3DES_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01b0)

#define	OMAP4_CM_L4SEC_PKAEIP29_CLKCTRL_OFFSET 0x01b8

#define	OMAP4430_CM_L4SEC_PKAEIP29_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01b8)

#define	OMAP4_CM_L4SEC_RNG_CLKCTRL_OFFSET 0x01c0

#define	OMAP4430_CM_L4SEC_RNG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01c0)

#define	OMAP4_CM_L4SEC_SHA2MD51_CLKCTRL_OFFSET 0x01c8

#define	OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01c8)

#define	OMAP4_CM_L4SEC_CRYPTODMA_CLKCTRL_OFFSET 0x01d8

#define	OMAP4430_CM_L4SEC_CRYPTODMA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01d8)

#define	OMAP4_CM_CEFUSE_CLKSTCTRL_OFFSET 0x0000

#define	OMAP4430_CM_CEFUSE_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0000)

#define	OMAP4_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET 0x0020

#define	OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0020)

Functions
u32	omap4_cm2_read_inst_reg (s16 inst, u16 idx)

void	omap4_cm2_write_inst_reg (u32 val, s16 inst, u16 idx)

u32	omap4_cm2_rmw_inst_reg_bits (u32 mask, u32 bits, s16 inst, s16 idx)

Macro Definition Documentation

#define OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS 0x0000

Definition at line 50 of file cm2_44xx.h.

#define OMAP4430_CM2_ALWAYS_ON_INST 0x0600

Definition at line 37 of file cm2_44xx.h.

#define OMAP4430_CM2_BASE 0x4a008000

Definition at line 29 of file cm2_44xx.h.

#define OMAP4430_CM2_CAM_CAM_CDOFFS 0x0000

Definition at line 60 of file cm2_44xx.h.

#define OMAP4430_CM2_CAM_INST 0x1000

Definition at line 40 of file cm2_44xx.h.

#define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000

Definition at line 66 of file cm2_44xx.h.

#define OMAP4430_CM2_CEFUSE_INST 0x1600

Definition at line 45 of file cm2_44xx.h.

#define OMAP4430_CM2_CKGEN_INST 0x0100

Definition at line 36 of file cm2_44xx.h.

#define OMAP4430_CM2_CORE_D2D_CDOFFS 0x0500

Definition at line 56 of file cm2_44xx.h.

#define OMAP4430_CM2_CORE_DUCATI_CDOFFS 0x0200

Definition at line 53 of file cm2_44xx.h.

#define OMAP4430_CM2_CORE_INST 0x0700

Definition at line 38 of file cm2_44xx.h.

#define OMAP4430_CM2_CORE_L3_1_CDOFFS 0x0000

Definition at line 51 of file cm2_44xx.h.

#define OMAP4430_CM2_CORE_L3_2_CDOFFS 0x0100

Definition at line 52 of file cm2_44xx.h.

#define OMAP4430_CM2_CORE_L3INSTR_CDOFFS 0x0700

Definition at line 58 of file cm2_44xx.h.

#define OMAP4430_CM2_CORE_L4CFG_CDOFFS 0x0600

Definition at line 57 of file cm2_44xx.h.

#define OMAP4430_CM2_CORE_MEMIF_CDOFFS 0x0400

Definition at line 55 of file cm2_44xx.h.

#define OMAP4430_CM2_CORE_SDMA_CDOFFS 0x0300

Definition at line 54 of file cm2_44xx.h.

#define OMAP4430_CM2_DSS_DSS_CDOFFS 0x0000

Definition at line 61 of file cm2_44xx.h.

#define OMAP4430_CM2_DSS_INST 0x1100

Definition at line 41 of file cm2_44xx.h.

#define OMAP4430_CM2_GFX_GFX_CDOFFS 0x0000

Definition at line 62 of file cm2_44xx.h.

#define OMAP4430_CM2_GFX_INST 0x1200

Definition at line 42 of file cm2_44xx.h.

#define OMAP4430_CM2_INSTR_INST 0x1f00

Definition at line 47 of file cm2_44xx.h.

#define OMAP4430_CM2_IVAHD_INST 0x0f00

Definition at line 39 of file cm2_44xx.h.

#define OMAP4430_CM2_IVAHD_IVAHD_CDOFFS 0x0000

Definition at line 59 of file cm2_44xx.h.

#define OMAP4430_CM2_L3INIT_INST 0x1300

Definition at line 43 of file cm2_44xx.h.

#define OMAP4430_CM2_L3INIT_L3INIT_CDOFFS 0x0000

Definition at line 63 of file cm2_44xx.h.

#define OMAP4430_CM2_L4PER_INST 0x1400

Definition at line 44 of file cm2_44xx.h.

#define OMAP4430_CM2_L4PER_L4PER_CDOFFS 0x0000

Definition at line 64 of file cm2_44xx.h.

#define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180

Definition at line 65 of file cm2_44xx.h.

#define OMAP4430_CM2_OCP_SOCKET_INST 0x0000

Definition at line 35 of file cm2_44xx.h.

#define OMAP4430_CM2_RESTORE_INST 0x1e00

Definition at line 46 of file cm2_44xx.h.

#define OMAP4430_CM_ALWON_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0000)

Definition at line 158 of file cm2_44xx.h.

#define OMAP4430_CM_ALWON_MDMINTC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0020)

Definition at line 160 of file cm2_44xx.h.

#define OMAP4430_CM_ALWON_SR_CORE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0038)

Definition at line 166 of file cm2_44xx.h.

#define OMAP4430_CM_ALWON_SR_IVA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0030)

Definition at line 164 of file cm2_44xx.h.

#define OMAP4430_CM_ALWON_SR_MPU_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0028)

Definition at line 162 of file cm2_44xx.h.

#define OMAP4430_CM_ALWON_USBPHY_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_ALWAYS_ON_INST, 0x0040)

Definition at line 168 of file cm2_44xx.h.

#define OMAP4430_CM_AUTOIDLE_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0048)

Definition at line 106 of file cm2_44xx.h.

#define OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c8)

Definition at line 146 of file cm2_44xx.h.

#define OMAP4430_CM_AUTOIDLE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0088)

Definition at line 130 of file cm2_44xx.h.

#define OMAP4430_CM_CAM_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0000)

Definition at line 268 of file cm2_44xx.h.

#define OMAP4430_CM_CAM_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0008)

Definition at line 272 of file cm2_44xx.h.

#define OMAP4430_CM_CAM_FDIF_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0028)

Definition at line 276 of file cm2_44xx.h.

#define OMAP4430_CM_CAM_ISS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0020)

Definition at line 274 of file cm2_44xx.h.

#define OMAP4430_CM_CAM_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CAM_INST, 0x0004)

Definition at line 270 of file cm2_44xx.h.

#define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0020)

Definition at line 450 of file cm2_44xx.h.

#define OMAP4430_CM_CEFUSE_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0000)

Definition at line 448 of file cm2_44xx.h.

#define OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4)

Definition at line 140 of file cm2_44xx.h.

#define OMAP4430_CM_CLKMODE_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0040)

Definition at line 102 of file cm2_44xx.h.

#define OMAP4430_CM_CLKMODE_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c0)

Definition at line 142 of file cm2_44xx.h.

#define OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080)

Definition at line 126 of file cm2_44xx.h.

#define OMAP4430_CM_CLKSEL_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x004c)

Definition at line 108 of file cm2_44xx.h.

#define OMAP4430_CM_CLKSEL_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00cc)

Definition at line 148 of file cm2_44xx.h.

#define OMAP4430_CM_CLKSEL_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x008c)

Definition at line 132 of file cm2_44xx.h.

#define OMAP4430_CM_CLKSEL_DUCATI_ISS_ROOT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0000)

Definition at line 78 of file cm2_44xx.h.

#define OMAP4430_CM_CLKSEL_USB_60MHZ OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0004)

Definition at line 80 of file cm2_44xx.h.

#define OMAP4430_CM_CM2_PROFILING_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_OCP_SOCKET_INST, 0x0040)

Definition at line 74 of file cm2_44xx.h.

#define OMAP4430_CM_CORE_DVFS_CURRENT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0024)

Definition at line 92 of file cm2_44xx.h.

#define OMAP4430_CM_CORE_DVFS_PERF1 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0010)

Definition at line 84 of file cm2_44xx.h.

#define OMAP4430_CM_CORE_DVFS_PERF2 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0014)

Definition at line 86 of file cm2_44xx.h.

#define OMAP4430_CM_CORE_DVFS_PERF3 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0018)

Definition at line 88 of file cm2_44xx.h.

#define OMAP4430_CM_CORE_DVFS_PERF4 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x001c)

Definition at line 90 of file cm2_44xx.h.

#define OMAP4430_CM_D2D_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0500)

Definition at line 222 of file cm2_44xx.h.

#define OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508)

Definition at line 226 of file cm2_44xx.h.

#define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528)

Definition at line 230 of file cm2_44xx.h.

#define OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520)

Definition at line 228 of file cm2_44xx.h.

#define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530)

Definition at line 232 of file cm2_44xx.h.

#define OMAP4430_CM_D2D_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0504)

Definition at line 224 of file cm2_44xx.h.

#define OMAP4430_CM_DIV_M2_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0050)

Definition at line 110 of file cm2_44xx.h.

#define OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0)

Definition at line 150 of file cm2_44xx.h.

#define OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090)

Definition at line 134 of file cm2_44xx.h.

#define OMAP4430_CM_DIV_M3_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0054)

Definition at line 112 of file cm2_44xx.h.

#define OMAP4430_CM_DIV_M4_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0058)

Definition at line 114 of file cm2_44xx.h.

#define OMAP4430_CM_DIV_M5_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x005c)

Definition at line 116 of file cm2_44xx.h.

#define OMAP4430_CM_DIV_M6_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0060)

Definition at line 118 of file cm2_44xx.h.

#define OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064)

Definition at line 120 of file cm2_44xx.h.

#define OMAP4430_CM_DSS_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0000)

Definition at line 280 of file cm2_44xx.h.

#define OMAP4430_CM_DSS_DEISS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0028)

Definition at line 288 of file cm2_44xx.h.

#define OMAP4430_CM_DSS_DSS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0020)

Definition at line 286 of file cm2_44xx.h.

#define OMAP4430_CM_DSS_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0008)

Definition at line 284 of file cm2_44xx.h.

#define OMAP4430_CM_DSS_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_DSS_INST, 0x0004)

Definition at line 282 of file cm2_44xx.h.

#define OMAP4430_CM_DUCATI_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0200)

Definition at line 188 of file cm2_44xx.h.

#define OMAP4430_CM_DUCATI_DUCATI_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0220)

Definition at line 194 of file cm2_44xx.h.

#define OMAP4430_CM_DUCATI_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0208)

Definition at line 192 of file cm2_44xx.h.

#define OMAP4430_CM_DUCATI_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0204)

Definition at line 190 of file cm2_44xx.h.

#define OMAP4430_CM_GFX_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0000)

Definition at line 292 of file cm2_44xx.h.

#define OMAP4430_CM_GFX_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0008)

Definition at line 296 of file cm2_44xx.h.

#define OMAP4430_CM_GFX_GFX_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0020)

Definition at line 298 of file cm2_44xx.h.

#define OMAP4430_CM_GFX_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_GFX_INST, 0x0004)

Definition at line 294 of file cm2_44xx.h.

#define OMAP4430_CM_IDLEST_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0044)

Definition at line 104 of file cm2_44xx.h.

#define OMAP4430_CM_IDLEST_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00c4)

Definition at line 144 of file cm2_44xx.h.

#define OMAP4430_CM_IDLEST_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0084)

Definition at line 128 of file cm2_44xx.h.

#define OMAP4430_CM_IVA_DVFS_CURRENT OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0038)

Definition at line 100 of file cm2_44xx.h.

#define OMAP4430_CM_IVA_DVFS_PERF_ABE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0030)

Definition at line 98 of file cm2_44xx.h.

#define OMAP4430_CM_IVA_DVFS_PERF_IVAHD OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x002c)

Definition at line 96 of file cm2_44xx.h.

#define OMAP4430_CM_IVA_DVFS_PERF_TESLA OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0028)

Definition at line 94 of file cm2_44xx.h.

#define OMAP4430_CM_IVAHD_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0000)

Definition at line 256 of file cm2_44xx.h.

#define OMAP4430_CM_IVAHD_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0008)

Definition at line 260 of file cm2_44xx.h.

#define OMAP4430_CM_IVAHD_IVAHD_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0020)

Definition at line 262 of file cm2_44xx.h.

#define OMAP4430_CM_IVAHD_SL2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0028)

Definition at line 264 of file cm2_44xx.h.

#define OMAP4430_CM_IVAHD_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_IVAHD_INST, 0x0004)

Definition at line 258 of file cm2_44xx.h.

#define OMAP4430_CM_L3_1_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0000)

Definition at line 172 of file cm2_44xx.h.

#define OMAP4430_CM_L3_1_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0008)

Definition at line 174 of file cm2_44xx.h.

#define OMAP4430_CM_L3_1_L3_1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0020)

Definition at line 176 of file cm2_44xx.h.

#define OMAP4430_CM_L3_2_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0100)

Definition at line 178 of file cm2_44xx.h.

#define OMAP4430_CM_L3_2_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0108)

Definition at line 180 of file cm2_44xx.h.

#define OMAP4430_CM_L3_2_GPMC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0128)

Definition at line 184 of file cm2_44xx.h.

#define OMAP4430_CM_L3_2_L3_2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0120)

Definition at line 182 of file cm2_44xx.h.

#define OMAP4430_CM_L3_2_OCMC_RAM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0130)

Definition at line 186 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_CCPTX_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00a8)

Definition at line 332 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0000)

Definition at line 302 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0008)

Definition at line 306 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_EMAC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0080)

Definition at line 324 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_HSI_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0038)

Definition at line 312 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_MMC1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0028)

Definition at line 308 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_MMC2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0030)

Definition at line 310 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_MMC6_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00c8)

Definition at line 336 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_P1500_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0078)

Definition at line 322 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_PCIESS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0098)

Definition at line 330 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_SATA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0088)

Definition at line 326 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0004)

Definition at line 304 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_TPPSS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0090)

Definition at line 328 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_UNIPRO1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0040)

Definition at line 314 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0058)

Definition at line 316 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_USB_HOST_FS_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00d0)

Definition at line 338 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0060)

Definition at line 318 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x0068)

Definition at line 320 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00e0)

Definition at line 340 of file cm2_44xx.h.

#define OMAP4430_CM_L3INIT_XHPI_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L3INIT_INST, 0x00c0)

Definition at line 334 of file cm2_44xx.h.

#define OMAP4430_CM_L3INSTR_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0700)

Definition at line 246 of file cm2_44xx.h.

#define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0720)

Definition at line 248 of file cm2_44xx.h.

#define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0728)

Definition at line 250 of file cm2_44xx.h.

#define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0740)

Definition at line 252 of file cm2_44xx.h.

#define OMAP4430_CM_L4CFG_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0600)

Definition at line 234 of file cm2_44xx.h.

#define OMAP4430_CM_L4CFG_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0608)

Definition at line 236 of file cm2_44xx.h.

#define OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0628)

Definition at line 240 of file cm2_44xx.h.

#define OMAP4430_CM_L4CFG_L4_CFG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0620)

Definition at line 238 of file cm2_44xx.h.

#define OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0630)

Definition at line 242 of file cm2_44xx.h.

#define OMAP4430_CM_L4CFG_SAR_ROM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0638)

Definition at line 244 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_ADC_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0020)

Definition at line 348 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0000)

Definition at line 344 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0028)

Definition at line 350 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0030)

Definition at line 352 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0038)

Definition at line 354 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0040)

Definition at line 356 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0048)

Definition at line 358 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0050)

Definition at line 360 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0008)

Definition at line 346 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_ELM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0058)

Definition at line 362 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_GPIO2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0060)

Definition at line 364 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_GPIO3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0068)

Definition at line 366 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_GPIO4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0070)

Definition at line 368 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_GPIO5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0078)

Definition at line 370 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_GPIO6_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0080)

Definition at line 372 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_HDQ1W_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0088)

Definition at line 374 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_HECC1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0090)

Definition at line 376 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_HECC2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0098)

Definition at line 378 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_I2C1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00a0)

Definition at line 380 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_I2C2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00a8)

Definition at line 382 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_I2C3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00b0)

Definition at line 384 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_I2C4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00b8)

Definition at line 386 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_I2C5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0168)

Definition at line 424 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_L4PER_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00c0)

Definition at line 388 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MCASP2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00d0)

Definition at line 390 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MCASP3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00d8)

Definition at line 392 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MCBSP4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00e0)

Definition at line 394 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MCSPI1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00f0)

Definition at line 398 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MCSPI2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00f8)

Definition at line 400 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MCSPI3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0100)

Definition at line 402 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MCSPI4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0108)

Definition at line 404 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MGATE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x00e8)

Definition at line 396 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MMCSD3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0120)

Definition at line 406 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MMCSD4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0128)

Definition at line 408 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MMCSD5_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0160)

Definition at line 422 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_MSPROHG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0130)

Definition at line 410 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_SLIMBUS2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0138)

Definition at line 412 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_UART1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0140)

Definition at line 414 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_UART2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0148)

Definition at line 416 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_UART3_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0150)

Definition at line 418 of file cm2_44xx.h.

#define OMAP4430_CM_L4PER_UART4_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0158)

Definition at line 420 of file cm2_44xx.h.

#define OMAP4430_CM_L4SEC_AES1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01a0)

Definition at line 432 of file cm2_44xx.h.

#define OMAP4430_CM_L4SEC_AES2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01a8)

Definition at line 434 of file cm2_44xx.h.

#define OMAP4430_CM_L4SEC_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0180)

Definition at line 426 of file cm2_44xx.h.

#define OMAP4430_CM_L4SEC_CRYPTODMA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01d8)

Definition at line 444 of file cm2_44xx.h.

#define OMAP4430_CM_L4SEC_DES3DES_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01b0)

Definition at line 436 of file cm2_44xx.h.

#define OMAP4430_CM_L4SEC_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0188)

Definition at line 430 of file cm2_44xx.h.

#define OMAP4430_CM_L4SEC_PKAEIP29_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01b8)

Definition at line 438 of file cm2_44xx.h.

#define OMAP4430_CM_L4SEC_RNG_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01c0)

Definition at line 440 of file cm2_44xx.h.

#define OMAP4430_CM_L4SEC_SHA2MD51_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x01c8)

Definition at line 442 of file cm2_44xx.h.

#define OMAP4430_CM_L4SEC_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_L4PER_INST, 0x0184)

Definition at line 428 of file cm2_44xx.h.

#define OMAP4430_CM_MEMIF_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0400)

Definition at line 204 of file cm2_44xx.h.

#define OMAP4430_CM_MEMIF_DLL_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0440)

Definition at line 214 of file cm2_44xx.h.

#define OMAP4430_CM_MEMIF_DLL_H_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0460)

Definition at line 220 of file cm2_44xx.h.

#define OMAP4430_CM_MEMIF_DMM_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0420)

Definition at line 206 of file cm2_44xx.h.

#define OMAP4430_CM_MEMIF_EMIF_1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0430)

Definition at line 210 of file cm2_44xx.h.

#define OMAP4430_CM_MEMIF_EMIF_2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0438)

Definition at line 212 of file cm2_44xx.h.

#define OMAP4430_CM_MEMIF_EMIF_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0428)

Definition at line 208 of file cm2_44xx.h.

#define OMAP4430_CM_MEMIF_EMIF_H1_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0450)

Definition at line 216 of file cm2_44xx.h.

#define OMAP4430_CM_MEMIF_EMIF_H2_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0458)

Definition at line 218 of file cm2_44xx.h.

#define OMAP4430_CM_SCALE_FCLK OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0008)

Definition at line 82 of file cm2_44xx.h.

#define OMAP4430_CM_SDMA_CLKSTCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0300)

Definition at line 196 of file cm2_44xx.h.

#define OMAP4430_CM_SDMA_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0308)

Definition at line 200 of file cm2_44xx.h.

#define OMAP4430_CM_SDMA_SDMA_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0320)

Definition at line 202 of file cm2_44xx.h.

#define OMAP4430_CM_SDMA_STATICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0304)

Definition at line 198 of file cm2_44xx.h.

#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068)

Definition at line 122 of file cm2_44xx.h.

#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8)

Definition at line 152 of file cm2_44xx.h.

#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8)

Definition at line 136 of file cm2_44xx.h.

#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c)

Definition at line 124 of file cm2_44xx.h.

#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec)

Definition at line 154 of file cm2_44xx.h.

#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac)

Definition at line 138 of file cm2_44xx.h.

#define OMAP4430_REVISION_CM2 OMAP44XX_CM2_REGADDR(OMAP4430_CM2_OCP_SOCKET_INST, 0x0000)

Definition at line 72 of file cm2_44xx.h.

#define OMAP44XX_CM2_REGADDR	(	inst,
		reg
	)	OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE + (inst) + (reg))

Definition at line 31 of file cm2_44xx.h.

#define OMAP4_CM_ALWON_CLKSTCTRL_OFFSET 0x0000

Definition at line 157 of file cm2_44xx.h.

#define OMAP4_CM_ALWON_MDMINTC_CLKCTRL_OFFSET 0x0020

Definition at line 159 of file cm2_44xx.h.

#define OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET 0x0038

Definition at line 165 of file cm2_44xx.h.

#define OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET 0x0030

Definition at line 163 of file cm2_44xx.h.

#define OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET 0x0028

Definition at line 161 of file cm2_44xx.h.

#define OMAP4_CM_ALWON_USBPHY_CLKCTRL_OFFSET 0x0040

Definition at line 167 of file cm2_44xx.h.

#define OMAP4_CM_AUTOIDLE_DPLL_PER_OFFSET 0x0048

Definition at line 105 of file cm2_44xx.h.

#define OMAP4_CM_AUTOIDLE_DPLL_UNIPRO_OFFSET 0x00c8

Definition at line 145 of file cm2_44xx.h.

#define OMAP4_CM_AUTOIDLE_DPLL_USB_OFFSET 0x0088

Definition at line 129 of file cm2_44xx.h.

#define OMAP4_CM_CAM_CLKSTCTRL_OFFSET 0x0000

Definition at line 267 of file cm2_44xx.h.

#define OMAP4_CM_CAM_DYNAMICDEP_OFFSET 0x0008

Definition at line 271 of file cm2_44xx.h.

#define OMAP4_CM_CAM_FDIF_CLKCTRL_OFFSET 0x0028

Definition at line 275 of file cm2_44xx.h.

#define OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET 0x0020

Definition at line 273 of file cm2_44xx.h.

#define OMAP4_CM_CAM_STATICDEP_OFFSET 0x0004

Definition at line 269 of file cm2_44xx.h.

#define OMAP4_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET 0x0020

Definition at line 449 of file cm2_44xx.h.

#define OMAP4_CM_CEFUSE_CLKSTCTRL_OFFSET 0x0000

Definition at line 447 of file cm2_44xx.h.

#define OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET 0x00b4

Definition at line 139 of file cm2_44xx.h.

#define OMAP4_CM_CLKMODE_DPLL_PER_OFFSET 0x0040

Definition at line 101 of file cm2_44xx.h.

#define OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET 0x00c0

Definition at line 141 of file cm2_44xx.h.

#define OMAP4_CM_CLKMODE_DPLL_USB_OFFSET 0x0080

Definition at line 125 of file cm2_44xx.h.

#define OMAP4_CM_CLKSEL_DPLL_PER_OFFSET 0x004c

Definition at line 107 of file cm2_44xx.h.

#define OMAP4_CM_CLKSEL_DPLL_UNIPRO_OFFSET 0x00cc

Definition at line 147 of file cm2_44xx.h.

#define OMAP4_CM_CLKSEL_DPLL_USB_OFFSET 0x008c

Definition at line 131 of file cm2_44xx.h.

#define OMAP4_CM_CLKSEL_DUCATI_ISS_ROOT_OFFSET 0x0000

Definition at line 77 of file cm2_44xx.h.

#define OMAP4_CM_CLKSEL_USB_60MHZ_OFFSET 0x0004

Definition at line 79 of file cm2_44xx.h.

#define OMAP4_CM_CM2_PROFILING_CLKCTRL_OFFSET 0x0040

Definition at line 73 of file cm2_44xx.h.

#define OMAP4_CM_CORE_DVFS_CURRENT_OFFSET 0x0024

Definition at line 91 of file cm2_44xx.h.

#define OMAP4_CM_CORE_DVFS_PERF1_OFFSET 0x0010

Definition at line 83 of file cm2_44xx.h.

#define OMAP4_CM_CORE_DVFS_PERF2_OFFSET 0x0014

Definition at line 85 of file cm2_44xx.h.

#define OMAP4_CM_CORE_DVFS_PERF3_OFFSET 0x0018

Definition at line 87 of file cm2_44xx.h.

#define OMAP4_CM_CORE_DVFS_PERF4_OFFSET 0x001c

Definition at line 89 of file cm2_44xx.h.

#define OMAP4_CM_D2D_CLKSTCTRL_OFFSET 0x0500

Definition at line 221 of file cm2_44xx.h.

#define OMAP4_CM_D2D_DYNAMICDEP_OFFSET 0x0508

Definition at line 225 of file cm2_44xx.h.

#define OMAP4_CM_D2D_MODEM_ICR_CLKCTRL_OFFSET 0x0528

Definition at line 229 of file cm2_44xx.h.

#define OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET 0x0520

Definition at line 227 of file cm2_44xx.h.

#define OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET 0x0530

Definition at line 231 of file cm2_44xx.h.

#define OMAP4_CM_D2D_STATICDEP_OFFSET 0x0504

Definition at line 223 of file cm2_44xx.h.

#define OMAP4_CM_DIV_M2_DPLL_PER_OFFSET 0x0050

Definition at line 109 of file cm2_44xx.h.

#define OMAP4_CM_DIV_M2_DPLL_UNIPRO_OFFSET 0x00d0

Definition at line 149 of file cm2_44xx.h.

#define OMAP4_CM_DIV_M2_DPLL_USB_OFFSET 0x0090

Definition at line 133 of file cm2_44xx.h.

#define OMAP4_CM_DIV_M3_DPLL_PER_OFFSET 0x0054

Definition at line 111 of file cm2_44xx.h.

#define OMAP4_CM_DIV_M4_DPLL_PER_OFFSET 0x0058

Definition at line 113 of file cm2_44xx.h.

#define OMAP4_CM_DIV_M5_DPLL_PER_OFFSET 0x005c

Definition at line 115 of file cm2_44xx.h.

#define OMAP4_CM_DIV_M6_DPLL_PER_OFFSET 0x0060

Definition at line 117 of file cm2_44xx.h.

#define OMAP4_CM_DIV_M7_DPLL_PER_OFFSET 0x0064

Definition at line 119 of file cm2_44xx.h.

#define OMAP4_CM_DSS_CLKSTCTRL_OFFSET 0x0000

Definition at line 279 of file cm2_44xx.h.

#define OMAP4_CM_DSS_DEISS_CLKCTRL_OFFSET 0x0028

Definition at line 287 of file cm2_44xx.h.

#define OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET 0x0020

Definition at line 285 of file cm2_44xx.h.

#define OMAP4_CM_DSS_DYNAMICDEP_OFFSET 0x0008

Definition at line 283 of file cm2_44xx.h.

#define OMAP4_CM_DSS_STATICDEP_OFFSET 0x0004

Definition at line 281 of file cm2_44xx.h.

#define OMAP4_CM_DUCATI_CLKSTCTRL_OFFSET 0x0200

Definition at line 187 of file cm2_44xx.h.

#define OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET 0x0220

Definition at line 193 of file cm2_44xx.h.

#define OMAP4_CM_DUCATI_DYNAMICDEP_OFFSET 0x0208

Definition at line 191 of file cm2_44xx.h.

#define OMAP4_CM_DUCATI_STATICDEP_OFFSET 0x0204

Definition at line 189 of file cm2_44xx.h.

#define OMAP4_CM_GFX_CLKSTCTRL_OFFSET 0x0000

Definition at line 291 of file cm2_44xx.h.

#define OMAP4_CM_GFX_DYNAMICDEP_OFFSET 0x0008

Definition at line 295 of file cm2_44xx.h.

#define OMAP4_CM_GFX_GFX_CLKCTRL_OFFSET 0x0020

Definition at line 297 of file cm2_44xx.h.

#define OMAP4_CM_GFX_STATICDEP_OFFSET 0x0004

Definition at line 293 of file cm2_44xx.h.

#define OMAP4_CM_IDLEST_DPLL_PER_OFFSET 0x0044

Definition at line 103 of file cm2_44xx.h.

#define OMAP4_CM_IDLEST_DPLL_UNIPRO_OFFSET 0x00c4

Definition at line 143 of file cm2_44xx.h.

#define OMAP4_CM_IDLEST_DPLL_USB_OFFSET 0x0084

Definition at line 127 of file cm2_44xx.h.

#define OMAP4_CM_IVA_DVFS_CURRENT_OFFSET 0x0038

Definition at line 99 of file cm2_44xx.h.

#define OMAP4_CM_IVA_DVFS_PERF_ABE_OFFSET 0x0030

Definition at line 97 of file cm2_44xx.h.

#define OMAP4_CM_IVA_DVFS_PERF_IVAHD_OFFSET 0x002c

Definition at line 95 of file cm2_44xx.h.

#define OMAP4_CM_IVA_DVFS_PERF_TESLA_OFFSET 0x0028

Definition at line 93 of file cm2_44xx.h.

#define OMAP4_CM_IVAHD_CLKSTCTRL_OFFSET 0x0000

Definition at line 255 of file cm2_44xx.h.

#define OMAP4_CM_IVAHD_DYNAMICDEP_OFFSET 0x0008

Definition at line 259 of file cm2_44xx.h.

#define OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET 0x0020

Definition at line 261 of file cm2_44xx.h.

#define OMAP4_CM_IVAHD_SL2_CLKCTRL_OFFSET 0x0028

Definition at line 263 of file cm2_44xx.h.

#define OMAP4_CM_IVAHD_STATICDEP_OFFSET 0x0004

Definition at line 257 of file cm2_44xx.h.

#define OMAP4_CM_L3_1_CLKSTCTRL_OFFSET 0x0000

Definition at line 171 of file cm2_44xx.h.

#define OMAP4_CM_L3_1_DYNAMICDEP_OFFSET 0x0008

Definition at line 173 of file cm2_44xx.h.

#define OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET 0x0020

Definition at line 175 of file cm2_44xx.h.

#define OMAP4_CM_L3_2_CLKSTCTRL_OFFSET 0x0100

Definition at line 177 of file cm2_44xx.h.

#define OMAP4_CM_L3_2_DYNAMICDEP_OFFSET 0x0108

Definition at line 179 of file cm2_44xx.h.

#define OMAP4_CM_L3_2_GPMC_CLKCTRL_OFFSET 0x0128

Definition at line 183 of file cm2_44xx.h.

#define OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET 0x0120

Definition at line 181 of file cm2_44xx.h.

#define OMAP4_CM_L3_2_OCMC_RAM_CLKCTRL_OFFSET 0x0130

Definition at line 185 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_CCPTX_CLKCTRL_OFFSET 0x00a8

Definition at line 331 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_CLKSTCTRL_OFFSET 0x0000

Definition at line 301 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_DYNAMICDEP_OFFSET 0x0008

Definition at line 305 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_EMAC_CLKCTRL_OFFSET 0x0080

Definition at line 323 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET 0x0038

Definition at line 311 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET 0x0028

Definition at line 307 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET 0x0030

Definition at line 309 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_MMC6_CLKCTRL_OFFSET 0x00c8

Definition at line 335 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_P1500_CLKCTRL_OFFSET 0x0078

Definition at line 321 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_PCIESS_CLKCTRL_OFFSET 0x0098

Definition at line 329 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_SATA_CLKCTRL_OFFSET 0x0088

Definition at line 325 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_STATICDEP_OFFSET 0x0004

Definition at line 303 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_TPPSS_CLKCTRL_OFFSET 0x0090

Definition at line 327 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_UNIPRO1_CLKCTRL_OFFSET 0x0040

Definition at line 313 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_OFFSET 0x0058

Definition at line 315 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_USB_HOST_FS_CLKCTRL_OFFSET 0x00d0

Definition at line 337 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET 0x0060

Definition at line 317 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_OFFSET 0x0068

Definition at line 319 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_USBPHYOCP2SCP_CLKCTRL_OFFSET 0x00e0

Definition at line 339 of file cm2_44xx.h.

#define OMAP4_CM_L3INIT_XHPI_CLKCTRL_OFFSET 0x00c0

Definition at line 333 of file cm2_44xx.h.

#define OMAP4_CM_L3INSTR_CLKSTCTRL_OFFSET 0x0700

Definition at line 245 of file cm2_44xx.h.

#define OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET 0x0720

Definition at line 247 of file cm2_44xx.h.

#define OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET 0x0728

Definition at line 249 of file cm2_44xx.h.

#define OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_OFFSET 0x0740

Definition at line 251 of file cm2_44xx.h.

#define OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET 0x0600

Definition at line 233 of file cm2_44xx.h.

#define OMAP4_CM_L4CFG_DYNAMICDEP_OFFSET 0x0608

Definition at line 235 of file cm2_44xx.h.

#define OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET 0x0628

Definition at line 239 of file cm2_44xx.h.

#define OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET 0x0620

Definition at line 237 of file cm2_44xx.h.

#define OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET 0x0630

Definition at line 241 of file cm2_44xx.h.

#define OMAP4_CM_L4CFG_SAR_ROM_CLKCTRL_OFFSET 0x0638

Definition at line 243 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_ADC_CLKCTRL_OFFSET 0x0020

Definition at line 347 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_CLKSTCTRL_OFFSET 0x0000

Definition at line 343 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET 0x0028

Definition at line 349 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET 0x0030

Definition at line 351 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET 0x0038

Definition at line 353 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET 0x0040

Definition at line 355 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET 0x0048

Definition at line 357 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET 0x0050

Definition at line 359 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_DYNAMICDEP_OFFSET 0x0008

Definition at line 345 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_ELM_CLKCTRL_OFFSET 0x0058

Definition at line 361 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET 0x0060

Definition at line 363 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET 0x0068

Definition at line 365 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET 0x0070

Definition at line 367 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET 0x0078

Definition at line 369 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET 0x0080

Definition at line 371 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_HDQ1W_CLKCTRL_OFFSET 0x0088

Definition at line 373 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_HECC1_CLKCTRL_OFFSET 0x0090

Definition at line 375 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_HECC2_CLKCTRL_OFFSET 0x0098

Definition at line 377 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET 0x00a0

Definition at line 379 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET 0x00a8

Definition at line 381 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET 0x00b0

Definition at line 383 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET 0x00b8

Definition at line 385 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_I2C5_CLKCTRL_OFFSET 0x0168

Definition at line 423 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET 0x00c0

Definition at line 387 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MCASP2_CLKCTRL_OFFSET 0x00d0

Definition at line 389 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MCASP3_CLKCTRL_OFFSET 0x00d8

Definition at line 391 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET 0x00e0

Definition at line 393 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET 0x00f0

Definition at line 397 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET 0x00f8

Definition at line 399 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET 0x0100

Definition at line 401 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET 0x0108

Definition at line 403 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MGATE_CLKCTRL_OFFSET 0x00e8

Definition at line 395 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET 0x0120

Definition at line 405 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET 0x0128

Definition at line 407 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET 0x0160

Definition at line 421 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_MSPROHG_CLKCTRL_OFFSET 0x0130

Definition at line 409 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_SLIMBUS2_CLKCTRL_OFFSET 0x0138

Definition at line 411 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET 0x0140

Definition at line 413 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET 0x0148

Definition at line 415 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET 0x0150

Definition at line 417 of file cm2_44xx.h.

#define OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET 0x0158

Definition at line 419 of file cm2_44xx.h.

#define OMAP4_CM_L4SEC_AES1_CLKCTRL_OFFSET 0x01a0

Definition at line 431 of file cm2_44xx.h.

#define OMAP4_CM_L4SEC_AES2_CLKCTRL_OFFSET 0x01a8

Definition at line 433 of file cm2_44xx.h.

#define OMAP4_CM_L4SEC_CLKSTCTRL_OFFSET 0x0180

Definition at line 425 of file cm2_44xx.h.

#define OMAP4_CM_L4SEC_CRYPTODMA_CLKCTRL_OFFSET 0x01d8

Definition at line 443 of file cm2_44xx.h.

#define OMAP4_CM_L4SEC_DES3DES_CLKCTRL_OFFSET 0x01b0

Definition at line 435 of file cm2_44xx.h.

#define OMAP4_CM_L4SEC_DYNAMICDEP_OFFSET 0x0188

Definition at line 429 of file cm2_44xx.h.

#define OMAP4_CM_L4SEC_PKAEIP29_CLKCTRL_OFFSET 0x01b8

Definition at line 437 of file cm2_44xx.h.

#define OMAP4_CM_L4SEC_RNG_CLKCTRL_OFFSET 0x01c0

Definition at line 439 of file cm2_44xx.h.

#define OMAP4_CM_L4SEC_SHA2MD51_CLKCTRL_OFFSET 0x01c8

Definition at line 441 of file cm2_44xx.h.

#define OMAP4_CM_L4SEC_STATICDEP_OFFSET 0x0184

Definition at line 427 of file cm2_44xx.h.

#define OMAP4_CM_MEMIF_CLKSTCTRL_OFFSET 0x0400

Definition at line 203 of file cm2_44xx.h.

#define OMAP4_CM_MEMIF_DLL_CLKCTRL_OFFSET 0x0440

Definition at line 213 of file cm2_44xx.h.

#define OMAP4_CM_MEMIF_DLL_H_CLKCTRL_OFFSET 0x0460

Definition at line 219 of file cm2_44xx.h.

#define OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET 0x0420

Definition at line 205 of file cm2_44xx.h.

#define OMAP4_CM_MEMIF_EMIF_1_CLKCTRL_OFFSET 0x0430

Definition at line 209 of file cm2_44xx.h.

#define OMAP4_CM_MEMIF_EMIF_2_CLKCTRL_OFFSET 0x0438

Definition at line 211 of file cm2_44xx.h.

#define OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET 0x0428

Definition at line 207 of file cm2_44xx.h.

#define OMAP4_CM_MEMIF_EMIF_H1_CLKCTRL_OFFSET 0x0450

Definition at line 215 of file cm2_44xx.h.

#define OMAP4_CM_MEMIF_EMIF_H2_CLKCTRL_OFFSET 0x0458

Definition at line 217 of file cm2_44xx.h.

#define OMAP4_CM_SCALE_FCLK_OFFSET 0x0008

Definition at line 81 of file cm2_44xx.h.

#define OMAP4_CM_SDMA_CLKSTCTRL_OFFSET 0x0300

Definition at line 195 of file cm2_44xx.h.

#define OMAP4_CM_SDMA_DYNAMICDEP_OFFSET 0x0308

Definition at line 199 of file cm2_44xx.h.

#define OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET 0x0320

Definition at line 201 of file cm2_44xx.h.

#define OMAP4_CM_SDMA_STATICDEP_OFFSET 0x0304

Definition at line 197 of file cm2_44xx.h.

#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET 0x0068

Definition at line 121 of file cm2_44xx.h.

#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET 0x00e8

Definition at line 151 of file cm2_44xx.h.

#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET 0x00a8

Definition at line 135 of file cm2_44xx.h.

#define OMAP4_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET 0x006c

Definition at line 123 of file cm2_44xx.h.

#define OMAP4_CM_SSC_MODFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec

Definition at line 153 of file cm2_44xx.h.

#define OMAP4_CM_SSC_MODFREQDIV_DPLL_USB_OFFSET 0x00ac

Definition at line 137 of file cm2_44xx.h.

#define OMAP4_REVISION_CM2_OFFSET 0x0000

Definition at line 71 of file cm2_44xx.h.

Function Documentation

u32 omap4_cm2_read_inst_reg	(	s16	inst,
		u16	idx
	)

Definition at line 43 of file cm44xx.c.

u32 omap4_cm2_rmw_inst_reg_bits	(	u32	mask,
		u32	bits,
		s16	inst,
		s16	idx
	)

void omap4_cm2_write_inst_reg	(	u32	val,
		s16	inst,
		u16	idx
	)

Definition at line 49 of file cm44xx.c.

Macros

Functions

Macro Definition Documentation

Function Documentation