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cnic.h
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1 /* cnic.h: Broadcom CNIC core network driver.
2  *
3  * Copyright (c) 2006-2011 Broadcom Corporation
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation.
8  *
9  */
10 
11 
12 #ifndef CNIC_H
13 #define CNIC_H
14 
15 #define HC_INDEX_ISCSI_EQ_CONS 6
16 
17 #define HC_INDEX_FCOE_EQ_CONS 3
18 
19 #define HC_SP_INDEX_ETH_ISCSI_CQ_CONS 5
20 #define HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS 1
21 
22 #define KWQ_PAGE_CNT 4
23 #define KCQ_PAGE_CNT 16
24 
25 #define KWQ_CID 24
26 #define KCQ_CID 25
27 
28 /*
29  * krnlq_context definition
30  */
31 #define L5_KRNLQ_FLAGS 0x00000000
32 #define L5_KRNLQ_SIZE 0x00000000
33 #define L5_KRNLQ_TYPE 0x00000000
34 #define KRNLQ_FLAGS_PG_SZ (0xf<<0)
35 #define KRNLQ_FLAGS_PG_SZ_256 (0<<0)
36 #define KRNLQ_FLAGS_PG_SZ_512 (1<<0)
37 #define KRNLQ_FLAGS_PG_SZ_1K (2<<0)
38 #define KRNLQ_FLAGS_PG_SZ_2K (3<<0)
39 #define KRNLQ_FLAGS_PG_SZ_4K (4<<0)
40 #define KRNLQ_FLAGS_PG_SZ_8K (5<<0)
41 #define KRNLQ_FLAGS_PG_SZ_16K (6<<0)
42 #define KRNLQ_FLAGS_PG_SZ_32K (7<<0)
43 #define KRNLQ_FLAGS_PG_SZ_64K (8<<0)
44 #define KRNLQ_FLAGS_PG_SZ_128K (9<<0)
45 #define KRNLQ_FLAGS_PG_SZ_256K (10<<0)
46 #define KRNLQ_FLAGS_PG_SZ_512K (11<<0)
47 #define KRNLQ_FLAGS_PG_SZ_1M (12<<0)
48 #define KRNLQ_FLAGS_PG_SZ_2M (13<<0)
49 #define KRNLQ_FLAGS_QE_SELF_SEQ (1<<15)
50 #define KRNLQ_SIZE_TYPE_SIZE ((((0x28 + 0x1f) & ~0x1f) / 0x20) << 16)
51 #define KRNLQ_TYPE_TYPE (0xf<<28)
52 #define KRNLQ_TYPE_TYPE_EMPTY (0<<28)
53 #define KRNLQ_TYPE_TYPE_KRNLQ (6<<28)
54 
55 #define L5_KRNLQ_HOST_QIDX 0x00000004
56 #define L5_KRNLQ_HOST_FW_QIDX 0x00000008
57 #define L5_KRNLQ_NX_QE_SELF_SEQ 0x0000000c
58 #define L5_KRNLQ_QE_SELF_SEQ_MAX 0x0000000c
59 #define L5_KRNLQ_NX_QE_HADDR_HI 0x00000010
60 #define L5_KRNLQ_NX_QE_HADDR_LO 0x00000014
61 #define L5_KRNLQ_PGTBL_PGIDX 0x00000018
62 #define L5_KRNLQ_NX_PG_QIDX 0x00000018
63 #define L5_KRNLQ_PGTBL_NPAGES 0x0000001c
64 #define L5_KRNLQ_QIDX_INCR 0x0000001c
65 #define L5_KRNLQ_PGTBL_HADDR_HI 0x00000020
66 #define L5_KRNLQ_PGTBL_HADDR_LO 0x00000024
67 
68 #define BNX2_PG_CTX_MAP 0x1a0034
69 #define BNX2_ISCSI_CTX_MAP 0x1a0074
70 
71 #define MAX_COMPLETED_KCQE 64
72 
73 #define MAX_CNIC_L5_CONTEXT 256
74 
75 #define MAX_CM_SK_TBL_SZ MAX_CNIC_L5_CONTEXT
76 
77 #define MAX_ISCSI_TBL_SZ 256
78 
79 #define CNIC_LOCAL_PORT_MIN 60000
80 #define CNIC_LOCAL_PORT_MAX 61024
81 #define CNIC_LOCAL_PORT_RANGE (CNIC_LOCAL_PORT_MAX - CNIC_LOCAL_PORT_MIN)
82 
83 #define KWQE_CNT (BCM_PAGE_SIZE / sizeof(struct kwqe))
84 #define KCQE_CNT (BCM_PAGE_SIZE / sizeof(struct kcqe))
85 #define MAX_KWQE_CNT (KWQE_CNT - 1)
86 #define MAX_KCQE_CNT (KCQE_CNT - 1)
87 
88 #define MAX_KWQ_IDX ((KWQ_PAGE_CNT * KWQE_CNT) - 1)
89 #define MAX_KCQ_IDX ((KCQ_PAGE_CNT * KCQE_CNT) - 1)
90 
91 #define KWQ_PG(x) (((x) & ~MAX_KWQE_CNT) >> (BCM_PAGE_BITS - 5))
92 #define KWQ_IDX(x) ((x) & MAX_KWQE_CNT)
93 
94 #define KCQ_PG(x) (((x) & ~MAX_KCQE_CNT) >> (BCM_PAGE_BITS - 5))
95 #define KCQ_IDX(x) ((x) & MAX_KCQE_CNT)
96 
97 #define BNX2X_NEXT_KCQE(x) (((x) & (MAX_KCQE_CNT - 1)) == \
98  (MAX_KCQE_CNT - 1)) ? \
99  (x) + 2 : (x) + 1
100 
101 #define BNX2X_KWQ_DATA_PG(cp, x) ((x) / (cp)->kwq_16_data_pp)
102 #define BNX2X_KWQ_DATA_IDX(cp, x) ((x) % (cp)->kwq_16_data_pp)
103 #define BNX2X_KWQ_DATA(cp, x) \
104  &(cp)->kwq_16_data[BNX2X_KWQ_DATA_PG(cp, x)][BNX2X_KWQ_DATA_IDX(cp, x)]
105 
106 #define DEF_IPID_START 0x8000
107 
108 #define DEF_KA_TIMEOUT 10000
109 #define DEF_KA_INTERVAL 300000
110 #define DEF_KA_MAX_PROBE_COUNT 3
111 #define DEF_TOS 0
112 #define DEF_TTL 0xfe
113 #define DEF_SND_SEQ_SCALE 0
114 #define DEF_RCV_BUF 0xffff
115 #define DEF_SND_BUF 0xffff
116 #define DEF_SEED 0
117 #define DEF_MAX_RT_TIME 500
118 #define DEF_MAX_DA_COUNT 2
119 #define DEF_SWS_TIMER 1000
120 #define DEF_MAX_CWND 0xffff
121 
122 struct cnic_ctx {
124  void *ctx;
126 };
127 
128 #define BNX2_MAX_CID 0x2000
129 
130 struct cnic_dma {
132  void **pg_arr;
137 };
138 
139 struct cnic_id_tbl {
144  unsigned long *table;
145 };
146 
147 #define CNIC_KWQ16_DATA_SIZE 128
148 
149 struct kwqe_16_data {
151 };
152 
153 struct cnic_iscsi {
157 };
158 
159 struct cnic_context {
165  unsigned long timestamp;
166  unsigned long ctx_flags;
167 #define CTX_FL_OFFLD_START 0
168 #define CTX_FL_DELETE_WAIT 1
169 #define CTX_FL_CID_ERROR 2
171  union {
172  struct cnic_iscsi *iscsi;
173  } proto;
174 };
175 
176 struct kcq_info {
177  struct cnic_dma dma;
178  struct kcqe **kcq;
179 
184 
187 };
188 
189 struct iro {
190  u32 base;
191  u16 m1;
192  u16 m2;
193  u16 m3;
194  u16 size;
195 };
196 
197 struct cnic_uio_dev {
200 
202  void *l2_ring;
204 
206  void *l2_buf;
208 
209  struct cnic_dev *dev;
210  struct pci_dev *pdev;
211  struct list_head list;
212 };
213 
214 struct cnic_local {
215 
218  unsigned long ulp_flags[MAX_CNIC_ULP_TYPE];
219 #define ULP_F_INIT 0
220 #define ULP_F_START 1
221 #define ULP_F_CALL_PENDING 2
223 
224  unsigned long cnic_local_flags;
225 #define CNIC_LCL_FL_KWQ_INIT 0x0
226 #define CNIC_LCL_FL_L2_WAIT 0x1
227 #define CNIC_LCL_FL_RINGS_INITED 0x2
228 #define CNIC_LCL_FL_STOP_ISCSI 0x4
229 
230  struct cnic_dev *dev;
231 
233 
235 
238 
243 
244  const struct iro *iro_arr;
245 #define IRO (((struct cnic_local *) dev->cnic_priv)->iro_arr)
246 
248  struct kwqe **kwq;
249 
251 
253 
256 
259 
260  struct kcq_info kcq1;
261  struct kcq_info kcq2;
262 
263  union {
264  void *gen;
267  /* index values - which counter to update */
268  #define SM_RX_ID 0
269  #define SM_TX_ID 1
270  } status_blk;
271 
273 
279 
281 
284 
286 
292 
296 
298 
299  /* per connection parameters */
304  int hq_size;
305  int num_cqs;
306 
308 
309  struct cnic_ctx *ctx_arr;
310  int ctx_blks;
312  unsigned long ctx_align;
314 
316  int func;
319 #define CHIP_4_PORT_MODE 0
320 #define CHIP_2_PORT_MODE 1
321 #define CHIP_PORT_MODE_NONE 2
322 
324 
326  int (*start_hw)(struct cnic_dev *);
327  void (*stop_hw)(struct cnic_dev *);
328  void (*setup_pgtbl)(struct cnic_dev *,
329  struct cnic_dma *);
330  int (*alloc_resc)(struct cnic_dev *);
331  void (*free_resc)(struct cnic_dev *);
332  int (*start_cm)(struct cnic_dev *);
333  void (*stop_cm)(struct cnic_dev *);
334  void (*enable_int)(struct cnic_dev *);
336  void (*ack_int)(struct cnic_dev *);
337  void (*arm_int)(struct cnic_dev *, u32 index);
339 };
340 
345 };
346 
347 #define ISCSI_DEFAULT_MAX_OUTSTANDING_R2T (1)
348 
349 #define ISCSI_RAMROD_CMD_ID_UPDATE_CONN (ISCSI_KCQE_OPCODE_UPDATE_CONN)
350 #define ISCSI_RAMROD_CMD_ID_INIT (ISCSI_KCQE_OPCODE_INIT)
351 
352 #define CDU_REGION_NUMBER_XCM_AG 2
353 #define CDU_REGION_NUMBER_UCM_AG 4
354 
355 #define CDU_VALID_DATA(_cid, _region, _type) \
356  (((_cid) << 8) | (((_region)&0xf)<<4) | (((_type)&0xf)))
357 
358 #define CDU_CRC8(_cid, _region, _type) \
359  (calc_crc8(CDU_VALID_DATA(_cid, _region, _type), 0xff))
360 
361 #define CDU_RSRVD_VALUE_TYPE_A(_cid, _region, _type) \
362  (0x80 | ((CDU_CRC8(_cid, _region, _type)) & 0x7f))
363 
364 #define BNX2X_CONTEXT_MEM_SIZE 1024
365 #define BNX2X_FCOE_CID 16
366 
367 #define BNX2X_ISCSI_START_CID 18
368 #define BNX2X_ISCSI_NUM_CONNECTIONS 128
369 #define BNX2X_ISCSI_TASK_CONTEXT_SIZE 128
370 #define BNX2X_ISCSI_MAX_PENDING_R2TS 4
371 #define BNX2X_ISCSI_R2TQE_SIZE 8
372 #define BNX2X_ISCSI_HQ_BD_SIZE 64
373 #define BNX2X_ISCSI_GLB_BUF_SIZE 64
374 #define BNX2X_ISCSI_PBL_NOT_CACHED 0xff
375 #define BNX2X_ISCSI_PDU_HEADER_NOT_CACHED 0xff
376 
377 #define BNX2X_FCOE_NUM_CONNECTIONS 1024
378 
379 #define BNX2X_FCOE_L5_CID_BASE MAX_ISCSI_TBL_SZ
380 
381 #define BNX2X_CHIP_NUM_57710 0x164e
382 #define BNX2X_CHIP_NUM_57711 0x164f
383 #define BNX2X_CHIP_NUM_57711E 0x1650
384 #define BNX2X_CHIP_NUM_57712 0x1662
385 #define BNX2X_CHIP_NUM_57712E 0x1663
386 #define BNX2X_CHIP_NUM_57713 0x1651
387 #define BNX2X_CHIP_NUM_57713E 0x1652
388 #define BNX2X_CHIP_NUM_57800 0x168a
389 #define BNX2X_CHIP_NUM_57810 0x168e
390 #define BNX2X_CHIP_NUM_57840 0x168d
391 
392 #define BNX2X_CHIP_NUM(x) (x >> 16)
393 #define BNX2X_CHIP_IS_57710(x) \
394  (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57710)
395 #define BNX2X_CHIP_IS_57711(x) \
396  (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711)
397 #define BNX2X_CHIP_IS_57711E(x) \
398  (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711E)
399 #define BNX2X_CHIP_IS_E1H(x) \
400  (BNX2X_CHIP_IS_57711(x) || BNX2X_CHIP_IS_57711E(x))
401 #define BNX2X_CHIP_IS_57712(x) \
402  (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712)
403 #define BNX2X_CHIP_IS_57712E(x) \
404  (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712E)
405 #define BNX2X_CHIP_IS_57713(x) \
406  (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713)
407 #define BNX2X_CHIP_IS_57713E(x) \
408  (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713E)
409 #define BNX2X_CHIP_IS_57800(x) \
410  (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57800)
411 #define BNX2X_CHIP_IS_57810(x) \
412  (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57810)
413 #define BNX2X_CHIP_IS_57840(x) \
414  (BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57840)
415 #define BNX2X_CHIP_IS_E2(x) \
416  (BNX2X_CHIP_IS_57712(x) || BNX2X_CHIP_IS_57712E(x) || \
417  BNX2X_CHIP_IS_57713(x) || BNX2X_CHIP_IS_57713E(x))
418 #define BNX2X_CHIP_IS_E3(x) \
419  (BNX2X_CHIP_IS_57800(x) || BNX2X_CHIP_IS_57810(x) || \
420  BNX2X_CHIP_IS_57840(x))
421 #define BNX2X_CHIP_IS_E2_PLUS(x) (BNX2X_CHIP_IS_E2(x) || BNX2X_CHIP_IS_E3(x))
422 
423 #define IS_E1H_OFFSET BNX2X_CHIP_IS_E1H(cp->chip_id)
424 
425 #define BNX2X_RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd))
426 #define BNX2X_MAX_RX_DESC_CNT (BNX2X_RX_DESC_CNT - 2)
427 #define BNX2X_RCQ_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_rx_cqe))
428 #define BNX2X_MAX_RCQ_DESC_CNT (BNX2X_RCQ_DESC_CNT - 1)
429 
430 #define BNX2X_NEXT_RCQE(x) (((x) & BNX2X_MAX_RCQ_DESC_CNT) == \
431  (BNX2X_MAX_RCQ_DESC_CNT - 1)) ? \
432  ((x) + 2) : ((x) + 1)
433 
434 #define BNX2X_DEF_SB_ID HC_SP_SB_ID
435 
436 #define BNX2X_SHMEM_MF_BLK_OFFSET 0x7e4
437 
438 #define BNX2X_SHMEM_ADDR(base, field) (base + \
439  offsetof(struct shmem_region, field))
440 
441 #define BNX2X_SHMEM2_ADDR(base, field) (base + \
442  offsetof(struct shmem2_region, field))
443 
444 #define BNX2X_SHMEM2_HAS(base, field) \
445  ((base) && \
446  (CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base, size)) > \
447  offsetof(struct shmem2_region, field)))
448 
449 #define BNX2X_MF_CFG_ADDR(base, field) \
450  ((base) + offsetof(struct mf_cfg, field))
451 
452 #ifndef ETH_MAX_RX_CLIENTS_E2
453 #define ETH_MAX_RX_CLIENTS_E2 ETH_MAX_RX_CLIENTS_E1H
454 #endif
455 
456 #define CNIC_PORT(cp) ((cp)->pfid & 1)
457 #define CNIC_FUNC(cp) ((cp)->func)
458 #define CNIC_PATH(cp) (!BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) ? \
459  0 : (CNIC_FUNC(cp) & 1))
460 #define CNIC_E1HVN(cp) ((cp)->pfid >> 1)
461 
462 #define BNX2X_HW_CID(cp, x) ((CNIC_PORT(cp) << 23) | \
463  (CNIC_E1HVN(cp) << 17) | (x))
464 
465 #define BNX2X_SW_CID(x) (x & 0x1ffff)
466 
467 #define BNX2X_CL_QZONE_ID(cp, cli) \
468  (BNX2X_CHIP_IS_E2_PLUS(cp->chip_id) ? cli : \
469  cli + (CNIC_PORT(cp) * ETH_MAX_RX_CLIENTS_E1H))
470 
471 #ifndef MAX_STAT_COUNTER_ID
472 #define MAX_STAT_COUNTER_ID \
473  (BNX2X_CHIP_IS_E1H((cp)->chip_id) ? MAX_STAT_COUNTER_ID_E1H : \
474  ((BNX2X_CHIP_IS_E2_PLUS((cp)->chip_id)) ? MAX_STAT_COUNTER_ID_E2 :\
475  MAX_STAT_COUNTER_ID_E1))
476 #endif
477 
478 #define CNIC_SUPPORTS_FCOE(cp) \
479  (BNX2X_CHIP_IS_E2_PLUS((cp)->chip_id) && \
480  !((cp)->ethdev->drv_state & CNIC_DRV_STATE_NO_FCOE))
481 
482 #define CNIC_RAMROD_TMO (HZ / 4)
483 
484 #endif
485