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#define | CNIC_MODULE_VERSION "2.5.14" |
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#define | CNIC_MODULE_RELDATE "Sep 30, 2012" |
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#define | CNIC_ULP_RDMA 0 |
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#define | CNIC_ULP_ISCSI 1 |
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#define | CNIC_ULP_FCOE 2 |
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#define | CNIC_ULP_L4 3 |
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#define | MAX_CNIC_ULP_TYPE_EXT 3 |
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#define | MAX_CNIC_ULP_TYPE 4 |
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#define | KWQE_QID_SHIFT 8 |
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#define | KWQE_OPCODE_MASK 0x00ff0000 |
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#define | KWQE_OPCODE_SHIFT 16 |
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#define | KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT) |
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#define | KWQE_LAYER_MASK 0x70000000 |
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#define | KWQE_LAYER_SHIFT 28 |
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#define | KWQE_FLAGS_LAYER_MASK_L2 (2<<28) |
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#define | KWQE_FLAGS_LAYER_MASK_L3 (3<<28) |
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#define | KWQE_FLAGS_LAYER_MASK_L4 (4<<28) |
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#define | KWQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28) |
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#define | KWQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28) |
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#define | KWQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28) |
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#define | KCQE_RAMROD_COMPLETION (0x1<<27) /* Everest */ |
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#define | KCQE_FLAGS_LAYER_MASK (0x7<<28) |
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#define | KCQE_FLAGS_LAYER_MASK_MISC (0<<28) |
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#define | KCQE_FLAGS_LAYER_MASK_L2 (2<<28) |
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#define | KCQE_FLAGS_LAYER_MASK_L3 (3<<28) |
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#define | KCQE_FLAGS_LAYER_MASK_L4 (4<<28) |
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#define | KCQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28) |
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#define | KCQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28) |
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#define | KCQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28) |
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#define | KCQE_FLAGS_NEXT (1<<31) |
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#define | KCQE_FLAGS_OPCODE_MASK (0xff<<16) |
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#define | KCQE_FLAGS_OPCODE_SHIFT (16) |
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#define | KCQE_OPCODE(op) (((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT) |
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#define | MAX_CNIC_CTL_DATA 64 |
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#define | MAX_DRV_CTL_DATA 64 |
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#define | CNIC_CTL_STOP_CMD 1 |
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#define | CNIC_CTL_START_CMD 2 |
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#define | CNIC_CTL_COMPLETION_CMD 3 |
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#define | CNIC_CTL_STOP_ISCSI_CMD 4 |
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#define | CNIC_CTL_FCOE_STATS_GET_CMD 5 |
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#define | CNIC_CTL_ISCSI_STATS_GET_CMD 6 |
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#define | DRV_CTL_IO_WR_CMD 0x101 |
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#define | DRV_CTL_IO_RD_CMD 0x102 |
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#define | DRV_CTL_CTX_WR_CMD 0x103 |
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#define | DRV_CTL_CTXTBL_WR_CMD 0x104 |
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#define | DRV_CTL_RET_L5_SPQ_CREDIT_CMD 0x105 |
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#define | DRV_CTL_START_L2_CMD 0x106 |
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#define | DRV_CTL_STOP_L2_CMD 0x107 |
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#define | DRV_CTL_RET_L2_SPQ_CREDIT_CMD 0x10c |
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#define | DRV_CTL_ISCSI_STOPPED_CMD 0x10d |
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#define | DRV_CTL_ULP_REGISTER_CMD 0x10e |
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#define | DRV_CTL_ULP_UNREGISTER_CMD 0x10f |
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#define | MAX_CNIC_VEC 8 |
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#define | CNIC_IRQ_FL_MSIX 0x00000001 |
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#define | CNIC_DRV_STATE_REGD 0x00000001 |
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#define | CNIC_DRV_STATE_USING_MSIX 0x00000002 |
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#define | CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004 |
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#define | CNIC_DRV_STATE_NO_ISCSI 0x00000008 |
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#define | CNIC_DRV_STATE_NO_FCOE 0x00000010 |
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#define | SK_TCP_NO_DELAY_ACK 0x1 |
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#define | SK_TCP_KEEP_ALIVE 0x2 |
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#define | SK_TCP_NAGLE 0x4 |
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#define | SK_TCP_TIMESTAMP 0x8 |
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#define | SK_TCP_SACK 0x10 |
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#define | SK_TCP_SEG_SCALING 0x20 |
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#define | SK_F_INUSE 0 |
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#define | SK_F_OFFLD_COMPLETE 1 |
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#define | SK_F_OFFLD_SCHED 2 |
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#define | SK_F_PG_OFFLD_COMPLETE 3 |
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#define | SK_F_CONNECT_START 4 |
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#define | SK_F_IPV6 5 |
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#define | SK_F_CLOSING 7 |
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#define | SK_F_HW_ERR 8 |
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#define | CNIC_F_CNIC_UP 1 |
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#define | CNIC_F_BNX2_CLASS 3 |
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#define | CNIC_F_BNX2X_CLASS 4 |
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#define | CNIC_WR(dev, off, val) writel(val, dev->regview + off) |
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#define | CNIC_WR16(dev, off, val) writew(val, dev->regview + off) |
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#define | CNIC_WR8(dev, off, val) writeb(val, dev->regview + off) |
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#define | CNIC_RD(dev, off) readl(dev->regview + off) |
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#define | CNIC_RD16(dev, off) readw(dev->regview + off) |
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