core_cia.h File Reference

#include <linux/types.h>
#include <asm/compiler.h>

Go to the source code of this file.

Data Structures
struct	el_CIA_sysdata_mcheck

Macros
#define	CIA_ONE_HAE_WINDOW   1
#define	CIA_MEM_R1_MASK   0x1fffffff /* SPARSE Mem region 1 mask is 29 bits */
#define	CIA_MEM_R2_MASK   0x07ffffff /* SPARSE Mem region 2 mask is 27 bits */
#define	CIA_MEM_R3_MASK   0x03ffffff /* SPARSE Mem region 3 mask is 26 bits */
#define	CIA_IOC_CIA_REV   (IDENT_ADDR + 0x8740000080UL)
#define	CIA_REV_MASK   0xff
#define	CIA_IOC_PCI_LAT   (IDENT_ADDR + 0x87400000C0UL)
#define	CIA_IOC_CIA_CTRL   (IDENT_ADDR + 0x8740000100UL)
#define	CIA_CTRL_PCI_EN   (1 << 0)
#define	CIA_CTRL_PCI_LOCK_EN   (1 << 1)
#define	CIA_CTRL_PCI_LOOP_EN   (1 << 2)
#define	CIA_CTRL_FST_BB_EN   (1 << 3)
#define	CIA_CTRL_PCI_MST_EN   (1 << 4)
#define	CIA_CTRL_PCI_MEM_EN   (1 << 5)
#define	CIA_CTRL_PCI_REQ64_EN   (1 << 6)
#define	CIA_CTRL_PCI_ACK64_EN   (1 << 7)
#define	CIA_CTRL_ADDR_PE_EN   (1 << 8)
#define	CIA_CTRL_PERR_EN   (1 << 9)
#define	CIA_CTRL_FILL_ERR_EN   (1 << 10)
#define	CIA_CTRL_MCHK_ERR_EN   (1 << 11)
#define	CIA_CTRL_ECC_CHK_EN   (1 << 12)
#define	CIA_CTRL_ASSERT_IDLE_BC   (1 << 13)
#define	CIA_CTRL_COM_IDLE_BC   (1 << 14)
#define	CIA_CTRL_CSR_IOA_BYPASS   (1 << 15)
#define	CIA_CTRL_IO_FLUSHREQ_EN   (1 << 16)
#define	CIA_CTRL_CPU_FLUSHREQ_EN   (1 << 17)
#define	CIA_CTRL_ARB_CPU_EN   (1 << 18)
#define	CIA_CTRL_EN_ARB_LINK   (1 << 19)
#define	CIA_CTRL_RD_TYPE_SHIFT   20
#define	CIA_CTRL_RL_TYPE_SHIFT   24
#define	CIA_CTRL_RM_TYPE_SHIFT   28
#define	CIA_CTRL_EN_DMA_RD_PERF   (1 << 31)
#define	CIA_IOC_CIA_CNFG   (IDENT_ADDR + 0x8740000140UL)
#define	CIA_CNFG_IOA_BWEN   (1 << 0)
#define	CIA_CNFG_PCI_MWEN   (1 << 4)
#define	CIA_CNFG_PCI_DWEN   (1 << 5)
#define	CIA_CNFG_PCI_WLEN   (1 << 8)
#define	CIA_IOC_FLASH_CTRL   (IDENT_ADDR + 0x8740000200UL)
#define	CIA_IOC_HAE_MEM   (IDENT_ADDR + 0x8740000400UL)
#define	CIA_IOC_HAE_IO   (IDENT_ADDR + 0x8740000440UL)
#define	CIA_IOC_CFG   (IDENT_ADDR + 0x8740000480UL)
#define	CIA_IOC_CACK_EN   (IDENT_ADDR + 0x8740000600UL)
#define	CIA_CACK_EN_LOCK_EN   (1 << 0)
#define	CIA_CACK_EN_MB_EN   (1 << 1)
#define	CIA_CACK_EN_SET_DIRTY_EN   (1 << 2)
#define	CIA_CACK_EN_BC_VICTIM_EN   (1 << 3)
#define	CIA_IOC_CIA_DIAG   (IDENT_ADDR + 0x8740002000UL)
#define	CIA_IOC_DIAG_CHECK   (IDENT_ADDR + 0x8740003000UL)
#define	CIA_IOC_PERF_MONITOR   (IDENT_ADDR + 0x8740004000UL)
#define	CIA_IOC_PERF_CONTROL   (IDENT_ADDR + 0x8740004040UL)
#define	CIA_IOC_CPU_ERR0   (IDENT_ADDR + 0x8740008000UL)
#define	CIA_IOC_CPU_ERR1   (IDENT_ADDR + 0x8740008040UL)
#define	CIA_IOC_CIA_ERR   (IDENT_ADDR + 0x8740008200UL)
#define	CIA_ERR_COR_ERR   (1 << 0)
#define	CIA_ERR_UN_COR_ERR   (1 << 1)
#define	CIA_ERR_CPU_PE   (1 << 2)
#define	CIA_ERR_MEM_NEM   (1 << 3)
#define	CIA_ERR_PCI_SERR   (1 << 4)
#define	CIA_ERR_PERR   (1 << 5)
#define	CIA_ERR_PCI_ADDR_PE   (1 << 6)
#define	CIA_ERR_RCVD_MAS_ABT   (1 << 7)
#define	CIA_ERR_RCVD_TAR_ABT   (1 << 8)
#define	CIA_ERR_PA_PTE_INV   (1 << 9)
#define	CIA_ERR_FROM_WRT_ERR   (1 << 10)
#define	CIA_ERR_IOA_TIMEOUT   (1 << 11)
#define	CIA_ERR_LOST_CORR_ERR   (1 << 16)
#define	CIA_ERR_LOST_UN_CORR_ERR   (1 << 17)
#define	CIA_ERR_LOST_CPU_PE   (1 << 18)
#define	CIA_ERR_LOST_MEM_NEM   (1 << 19)
#define	CIA_ERR_LOST_PERR   (1 << 21)
#define	CIA_ERR_LOST_PCI_ADDR_PE   (1 << 22)
#define	CIA_ERR_LOST_RCVD_MAS_ABT   (1 << 23)
#define	CIA_ERR_LOST_RCVD_TAR_ABT   (1 << 24)
#define	CIA_ERR_LOST_PA_PTE_INV   (1 << 25)
#define	CIA_ERR_LOST_FROM_WRT_ERR   (1 << 26)
#define	CIA_ERR_LOST_IOA_TIMEOUT   (1 << 27)
#define	CIA_ERR_VALID   (1 << 31)
#define	CIA_IOC_CIA_STAT   (IDENT_ADDR + 0x8740008240UL)
#define	CIA_IOC_ERR_MASK   (IDENT_ADDR + 0x8740008280UL)
#define	CIA_IOC_CIA_SYN   (IDENT_ADDR + 0x8740008300UL)
#define	CIA_IOC_MEM_ERR0   (IDENT_ADDR + 0x8740008400UL)
#define	CIA_IOC_MEM_ERR1   (IDENT_ADDR + 0x8740008440UL)
#define	CIA_IOC_PCI_ERR0   (IDENT_ADDR + 0x8740008800UL)
#define	CIA_IOC_PCI_ERR1   (IDENT_ADDR + 0x8740008840UL)
#define	CIA_IOC_PCI_ERR3   (IDENT_ADDR + 0x8740008880UL)
#define	CIA_IOC_MCR   (IDENT_ADDR + 0x8750000000UL)
#define	CIA_IOC_MBA0   (IDENT_ADDR + 0x8750000600UL)
#define	CIA_IOC_MBA2   (IDENT_ADDR + 0x8750000680UL)
#define	CIA_IOC_MBA4   (IDENT_ADDR + 0x8750000700UL)
#define	CIA_IOC_MBA6   (IDENT_ADDR + 0x8750000780UL)
#define	CIA_IOC_MBA8   (IDENT_ADDR + 0x8750000800UL)
#define	CIA_IOC_MBAA   (IDENT_ADDR + 0x8750000880UL)
#define	CIA_IOC_MBAC   (IDENT_ADDR + 0x8750000900UL)
#define	CIA_IOC_MBAE   (IDENT_ADDR + 0x8750000980UL)
#define	CIA_IOC_TMG0   (IDENT_ADDR + 0x8750000B00UL)
#define	CIA_IOC_TMG1   (IDENT_ADDR + 0x8750000B40UL)
#define	CIA_IOC_TMG2   (IDENT_ADDR + 0x8750000B80UL)
#define	CIA_IOC_PCI_TBIA   (IDENT_ADDR + 0x8760000100UL)
#define	CIA_IOC_PCI_W0_BASE   (IDENT_ADDR + 0x8760000400UL)
#define	CIA_IOC_PCI_W0_MASK   (IDENT_ADDR + 0x8760000440UL)
#define	CIA_IOC_PCI_T0_BASE   (IDENT_ADDR + 0x8760000480UL)
#define	CIA_IOC_PCI_W1_BASE   (IDENT_ADDR + 0x8760000500UL)
#define	CIA_IOC_PCI_W1_MASK   (IDENT_ADDR + 0x8760000540UL)
#define	CIA_IOC_PCI_T1_BASE   (IDENT_ADDR + 0x8760000580UL)
#define	CIA_IOC_PCI_W2_BASE   (IDENT_ADDR + 0x8760000600UL)
#define	CIA_IOC_PCI_W2_MASK   (IDENT_ADDR + 0x8760000640UL)
#define	CIA_IOC_PCI_T2_BASE   (IDENT_ADDR + 0x8760000680UL)
#define	CIA_IOC_PCI_W3_BASE   (IDENT_ADDR + 0x8760000700UL)
#define	CIA_IOC_PCI_W3_MASK   (IDENT_ADDR + 0x8760000740UL)
#define	CIA_IOC_PCI_T3_BASE   (IDENT_ADDR + 0x8760000780UL)
#define	CIA_IOC_PCI_Wn_BASE(N)   (IDENT_ADDR + 0x8760000400UL + (N)*0x100)
#define	CIA_IOC_PCI_Wn_MASK(N)   (IDENT_ADDR + 0x8760000440UL + (N)*0x100)
#define	CIA_IOC_PCI_Tn_BASE(N)   (IDENT_ADDR + 0x8760000480UL + (N)*0x100)
#define	CIA_IOC_PCI_W_DAC   (IDENT_ADDR + 0x87600007C0UL)
#define	CIA_IOC_TB_TAGn(n)   (IDENT_ADDR + 0x8760000800UL + (n)*0x40)
#define	CIA_IOC_TBn_PAGEm(n, m)   (IDENT_ADDR + 0x8760001000UL + (n)*0x100 + (m)*0x40)
#define	CIA_IACK_SC   (IDENT_ADDR + 0x8720000000UL)
#define	CIA_CONF   (IDENT_ADDR + 0x8700000000UL)
#define	CIA_IO   (IDENT_ADDR + 0x8580000000UL)
#define	CIA_SPARSE_MEM   (IDENT_ADDR + 0x8000000000UL)
#define	CIA_SPARSE_MEM_R2   (IDENT_ADDR + 0x8400000000UL)
#define	CIA_SPARSE_MEM_R3   (IDENT_ADDR + 0x8500000000UL)
#define	CIA_DENSE_MEM   (IDENT_ADDR + 0x8600000000UL)
#define	CIA_BW_MEM   (IDENT_ADDR + 0x8800000000UL)
#define	CIA_BW_IO   (IDENT_ADDR + 0x8900000000UL)
#define	CIA_BW_CFG_0   (IDENT_ADDR + 0x8a00000000UL)
#define	CIA_BW_CFG_1   (IDENT_ADDR + 0x8b00000000UL)
#define	GRU_INT_REQ   (IDENT_ADDR + 0x8780000000UL)
#define	GRU_INT_MASK   (IDENT_ADDR + 0x8780000040UL)
#define	GRU_INT_EDGE   (IDENT_ADDR + 0x8780000080UL)
#define	GRU_INT_HILO   (IDENT_ADDR + 0x87800000C0UL)
#define	GRU_INT_CLEAR   (IDENT_ADDR + 0x8780000100UL)
#define	GRU_CACHE_CNFG   (IDENT_ADDR + 0x8780000200UL)
#define	GRU_SCR   (IDENT_ADDR + 0x8780000300UL)
#define	GRU_LED   (IDENT_ADDR + 0x8780000800UL)
#define	GRU_RESET   (IDENT_ADDR + 0x8780000900UL)
#define	ALCOR_GRU_INT_REQ_BITS   0x800fffffUL
#define	XLT_GRU_INT_REQ_BITS   0x80003fffUL
#define	GRU_INT_REQ_BITS   (alpha_mv.sys.cia.gru_int_req_bits+0)
#define	PYXIS_INT_REQ   (IDENT_ADDR + 0x87A0000000UL)
#define	PYXIS_INT_MASK   (IDENT_ADDR + 0x87A0000040UL)
#define	PYXIS_INT_HILO   (IDENT_ADDR + 0x87A00000C0UL)
#define	PYXIS_INT_ROUTE   (IDENT_ADDR + 0x87A0000140UL)
#define	PYXIS_GPO   (IDENT_ADDR + 0x87A0000180UL)
#define	PYXIS_INT_CNFG   (IDENT_ADDR + 0x87A00001C0UL)
#define	PYXIS_RT_COUNT   (IDENT_ADDR + 0x87A0000200UL)
#define	PYXIS_INT_TIME   (IDENT_ADDR + 0x87A0000240UL)
#define	PYXIS_IIC_CTRL   (IDENT_ADDR + 0x87A00002C0UL)
#define	PYXIS_RESET   (IDENT_ADDR + 0x8780000900UL)
#define	PYXIS_DAC_OFFSET   (1UL << 40)

Macro Definition Documentation

#define ALCOR_GRU_INT_REQ_BITS   0x800fffffUL

Definition at line 251 of file core_cia.h.

#define CIA_BW_CFG_0   (IDENT_ADDR + 0x8a00000000UL)

Definition at line 234 of file core_cia.h.

#define CIA_BW_CFG_1   (IDENT_ADDR + 0x8b00000000UL)

Definition at line 235 of file core_cia.h.

#define CIA_BW_IO   (IDENT_ADDR + 0x8900000000UL)

Definition at line 233 of file core_cia.h.

#define CIA_BW_MEM   (IDENT_ADDR + 0x8800000000UL)

Definition at line 232 of file core_cia.h.

#define CIA_CACK_EN_BC_VICTIM_EN   (1 << 3)

Definition at line 113 of file core_cia.h.

#define CIA_CACK_EN_LOCK_EN   (1 << 0)

Definition at line 110 of file core_cia.h.

#define CIA_CACK_EN_MB_EN   (1 << 1)

Definition at line 111 of file core_cia.h.

#define CIA_CACK_EN_SET_DIRTY_EN   (1 << 2)

Definition at line 112 of file core_cia.h.

#define CIA_CNFG_IOA_BWEN   (1 << 0)

Definition at line 101 of file core_cia.h.

#define CIA_CNFG_PCI_DWEN   (1 << 5)

Definition at line 103 of file core_cia.h.

#define CIA_CNFG_PCI_MWEN   (1 << 4)

Definition at line 102 of file core_cia.h.

#define CIA_CNFG_PCI_WLEN   (1 << 8)

Definition at line 104 of file core_cia.h.

#define CIA_CONF   (IDENT_ADDR + 0x8700000000UL)

Definition at line 226 of file core_cia.h.

#define CIA_CTRL_ADDR_PE_EN   (1 << 8)

Definition at line 84 of file core_cia.h.

#define CIA_CTRL_ARB_CPU_EN   (1 << 18)

Definition at line 94 of file core_cia.h.

#define CIA_CTRL_ASSERT_IDLE_BC   (1 << 13)

Definition at line 89 of file core_cia.h.

#define CIA_CTRL_COM_IDLE_BC   (1 << 14)

Definition at line 90 of file core_cia.h.

#define CIA_CTRL_CPU_FLUSHREQ_EN   (1 << 17)

Definition at line 93 of file core_cia.h.

#define CIA_CTRL_CSR_IOA_BYPASS   (1 << 15)

Definition at line 91 of file core_cia.h.

#define CIA_CTRL_ECC_CHK_EN   (1 << 12)

Definition at line 88 of file core_cia.h.

#define CIA_CTRL_EN_ARB_LINK   (1 << 19)

Definition at line 95 of file core_cia.h.

#define CIA_CTRL_EN_DMA_RD_PERF   (1 << 31)

Definition at line 99 of file core_cia.h.

#define CIA_CTRL_FILL_ERR_EN   (1 << 10)

Definition at line 86 of file core_cia.h.

#define CIA_CTRL_FST_BB_EN   (1 << 3)

Definition at line 79 of file core_cia.h.

#define CIA_CTRL_IO_FLUSHREQ_EN   (1 << 16)

Definition at line 92 of file core_cia.h.

#define CIA_CTRL_MCHK_ERR_EN   (1 << 11)

Definition at line 87 of file core_cia.h.

#define CIA_CTRL_PCI_ACK64_EN   (1 << 7)

Definition at line 83 of file core_cia.h.

#define CIA_CTRL_PCI_EN   (1 << 0)

Definition at line 76 of file core_cia.h.

#define CIA_CTRL_PCI_LOCK_EN   (1 << 1)

Definition at line 77 of file core_cia.h.

#define CIA_CTRL_PCI_LOOP_EN   (1 << 2)

Definition at line 78 of file core_cia.h.

#define CIA_CTRL_PCI_MEM_EN   (1 << 5)

Definition at line 81 of file core_cia.h.

#define CIA_CTRL_PCI_MST_EN   (1 << 4)

Definition at line 80 of file core_cia.h.

#define CIA_CTRL_PCI_REQ64_EN   (1 << 6)

Definition at line 82 of file core_cia.h.

#define CIA_CTRL_PERR_EN   (1 << 9)

Definition at line 85 of file core_cia.h.

#define CIA_CTRL_RD_TYPE_SHIFT   20

Definition at line 96 of file core_cia.h.

#define CIA_CTRL_RL_TYPE_SHIFT   24

Definition at line 97 of file core_cia.h.

#define CIA_CTRL_RM_TYPE_SHIFT   28

Definition at line 98 of file core_cia.h.

#define CIA_DENSE_MEM   (IDENT_ADDR + 0x8600000000UL)

Definition at line 231 of file core_cia.h.

#define CIA_ERR_COR_ERR   (1 << 0)

Definition at line 134 of file core_cia.h.

#define CIA_ERR_CPU_PE   (1 << 2)

Definition at line 136 of file core_cia.h.

#define CIA_ERR_FROM_WRT_ERR   (1 << 10)

Definition at line 144 of file core_cia.h.

#define CIA_ERR_IOA_TIMEOUT   (1 << 11)

Definition at line 145 of file core_cia.h.

#define CIA_ERR_LOST_CORR_ERR   (1 << 16)

Definition at line 146 of file core_cia.h.

#define CIA_ERR_LOST_CPU_PE   (1 << 18)

Definition at line 148 of file core_cia.h.

#define CIA_ERR_LOST_FROM_WRT_ERR   (1 << 26)

Definition at line 155 of file core_cia.h.

#define CIA_ERR_LOST_IOA_TIMEOUT   (1 << 27)

Definition at line 156 of file core_cia.h.

#define CIA_ERR_LOST_MEM_NEM   (1 << 19)

Definition at line 149 of file core_cia.h.

#define CIA_ERR_LOST_PA_PTE_INV   (1 << 25)

Definition at line 154 of file core_cia.h.

#define CIA_ERR_LOST_PCI_ADDR_PE   (1 << 22)

Definition at line 151 of file core_cia.h.

#define CIA_ERR_LOST_PERR   (1 << 21)

Definition at line 150 of file core_cia.h.

#define CIA_ERR_LOST_RCVD_MAS_ABT   (1 << 23)

Definition at line 152 of file core_cia.h.

#define CIA_ERR_LOST_RCVD_TAR_ABT   (1 << 24)

Definition at line 153 of file core_cia.h.

#define CIA_ERR_LOST_UN_CORR_ERR   (1 << 17)

Definition at line 147 of file core_cia.h.

#define CIA_ERR_MEM_NEM   (1 << 3)

Definition at line 137 of file core_cia.h.

#define CIA_ERR_PA_PTE_INV   (1 << 9)

Definition at line 143 of file core_cia.h.

#define CIA_ERR_PCI_ADDR_PE   (1 << 6)

Definition at line 140 of file core_cia.h.

#define CIA_ERR_PCI_SERR   (1 << 4)

Definition at line 138 of file core_cia.h.

#define CIA_ERR_PERR   (1 << 5)

Definition at line 139 of file core_cia.h.

#define CIA_ERR_RCVD_MAS_ABT   (1 << 7)

Definition at line 141 of file core_cia.h.

#define CIA_ERR_RCVD_TAR_ABT   (1 << 8)

Definition at line 142 of file core_cia.h.

#define CIA_ERR_UN_COR_ERR   (1 << 1)

Definition at line 135 of file core_cia.h.

#define CIA_ERR_VALID   (1 << 31)

Definition at line 157 of file core_cia.h.

#define CIA_IACK_SC   (IDENT_ADDR + 0x8720000000UL)

Definition at line 225 of file core_cia.h.

#define CIA_IO   (IDENT_ADDR + 0x8580000000UL)

Definition at line 227 of file core_cia.h.

#define CIA_IOC_CACK_EN   (IDENT_ADDR + 0x8740000600UL)

Definition at line 109 of file core_cia.h.

#define CIA_IOC_CFG   (IDENT_ADDR + 0x8740000480UL)

Definition at line 108 of file core_cia.h.

#define CIA_IOC_CIA_CNFG   (IDENT_ADDR + 0x8740000140UL)

Definition at line 100 of file core_cia.h.

#define CIA_IOC_CIA_CTRL   (IDENT_ADDR + 0x8740000100UL)

Definition at line 75 of file core_cia.h.

#define CIA_IOC_CIA_DIAG   (IDENT_ADDR + 0x8740002000UL)

Definition at line 119 of file core_cia.h.

#define CIA_IOC_CIA_ERR   (IDENT_ADDR + 0x8740008200UL)

Definition at line 133 of file core_cia.h.

#define CIA_IOC_CIA_REV   (IDENT_ADDR + 0x8740000080UL)

Definition at line 72 of file core_cia.h.

#define CIA_IOC_CIA_STAT   (IDENT_ADDR + 0x8740008240UL)

Definition at line 158 of file core_cia.h.

#define CIA_IOC_CIA_SYN   (IDENT_ADDR + 0x8740008300UL)

Definition at line 160 of file core_cia.h.

#define CIA_IOC_CPU_ERR0   (IDENT_ADDR + 0x8740008000UL)

Definition at line 131 of file core_cia.h.

#define CIA_IOC_CPU_ERR1   (IDENT_ADDR + 0x8740008040UL)

Definition at line 132 of file core_cia.h.

#define CIA_IOC_DIAG_CHECK   (IDENT_ADDR + 0x8740003000UL)

Definition at line 120 of file core_cia.h.

#define CIA_IOC_ERR_MASK   (IDENT_ADDR + 0x8740008280UL)

Definition at line 159 of file core_cia.h.

#define CIA_IOC_FLASH_CTRL   (IDENT_ADDR + 0x8740000200UL)

Definition at line 105 of file core_cia.h.

#define CIA_IOC_HAE_IO   (IDENT_ADDR + 0x8740000440UL)

Definition at line 107 of file core_cia.h.

#define CIA_IOC_HAE_MEM   (IDENT_ADDR + 0x8740000400UL)

Definition at line 106 of file core_cia.h.

#define CIA_IOC_MBA0   (IDENT_ADDR + 0x8750000600UL)

Definition at line 171 of file core_cia.h.

#define CIA_IOC_MBA2   (IDENT_ADDR + 0x8750000680UL)

Definition at line 172 of file core_cia.h.

#define CIA_IOC_MBA4   (IDENT_ADDR + 0x8750000700UL)

Definition at line 173 of file core_cia.h.

#define CIA_IOC_MBA6   (IDENT_ADDR + 0x8750000780UL)

Definition at line 174 of file core_cia.h.

#define CIA_IOC_MBA8   (IDENT_ADDR + 0x8750000800UL)

Definition at line 175 of file core_cia.h.

#define CIA_IOC_MBAA   (IDENT_ADDR + 0x8750000880UL)

Definition at line 176 of file core_cia.h.

#define CIA_IOC_MBAC   (IDENT_ADDR + 0x8750000900UL)

Definition at line 177 of file core_cia.h.

#define CIA_IOC_MBAE   (IDENT_ADDR + 0x8750000980UL)

Definition at line 178 of file core_cia.h.

#define CIA_IOC_MCR   (IDENT_ADDR + 0x8750000000UL)

Definition at line 170 of file core_cia.h.

#define CIA_IOC_MEM_ERR0   (IDENT_ADDR + 0x8740008400UL)

Definition at line 161 of file core_cia.h.

#define CIA_IOC_MEM_ERR1   (IDENT_ADDR + 0x8740008440UL)

Definition at line 162 of file core_cia.h.

#define CIA_IOC_PCI_ERR0   (IDENT_ADDR + 0x8740008800UL)

Definition at line 163 of file core_cia.h.

#define CIA_IOC_PCI_ERR1   (IDENT_ADDR + 0x8740008840UL)

Definition at line 164 of file core_cia.h.

#define CIA_IOC_PCI_ERR3   (IDENT_ADDR + 0x8740008880UL)

Definition at line 165 of file core_cia.h.

#define CIA_IOC_PCI_LAT   (IDENT_ADDR + 0x87400000C0UL)

Definition at line 74 of file core_cia.h.

#define CIA_IOC_PCI_T0_BASE   (IDENT_ADDR + 0x8760000480UL)

Definition at line 190 of file core_cia.h.

#define CIA_IOC_PCI_T1_BASE   (IDENT_ADDR + 0x8760000580UL)

Definition at line 194 of file core_cia.h.

#define CIA_IOC_PCI_T2_BASE   (IDENT_ADDR + 0x8760000680UL)

Definition at line 198 of file core_cia.h.

#define CIA_IOC_PCI_T3_BASE   (IDENT_ADDR + 0x8760000780UL)

Definition at line 202 of file core_cia.h.

#define CIA_IOC_PCI_TBIA   (IDENT_ADDR + 0x8760000100UL)

Definition at line 186 of file core_cia.h.

#define CIA_IOC_PCI_Tn_BASE

(

N

)

(IDENT_ADDR + 0x8760000480UL + (N)*0x100)

Definition at line 206 of file core_cia.h.

#define CIA_IOC_PCI_W0_BASE   (IDENT_ADDR + 0x8760000400UL)

Definition at line 188 of file core_cia.h.

#define CIA_IOC_PCI_W0_MASK   (IDENT_ADDR + 0x8760000440UL)

Definition at line 189 of file core_cia.h.

#define CIA_IOC_PCI_W1_BASE   (IDENT_ADDR + 0x8760000500UL)

Definition at line 192 of file core_cia.h.

#define CIA_IOC_PCI_W1_MASK   (IDENT_ADDR + 0x8760000540UL)

Definition at line 193 of file core_cia.h.

#define CIA_IOC_PCI_W2_BASE   (IDENT_ADDR + 0x8760000600UL)

Definition at line 196 of file core_cia.h.

#define CIA_IOC_PCI_W2_MASK   (IDENT_ADDR + 0x8760000640UL)

Definition at line 197 of file core_cia.h.

#define CIA_IOC_PCI_W3_BASE   (IDENT_ADDR + 0x8760000700UL)

Definition at line 200 of file core_cia.h.

#define CIA_IOC_PCI_W3_MASK   (IDENT_ADDR + 0x8760000740UL)

Definition at line 201 of file core_cia.h.

#define CIA_IOC_PCI_W_DAC   (IDENT_ADDR + 0x87600007C0UL)

Definition at line 208 of file core_cia.h.

#define CIA_IOC_PCI_Wn_BASE

(

N

)

(IDENT_ADDR + 0x8760000400UL + (N)*0x100)

Definition at line 204 of file core_cia.h.

#define CIA_IOC_PCI_Wn_MASK

(

N

)

(IDENT_ADDR + 0x8760000440UL + (N)*0x100)

Definition at line 205 of file core_cia.h.

#define CIA_IOC_PERF_CONTROL   (IDENT_ADDR + 0x8740004040UL)

Definition at line 126 of file core_cia.h.

#define CIA_IOC_PERF_MONITOR   (IDENT_ADDR + 0x8740004000UL)

Definition at line 125 of file core_cia.h.

#define CIA_IOC_TB_TAGn

(

n

)

(IDENT_ADDR + 0x8760000800UL + (n)*0x40)

Definition at line 215 of file core_cia.h.

#define CIA_IOC_TBn_PAGEm	(		n,
			m
	)		(IDENT_ADDR + 0x8760001000UL + (n)*0x100 + (m)*0x40)

Definition at line 219 of file core_cia.h.

#define CIA_IOC_TMG0   (IDENT_ADDR + 0x8750000B00UL)

Definition at line 179 of file core_cia.h.

#define CIA_IOC_TMG1   (IDENT_ADDR + 0x8750000B40UL)

Definition at line 180 of file core_cia.h.

#define CIA_IOC_TMG2   (IDENT_ADDR + 0x8750000B80UL)

Definition at line 181 of file core_cia.h.

#define CIA_MEM_R1_MASK   0x1fffffff /* SPARSE Mem region 1 mask is 29 bits */

Definition at line 65 of file core_cia.h.

#define CIA_MEM_R2_MASK   0x07ffffff /* SPARSE Mem region 2 mask is 27 bits */

Definition at line 66 of file core_cia.h.

#define CIA_MEM_R3_MASK   0x03ffffff /* SPARSE Mem region 3 mask is 26 bits */

Definition at line 67 of file core_cia.h.

#define CIA_ONE_HAE_WINDOW   1

Definition at line 5 of file core_cia.h.

#define CIA_REV_MASK   0xff

Definition at line 73 of file core_cia.h.

#define CIA_SPARSE_MEM   (IDENT_ADDR + 0x8000000000UL)

Definition at line 228 of file core_cia.h.

#define CIA_SPARSE_MEM_R2   (IDENT_ADDR + 0x8400000000UL)

Definition at line 229 of file core_cia.h.

#define CIA_SPARSE_MEM_R3   (IDENT_ADDR + 0x8500000000UL)

Definition at line 230 of file core_cia.h.

#define GRU_CACHE_CNFG   (IDENT_ADDR + 0x8780000200UL)

Definition at line 246 of file core_cia.h.

#define GRU_INT_CLEAR   (IDENT_ADDR + 0x8780000100UL)

Definition at line 244 of file core_cia.h.

#define GRU_INT_EDGE   (IDENT_ADDR + 0x8780000080UL)

Definition at line 242 of file core_cia.h.

#define GRU_INT_HILO   (IDENT_ADDR + 0x87800000C0UL)

Definition at line 243 of file core_cia.h.

#define GRU_INT_MASK   (IDENT_ADDR + 0x8780000040UL)

Definition at line 241 of file core_cia.h.

#define GRU_INT_REQ   (IDENT_ADDR + 0x8780000000UL)

Definition at line 240 of file core_cia.h.

#define GRU_INT_REQ_BITS   (alpha_mv.sys.cia.gru_int_req_bits+0)

Definition at line 253 of file core_cia.h.

#define GRU_LED   (IDENT_ADDR + 0x8780000800UL)

Definition at line 248 of file core_cia.h.

#define GRU_RESET   (IDENT_ADDR + 0x8780000900UL)

Definition at line 249 of file core_cia.h.

#define GRU_SCR   (IDENT_ADDR + 0x8780000300UL)

Definition at line 247 of file core_cia.h.

#define PYXIS_DAC_OFFSET   (1UL << 40)

Definition at line 270 of file core_cia.h.

#define PYXIS_GPO   (IDENT_ADDR + 0x87A0000180UL)

Definition at line 262 of file core_cia.h.

#define PYXIS_IIC_CTRL   (IDENT_ADDR + 0x87A00002C0UL)

Definition at line 266 of file core_cia.h.

#define PYXIS_INT_CNFG   (IDENT_ADDR + 0x87A00001C0UL)

Definition at line 263 of file core_cia.h.

#define PYXIS_INT_HILO   (IDENT_ADDR + 0x87A00000C0UL)

Definition at line 260 of file core_cia.h.

#define PYXIS_INT_MASK   (IDENT_ADDR + 0x87A0000040UL)

Definition at line 259 of file core_cia.h.

#define PYXIS_INT_REQ   (IDENT_ADDR + 0x87A0000000UL)

Definition at line 258 of file core_cia.h.

#define PYXIS_INT_ROUTE   (IDENT_ADDR + 0x87A0000140UL)

Definition at line 261 of file core_cia.h.

#define PYXIS_INT_TIME   (IDENT_ADDR + 0x87A0000240UL)

Definition at line 265 of file core_cia.h.

#define PYXIS_RESET   (IDENT_ADDR + 0x8780000900UL)

Definition at line 267 of file core_cia.h.

#define PYXIS_RT_COUNT   (IDENT_ADDR + 0x87A0000200UL)

Definition at line 264 of file core_cia.h.

#define XLT_GRU_INT_REQ_BITS   0x80003fffUL

Definition at line 252 of file core_cia.h.