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33 #ifndef _CPCIHP_ZT5550_H
34 #define _CPCIHP_ZT5550_H
37 #define CSR_HCINDEX 0x00
38 #define CSR_HCDATA 0x04
39 #define CSR_INTSTAT 0x08
40 #define CSR_INTMASK 0x09
41 #define CSR_CNT0CMD 0x0C
42 #define CSR_CNT1CMD 0x0E
47 #define CNT0_INT_MASK 0x01
48 #define CNT1_INT_MASK 0x02
49 #define ENUM_INT_MASK 0x04
50 #define ALL_DIRECT_INTS_MASK 0x07
53 #define HC_INT_MASK_REG 0x04
54 #define HC_STATUS_REG 0x08
55 #define HC_CMD_REG 0x0C
56 #define ARB_CONFIG_GNT_REG 0x10
57 #define ARB_CONFIG_CFG_REG 0x12
58 #define ARB_CONFIG_REG 0x10
59 #define ISOL_CONFIG_REG 0x18
60 #define FAULT_STATUS_REG 0x20
61 #define FAULT_CONFIG_REG 0x24
62 #define WD_CONFIG_REG 0x2C
63 #define HC_DIAG_REG 0x30
64 #define SERIAL_COMM_REG 0x34
65 #define SERIAL_OUT_REG 0x38
66 #define SERIAL_IN_REG 0x3C
69 #define SERIAL_INT_MASK 0x01
70 #define FAULT_INT_MASK 0x02
71 #define HCF_INT_MASK 0x04
72 #define ALL_INDEXED_INTS_MASK 0x07
75 #define ENUM_PORT 0xE1
77 #define ENUM_MASK 0x40