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Linux Kernel
3.7.1
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Go to the source code of this file.
Macros | |
| #define | CSR_HCINDEX 0x00 |
| #define | CSR_HCDATA 0x04 |
| #define | CSR_INTSTAT 0x08 |
| #define | CSR_INTMASK 0x09 |
| #define | CSR_CNT0CMD 0x0C |
| #define | CSR_CNT1CMD 0x0E |
| #define | CSR_CNT0 0x10 |
| #define | CSR_CNT1 0x14 |
| #define | CNT0_INT_MASK 0x01 |
| #define | CNT1_INT_MASK 0x02 |
| #define | ENUM_INT_MASK 0x04 |
| #define | ALL_DIRECT_INTS_MASK 0x07 |
| #define | HC_INT_MASK_REG 0x04 |
| #define | HC_STATUS_REG 0x08 |
| #define | HC_CMD_REG 0x0C |
| #define | ARB_CONFIG_GNT_REG 0x10 |
| #define | ARB_CONFIG_CFG_REG 0x12 |
| #define | ARB_CONFIG_REG 0x10 |
| #define | ISOL_CONFIG_REG 0x18 |
| #define | FAULT_STATUS_REG 0x20 |
| #define | FAULT_CONFIG_REG 0x24 |
| #define | WD_CONFIG_REG 0x2C |
| #define | HC_DIAG_REG 0x30 |
| #define | SERIAL_COMM_REG 0x34 |
| #define | SERIAL_OUT_REG 0x38 |
| #define | SERIAL_IN_REG 0x3C |
| #define | SERIAL_INT_MASK 0x01 |
| #define | FAULT_INT_MASK 0x02 |
| #define | HCF_INT_MASK 0x04 |
| #define | ALL_INDEXED_INTS_MASK 0x07 |
| #define | ENUM_PORT 0xE1 |
| #define | ENUM_MASK 0x40 |
| #define ALL_DIRECT_INTS_MASK 0x07 |
Definition at line 50 of file cpcihp_zt5550.h.
| #define ALL_INDEXED_INTS_MASK 0x07 |
Definition at line 72 of file cpcihp_zt5550.h.
| #define ARB_CONFIG_CFG_REG 0x12 |
Definition at line 57 of file cpcihp_zt5550.h.
| #define ARB_CONFIG_GNT_REG 0x10 |
Definition at line 56 of file cpcihp_zt5550.h.
| #define ARB_CONFIG_REG 0x10 |
Definition at line 58 of file cpcihp_zt5550.h.
| #define CNT0_INT_MASK 0x01 |
Definition at line 47 of file cpcihp_zt5550.h.
| #define CNT1_INT_MASK 0x02 |
Definition at line 48 of file cpcihp_zt5550.h.
| #define CSR_CNT0 0x10 |
Definition at line 43 of file cpcihp_zt5550.h.
| #define CSR_CNT0CMD 0x0C |
Definition at line 41 of file cpcihp_zt5550.h.
| #define CSR_CNT1 0x14 |
Definition at line 44 of file cpcihp_zt5550.h.
| #define CSR_CNT1CMD 0x0E |
Definition at line 42 of file cpcihp_zt5550.h.
| #define CSR_HCDATA 0x04 |
Definition at line 38 of file cpcihp_zt5550.h.
| #define CSR_HCINDEX 0x00 |
Definition at line 37 of file cpcihp_zt5550.h.
| #define CSR_INTMASK 0x09 |
Definition at line 40 of file cpcihp_zt5550.h.
| #define CSR_INTSTAT 0x08 |
Definition at line 39 of file cpcihp_zt5550.h.
| #define ENUM_INT_MASK 0x04 |
Definition at line 49 of file cpcihp_zt5550.h.
| #define ENUM_MASK 0x40 |
Definition at line 77 of file cpcihp_zt5550.h.
| #define ENUM_PORT 0xE1 |
Definition at line 75 of file cpcihp_zt5550.h.
| #define FAULT_CONFIG_REG 0x24 |
Definition at line 61 of file cpcihp_zt5550.h.
| #define FAULT_INT_MASK 0x02 |
Definition at line 70 of file cpcihp_zt5550.h.
| #define FAULT_STATUS_REG 0x20 |
Definition at line 60 of file cpcihp_zt5550.h.
| #define HC_CMD_REG 0x0C |
Definition at line 55 of file cpcihp_zt5550.h.
| #define HC_DIAG_REG 0x30 |
Definition at line 63 of file cpcihp_zt5550.h.
| #define HC_INT_MASK_REG 0x04 |
Definition at line 53 of file cpcihp_zt5550.h.
| #define HC_STATUS_REG 0x08 |
Definition at line 54 of file cpcihp_zt5550.h.
| #define HCF_INT_MASK 0x04 |
Definition at line 71 of file cpcihp_zt5550.h.
| #define ISOL_CONFIG_REG 0x18 |
Definition at line 59 of file cpcihp_zt5550.h.
| #define SERIAL_COMM_REG 0x34 |
Definition at line 64 of file cpcihp_zt5550.h.
| #define SERIAL_IN_REG 0x3C |
Definition at line 66 of file cpcihp_zt5550.h.
| #define SERIAL_INT_MASK 0x01 |
Definition at line 69 of file cpcihp_zt5550.h.
| #define SERIAL_OUT_REG 0x38 |
Definition at line 65 of file cpcihp_zt5550.h.
| #define WD_CONFIG_REG 0x2C |
Definition at line 62 of file cpcihp_zt5550.h.
1.8.2