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42 #define MEMSET_BY_BLOCK_THRESHOLD (1 * 48)
45 __asm__ (
".syntax no_register_prefix");
52 register char *return_dst
__asm__ (
"r10") = pdst;
74 if (((
unsigned long) pdst & 3) != 0
78 if ((
unsigned long)
dst & 1)
85 if ((
unsigned long) dst & 2)
102 ;; GCC does promise correct register allocations, but let's \n\
103 ;; make sure it keeps its promises. \n\
104 .ifnc %0-%1-%4,$r13-$r12-$r11 \n\
105 .error \"GCC reg alloc bug: %0-%1-%4 != $r13-$r12-$r11\" \n\
108 ;; Save the registers we'll clobber in the movem process \n\
109 ;; on the stack. Don't mention them to gcc, it will only be \n\
126 ;; Now we've got this: \n\
130 ;; Update n for the first loop \n\
134 #ifdef __arch_common_v10_v32
143 ;; Compensate for last loop underflowing n. \n\
146 ;; Restore registers from stack. \n\
150 :
"=r" (
dst),
"=r" (
n)
153 :
"0" (
dst),
"1" (
n),
"r" (
lc));
176 *(
short *)
dst = (
short)
lc;
180 *(
short *)
dst = (
short)
lc;
dst += 2;
195 *(
short *)
dst = (
short)
lc;
200 *(
short *)
dst = (
short)
lc;
dst += 2;
218 *(
short *)
dst = (
short)
lc;
224 *(
short *)
dst = (
short)
lc;
dst += 2;
245 *(
short *)
dst = (
short)
lc;
252 *(
short *)
dst = (
short)
lc;
dst += 2;