Linux Kernel
3.7.1
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Macros | |
#define | WC 0x1b7000 |
#define | TIMR 0x1b7004 |
#define | TIMR_IE (1<<15) |
#define | TIMR_IP (1<<14) |
#define | GIP 0x1b7010 |
#define | GIE 0x1b7014 |
#define | I2C_IF_ADDRESS 0x1B9000 |
#define | I2C_IF_WDATA 0x1B9004 |
#define | I2C_IF_RDATA 0x1B9008 |
#define | I2C_IF_STATUS 0x1B900C |
#define | I2C_IF_WLOCK 0x1B9010 |
#define | GLOBAL_CNTL_GCTL 0x1B7090 |
#define | PLL_CTL 0x1B7080 |
#define | PLL_STAT 0x1B7084 |
#define | PLL_ENB 0x1B7088 |
#define | SRC_CTL 0x1A0000 /* 0x1A0000 + (256 * Chn) */ |
#define | SRC_CCR 0x1A0004 /* 0x1A0004 + (256 * Chn) */ |
#define | SRC_IMAP 0x1A0008 /* 0x1A0008 + (256 * Chn) */ |
#define | SRC_CA 0x1A0010 /* 0x1A0010 + (256 * Chn) */ |
#define | SRC_CF 0x1A0014 /* 0x1A0014 + (256 * Chn) */ |
#define | SRC_SA 0x1A0018 /* 0x1A0018 + (256 * Chn) */ |
#define | SRC_LA 0x1A001C /* 0x1A001C + (256 * Chn) */ |
#define | SRC_CTLSWR 0x1A0020 /* 0x1A0020 + (256 * Chn) */ |
#define | SRC_CD 0x1A0080 /* 0x1A0080 + (256 * Chn) + (4 * Regn) */ |
#define | SRC_MCTL 0x1A012C |
#define | SRC_IP 0x1A102C /* 0x1A102C + (256 * Regn) */ |
#define | SRC_ENB 0x1A282C /* 0x1A282C + (256 * Regn) */ |
#define | SRC_ENBSTAT 0x1A202C |
#define | SRC_ENBSA 0x1A232C |
#define | SRC_DN0Z 0x1A0030 |
#define | SRC_DN1Z 0x1A0040 |
#define | SRC_UPZ 0x1A0060 |
#define | GPIO_DATA 0x1B7020 |
#define | GPIO_CTRL 0x1B7024 |
#define | GPIO_EXT_DATA 0x1B70A0 |
#define | VMEM_PTPAL 0x1C6300 /* 0x1C6300 + (16 * Chn) */ |
#define | VMEM_PTPAH 0x1C6304 /* 0x1C6304 + (16 * Chn) */ |
#define | VMEM_CTL 0x1C7000 |
#define | TRANSPORT_ENB 0x1B6000 |
#define | TRANSPORT_CTL 0x1B6004 |
#define | TRANSPORT_INT 0x1B6008 |
#define | AUDIO_IO_AIM 0x1B5000 /* 0x1B5000 + (0x04 * Chn) */ |
#define | AUDIO_IO_TX_CTL 0x1B5400 /* 0x1B5400 + (0x40 * Chn) */ |
#define | AUDIO_IO_TX_CSTAT_L 0x1B5408 /* 0x1B5408 + (0x40 * Chn) */ |
#define | AUDIO_IO_TX_CSTAT_H 0x1B540C /* 0x1B540C + (0x40 * Chn) */ |
#define | AUDIO_IO_RX_CTL 0x1B5410 /* 0x1B5410 + (0x40 * Chn) */ |
#define | AUDIO_IO_RX_SRT_CTL 0x1B5420 /* 0x1B5420 + (0x40 * Chn) */ |
#define | AUDIO_IO_MCLK 0x1B5600 |
#define | AUDIO_IO_TX_BLRCLK 0x1B5604 |
#define | AUDIO_IO_RX_BLRCLK 0x1B5608 |
#define | MIXER_AMOPLO 0x130000 /* 0x130000 + (8 * Chn) [4095 : 0] */ |
#define | MIXER_AMOPHI 0x130004 /* 0x130004 + (8 * Chn) [4095 : 0] */ |
#define | MIXER_PRING_LO_HI 0x188000 /* 0x188000 + (4 * Chn) [4095 : 0] */ |
#define | MIXER_PMOPLO 0x138000 /* 0x138000 + (8 * Chn) [4095 : 0] */ |
#define | MIXER_PMOPHI 0x138004 /* 0x138004 + (8 * Chn) [4095 : 0] */ |
#define | MIXER_AR_ENABLE 0x19000C |
#define AUDIO_IO_AIM 0x1B5000 /* 0x1B5000 + (0x04 * Chn) */ |
Definition at line 71 of file ct20k2reg.h.
#define AUDIO_IO_MCLK 0x1B5600 |
Definition at line 77 of file ct20k2reg.h.
#define AUDIO_IO_RX_BLRCLK 0x1B5608 |
Definition at line 79 of file ct20k2reg.h.
#define AUDIO_IO_RX_CTL 0x1B5410 /* 0x1B5410 + (0x40 * Chn) */ |
Definition at line 75 of file ct20k2reg.h.
#define AUDIO_IO_RX_SRT_CTL 0x1B5420 /* 0x1B5420 + (0x40 * Chn) */ |
Definition at line 76 of file ct20k2reg.h.
#define AUDIO_IO_TX_BLRCLK 0x1B5604 |
Definition at line 78 of file ct20k2reg.h.
#define AUDIO_IO_TX_CSTAT_H 0x1B540C /* 0x1B540C + (0x40 * Chn) */ |
Definition at line 74 of file ct20k2reg.h.
#define AUDIO_IO_TX_CSTAT_L 0x1B5408 /* 0x1B5408 + (0x40 * Chn) */ |
Definition at line 73 of file ct20k2reg.h.
#define AUDIO_IO_TX_CTL 0x1B5400 /* 0x1B5400 + (0x40 * Chn) */ |
Definition at line 72 of file ct20k2reg.h.
#define GIE 0x1b7014 |
Definition at line 19 of file ct20k2reg.h.
#define GIP 0x1b7010 |
Definition at line 18 of file ct20k2reg.h.
#define GLOBAL_CNTL_GCTL 0x1B7090 |
Definition at line 29 of file ct20k2reg.h.
#define GPIO_CTRL 0x1B7024 |
Definition at line 57 of file ct20k2reg.h.
#define GPIO_DATA 0x1B7020 |
Definition at line 56 of file ct20k2reg.h.
#define GPIO_EXT_DATA 0x1B70A0 |
Definition at line 58 of file ct20k2reg.h.
#define I2C_IF_ADDRESS 0x1B9000 |
Definition at line 22 of file ct20k2reg.h.
#define I2C_IF_RDATA 0x1B9008 |
Definition at line 24 of file ct20k2reg.h.
#define I2C_IF_STATUS 0x1B900C |
Definition at line 25 of file ct20k2reg.h.
#define I2C_IF_WDATA 0x1B9004 |
Definition at line 23 of file ct20k2reg.h.
#define I2C_IF_WLOCK 0x1B9010 |
Definition at line 26 of file ct20k2reg.h.
#define MIXER_AMOPHI 0x130004 /* 0x130004 + (8 * Chn) [4095 : 0] */ |
Definition at line 83 of file ct20k2reg.h.
#define MIXER_AMOPLO 0x130000 /* 0x130000 + (8 * Chn) [4095 : 0] */ |
Definition at line 82 of file ct20k2reg.h.
#define MIXER_AR_ENABLE 0x19000C |
Definition at line 87 of file ct20k2reg.h.
#define MIXER_PMOPHI 0x138004 /* 0x138004 + (8 * Chn) [4095 : 0] */ |
Definition at line 86 of file ct20k2reg.h.
#define MIXER_PMOPLO 0x138000 /* 0x138000 + (8 * Chn) [4095 : 0] */ |
Definition at line 85 of file ct20k2reg.h.
#define MIXER_PRING_LO_HI 0x188000 /* 0x188000 + (4 * Chn) [4095 : 0] */ |
Definition at line 84 of file ct20k2reg.h.
#define PLL_CTL 0x1B7080 |
Definition at line 32 of file ct20k2reg.h.
#define PLL_ENB 0x1B7088 |
Definition at line 34 of file ct20k2reg.h.
#define PLL_STAT 0x1B7084 |
Definition at line 33 of file ct20k2reg.h.
#define SRC_CA 0x1A0010 /* 0x1A0010 + (256 * Chn) */ |
Definition at line 40 of file ct20k2reg.h.
#define SRC_CCR 0x1A0004 /* 0x1A0004 + (256 * Chn) */ |
Definition at line 38 of file ct20k2reg.h.
#define SRC_CD 0x1A0080 /* 0x1A0080 + (256 * Chn) + (4 * Regn) */ |
Definition at line 45 of file ct20k2reg.h.
#define SRC_CF 0x1A0014 /* 0x1A0014 + (256 * Chn) */ |
Definition at line 41 of file ct20k2reg.h.
#define SRC_CTL 0x1A0000 /* 0x1A0000 + (256 * Chn) */ |
Definition at line 37 of file ct20k2reg.h.
#define SRC_CTLSWR 0x1A0020 /* 0x1A0020 + (256 * Chn) */ |
Definition at line 44 of file ct20k2reg.h.
#define SRC_DN0Z 0x1A0030 |
Definition at line 51 of file ct20k2reg.h.
#define SRC_DN1Z 0x1A0040 |
Definition at line 52 of file ct20k2reg.h.
#define SRC_ENB 0x1A282C /* 0x1A282C + (256 * Regn) */ |
Definition at line 48 of file ct20k2reg.h.
#define SRC_ENBSA 0x1A232C |
Definition at line 50 of file ct20k2reg.h.
#define SRC_ENBSTAT 0x1A202C |
Definition at line 49 of file ct20k2reg.h.
#define SRC_IMAP 0x1A0008 /* 0x1A0008 + (256 * Chn) */ |
Definition at line 39 of file ct20k2reg.h.
#define SRC_IP 0x1A102C /* 0x1A102C + (256 * Regn) */ |
Definition at line 47 of file ct20k2reg.h.
#define SRC_LA 0x1A001C /* 0x1A001C + (256 * Chn) */ |
Definition at line 43 of file ct20k2reg.h.
#define SRC_MCTL 0x1A012C |
Definition at line 46 of file ct20k2reg.h.
#define SRC_SA 0x1A0018 /* 0x1A0018 + (256 * Chn) */ |
Definition at line 42 of file ct20k2reg.h.
#define SRC_UPZ 0x1A0060 |
Definition at line 53 of file ct20k2reg.h.
#define TIMR 0x1b7004 |
Definition at line 15 of file ct20k2reg.h.
#define TIMR_IE (1<<15) |
Definition at line 16 of file ct20k2reg.h.
#define TIMR_IP (1<<14) |
Definition at line 17 of file ct20k2reg.h.
#define TRANSPORT_CTL 0x1B6004 |
Definition at line 67 of file ct20k2reg.h.
#define TRANSPORT_ENB 0x1B6000 |
Definition at line 66 of file ct20k2reg.h.
#define TRANSPORT_INT 0x1B6008 |
Definition at line 68 of file ct20k2reg.h.
#define VMEM_CTL 0x1C7000 |
Definition at line 63 of file ct20k2reg.h.
#define VMEM_PTPAH 0x1C6304 /* 0x1C6304 + (16 * Chn) */ |
Definition at line 62 of file ct20k2reg.h.
#define VMEM_PTPAL 0x1C6300 /* 0x1C6300 + (16 * Chn) */ |
Definition at line 61 of file ct20k2reg.h.
#define WC 0x1b7000 |
Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved.
This source file is released under GPL v2 license (no other versions). See the COPYING file included in the main directory of this source distribution for the license terms and conditions.
Definition at line 14 of file ct20k2reg.h.