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Data Structures | Macros
cvmx-npei-defs.h File Reference

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Data Structures

union  cvmx_npei_bar1_indexx
 
struct  cvmx_npei_bar1_indexx::cvmx_npei_bar1_indexx_s
 
union  cvmx_npei_bist_status
 
struct  cvmx_npei_bist_status::cvmx_npei_bist_status_s
 
struct  cvmx_npei_bist_status::cvmx_npei_bist_status_cn52xx
 
struct  cvmx_npei_bist_status::cvmx_npei_bist_status_cn52xxp1
 
struct  cvmx_npei_bist_status::cvmx_npei_bist_status_cn56xxp1
 
union  cvmx_npei_bist_status2
 
struct  cvmx_npei_bist_status2::cvmx_npei_bist_status2_s
 
union  cvmx_npei_ctl_port0
 
struct  cvmx_npei_ctl_port0::cvmx_npei_ctl_port0_s
 
union  cvmx_npei_ctl_port1
 
struct  cvmx_npei_ctl_port1::cvmx_npei_ctl_port1_s
 
union  cvmx_npei_ctl_status
 
struct  cvmx_npei_ctl_status::cvmx_npei_ctl_status_s
 
struct  cvmx_npei_ctl_status::cvmx_npei_ctl_status_cn52xxp1
 
struct  cvmx_npei_ctl_status::cvmx_npei_ctl_status_cn56xxp1
 
union  cvmx_npei_ctl_status2
 
struct  cvmx_npei_ctl_status2::cvmx_npei_ctl_status2_s
 
union  cvmx_npei_data_out_cnt
 
struct  cvmx_npei_data_out_cnt::cvmx_npei_data_out_cnt_s
 
union  cvmx_npei_dbg_data
 
struct  cvmx_npei_dbg_data::cvmx_npei_dbg_data_s
 
struct  cvmx_npei_dbg_data::cvmx_npei_dbg_data_cn52xx
 
struct  cvmx_npei_dbg_data::cvmx_npei_dbg_data_cn56xx
 
union  cvmx_npei_dbg_select
 
struct  cvmx_npei_dbg_select::cvmx_npei_dbg_select_s
 
union  cvmx_npei_dmax_counts
 
struct  cvmx_npei_dmax_counts::cvmx_npei_dmax_counts_s
 
union  cvmx_npei_dmax_dbell
 
struct  cvmx_npei_dmax_dbell::cvmx_npei_dmax_dbell_s
 
union  cvmx_npei_dmax_ibuff_saddr
 
struct  cvmx_npei_dmax_ibuff_saddr::cvmx_npei_dmax_ibuff_saddr_s
 
struct  cvmx_npei_dmax_ibuff_saddr::cvmx_npei_dmax_ibuff_saddr_cn52xxp1
 
union  cvmx_npei_dmax_naddr
 
struct  cvmx_npei_dmax_naddr::cvmx_npei_dmax_naddr_s
 
union  cvmx_npei_dma0_int_level
 
struct  cvmx_npei_dma0_int_level::cvmx_npei_dma0_int_level_s
 
union  cvmx_npei_dma1_int_level
 
struct  cvmx_npei_dma1_int_level::cvmx_npei_dma1_int_level_s
 
union  cvmx_npei_dma_cnts
 
struct  cvmx_npei_dma_cnts::cvmx_npei_dma_cnts_s
 
union  cvmx_npei_dma_control
 
struct  cvmx_npei_dma_control::cvmx_npei_dma_control_s
 
struct  cvmx_npei_dma_control::cvmx_npei_dma_control_cn52xxp1
 
struct  cvmx_npei_dma_control::cvmx_npei_dma_control_cn56xxp1
 
union  cvmx_npei_dma_pcie_req_num
 
struct  cvmx_npei_dma_pcie_req_num::cvmx_npei_dma_pcie_req_num_s
 
union  cvmx_npei_dma_state1
 
struct  cvmx_npei_dma_state1::cvmx_npei_dma_state1_s
 
union  cvmx_npei_dma_state1_p1
 
struct  cvmx_npei_dma_state1_p1::cvmx_npei_dma_state1_p1_s
 
struct  cvmx_npei_dma_state1_p1::cvmx_npei_dma_state1_p1_cn52xxp1
 
union  cvmx_npei_dma_state2
 
struct  cvmx_npei_dma_state2::cvmx_npei_dma_state2_s
 
union  cvmx_npei_dma_state2_p1
 
struct  cvmx_npei_dma_state2_p1::cvmx_npei_dma_state2_p1_s
 
struct  cvmx_npei_dma_state2_p1::cvmx_npei_dma_state2_p1_cn52xxp1
 
union  cvmx_npei_dma_state3_p1
 
struct  cvmx_npei_dma_state3_p1::cvmx_npei_dma_state3_p1_s
 
union  cvmx_npei_dma_state4_p1
 
struct  cvmx_npei_dma_state4_p1::cvmx_npei_dma_state4_p1_s
 
union  cvmx_npei_dma_state5_p1
 
struct  cvmx_npei_dma_state5_p1::cvmx_npei_dma_state5_p1_s
 
union  cvmx_npei_int_a_enb
 
struct  cvmx_npei_int_a_enb::cvmx_npei_int_a_enb_s
 
struct  cvmx_npei_int_a_enb::cvmx_npei_int_a_enb_cn52xxp1
 
union  cvmx_npei_int_a_enb2
 
struct  cvmx_npei_int_a_enb2::cvmx_npei_int_a_enb2_s
 
struct  cvmx_npei_int_a_enb2::cvmx_npei_int_a_enb2_cn52xxp1
 
union  cvmx_npei_int_a_sum
 
struct  cvmx_npei_int_a_sum::cvmx_npei_int_a_sum_s
 
struct  cvmx_npei_int_a_sum::cvmx_npei_int_a_sum_cn52xxp1
 
union  cvmx_npei_int_enb
 
struct  cvmx_npei_int_enb::cvmx_npei_int_enb_s
 
struct  cvmx_npei_int_enb::cvmx_npei_int_enb_cn52xxp1
 
struct  cvmx_npei_int_enb::cvmx_npei_int_enb_cn56xxp1
 
union  cvmx_npei_int_enb2
 
struct  cvmx_npei_int_enb2::cvmx_npei_int_enb2_s
 
struct  cvmx_npei_int_enb2::cvmx_npei_int_enb2_cn52xxp1
 
struct  cvmx_npei_int_enb2::cvmx_npei_int_enb2_cn56xxp1
 
union  cvmx_npei_int_info
 
struct  cvmx_npei_int_info::cvmx_npei_int_info_s
 
union  cvmx_npei_int_sum
 
struct  cvmx_npei_int_sum::cvmx_npei_int_sum_s
 
struct  cvmx_npei_int_sum::cvmx_npei_int_sum_cn52xxp1
 
struct  cvmx_npei_int_sum::cvmx_npei_int_sum_cn56xxp1
 
union  cvmx_npei_int_sum2
 
struct  cvmx_npei_int_sum2::cvmx_npei_int_sum2_s
 
union  cvmx_npei_last_win_rdata0
 
struct  cvmx_npei_last_win_rdata0::cvmx_npei_last_win_rdata0_s
 
union  cvmx_npei_last_win_rdata1
 
struct  cvmx_npei_last_win_rdata1::cvmx_npei_last_win_rdata1_s
 
union  cvmx_npei_mem_access_ctl
 
struct  cvmx_npei_mem_access_ctl::cvmx_npei_mem_access_ctl_s
 
union  cvmx_npei_mem_access_subidx
 
struct  cvmx_npei_mem_access_subidx::cvmx_npei_mem_access_subidx_s
 
union  cvmx_npei_msi_enb0
 
struct  cvmx_npei_msi_enb0::cvmx_npei_msi_enb0_s
 
union  cvmx_npei_msi_enb1
 
struct  cvmx_npei_msi_enb1::cvmx_npei_msi_enb1_s
 
union  cvmx_npei_msi_enb2
 
struct  cvmx_npei_msi_enb2::cvmx_npei_msi_enb2_s
 
union  cvmx_npei_msi_enb3
 
struct  cvmx_npei_msi_enb3::cvmx_npei_msi_enb3_s
 
union  cvmx_npei_msi_rcv0
 
struct  cvmx_npei_msi_rcv0::cvmx_npei_msi_rcv0_s
 
union  cvmx_npei_msi_rcv1
 
struct  cvmx_npei_msi_rcv1::cvmx_npei_msi_rcv1_s
 
union  cvmx_npei_msi_rcv2
 
struct  cvmx_npei_msi_rcv2::cvmx_npei_msi_rcv2_s
 
union  cvmx_npei_msi_rcv3
 
struct  cvmx_npei_msi_rcv3::cvmx_npei_msi_rcv3_s
 
union  cvmx_npei_msi_rd_map
 
struct  cvmx_npei_msi_rd_map::cvmx_npei_msi_rd_map_s
 
union  cvmx_npei_msi_w1c_enb0
 
struct  cvmx_npei_msi_w1c_enb0::cvmx_npei_msi_w1c_enb0_s
 
union  cvmx_npei_msi_w1c_enb1
 
struct  cvmx_npei_msi_w1c_enb1::cvmx_npei_msi_w1c_enb1_s
 
union  cvmx_npei_msi_w1c_enb2
 
struct  cvmx_npei_msi_w1c_enb2::cvmx_npei_msi_w1c_enb2_s
 
union  cvmx_npei_msi_w1c_enb3
 
struct  cvmx_npei_msi_w1c_enb3::cvmx_npei_msi_w1c_enb3_s
 
union  cvmx_npei_msi_w1s_enb0
 
struct  cvmx_npei_msi_w1s_enb0::cvmx_npei_msi_w1s_enb0_s
 
union  cvmx_npei_msi_w1s_enb1
 
struct  cvmx_npei_msi_w1s_enb1::cvmx_npei_msi_w1s_enb1_s
 
union  cvmx_npei_msi_w1s_enb2
 
struct  cvmx_npei_msi_w1s_enb2::cvmx_npei_msi_w1s_enb2_s
 
union  cvmx_npei_msi_w1s_enb3
 
struct  cvmx_npei_msi_w1s_enb3::cvmx_npei_msi_w1s_enb3_s
 
union  cvmx_npei_msi_wr_map
 
struct  cvmx_npei_msi_wr_map::cvmx_npei_msi_wr_map_s
 
union  cvmx_npei_pcie_credit_cnt
 
struct  cvmx_npei_pcie_credit_cnt::cvmx_npei_pcie_credit_cnt_s
 
union  cvmx_npei_pcie_msi_rcv
 
struct  cvmx_npei_pcie_msi_rcv::cvmx_npei_pcie_msi_rcv_s
 
union  cvmx_npei_pcie_msi_rcv_b1
 
struct  cvmx_npei_pcie_msi_rcv_b1::cvmx_npei_pcie_msi_rcv_b1_s
 
union  cvmx_npei_pcie_msi_rcv_b2
 
struct  cvmx_npei_pcie_msi_rcv_b2::cvmx_npei_pcie_msi_rcv_b2_s
 
union  cvmx_npei_pcie_msi_rcv_b3
 
struct  cvmx_npei_pcie_msi_rcv_b3::cvmx_npei_pcie_msi_rcv_b3_s
 
union  cvmx_npei_pktx_cnts
 
struct  cvmx_npei_pktx_cnts::cvmx_npei_pktx_cnts_s
 
union  cvmx_npei_pktx_in_bp
 
struct  cvmx_npei_pktx_in_bp::cvmx_npei_pktx_in_bp_s
 
union  cvmx_npei_pktx_instr_baddr
 
struct  cvmx_npei_pktx_instr_baddr::cvmx_npei_pktx_instr_baddr_s
 
union  cvmx_npei_pktx_instr_baoff_dbell
 
struct  cvmx_npei_pktx_instr_baoff_dbell::cvmx_npei_pktx_instr_baoff_dbell_s
 
union  cvmx_npei_pktx_instr_fifo_rsize
 
struct  cvmx_npei_pktx_instr_fifo_rsize::cvmx_npei_pktx_instr_fifo_rsize_s
 
union  cvmx_npei_pktx_instr_header
 
struct  cvmx_npei_pktx_instr_header::cvmx_npei_pktx_instr_header_s
 
union  cvmx_npei_pktx_slist_baddr
 
struct  cvmx_npei_pktx_slist_baddr::cvmx_npei_pktx_slist_baddr_s
 
union  cvmx_npei_pktx_slist_baoff_dbell
 
struct  cvmx_npei_pktx_slist_baoff_dbell::cvmx_npei_pktx_slist_baoff_dbell_s
 
union  cvmx_npei_pktx_slist_fifo_rsize
 
struct  cvmx_npei_pktx_slist_fifo_rsize::cvmx_npei_pktx_slist_fifo_rsize_s
 
union  cvmx_npei_pkt_cnt_int
 
struct  cvmx_npei_pkt_cnt_int::cvmx_npei_pkt_cnt_int_s
 
union  cvmx_npei_pkt_cnt_int_enb
 
struct  cvmx_npei_pkt_cnt_int_enb::cvmx_npei_pkt_cnt_int_enb_s
 
union  cvmx_npei_pkt_data_out_es
 
struct  cvmx_npei_pkt_data_out_es::cvmx_npei_pkt_data_out_es_s
 
union  cvmx_npei_pkt_data_out_ns
 
struct  cvmx_npei_pkt_data_out_ns::cvmx_npei_pkt_data_out_ns_s
 
union  cvmx_npei_pkt_data_out_ror
 
struct  cvmx_npei_pkt_data_out_ror::cvmx_npei_pkt_data_out_ror_s
 
union  cvmx_npei_pkt_dpaddr
 
struct  cvmx_npei_pkt_dpaddr::cvmx_npei_pkt_dpaddr_s
 
union  cvmx_npei_pkt_in_bp
 
struct  cvmx_npei_pkt_in_bp::cvmx_npei_pkt_in_bp_s
 
union  cvmx_npei_pkt_in_donex_cnts
 
struct  cvmx_npei_pkt_in_donex_cnts::cvmx_npei_pkt_in_donex_cnts_s
 
union  cvmx_npei_pkt_in_instr_counts
 
struct  cvmx_npei_pkt_in_instr_counts::cvmx_npei_pkt_in_instr_counts_s
 
union  cvmx_npei_pkt_in_pcie_port
 
struct  cvmx_npei_pkt_in_pcie_port::cvmx_npei_pkt_in_pcie_port_s
 
union  cvmx_npei_pkt_input_control
 
struct  cvmx_npei_pkt_input_control::cvmx_npei_pkt_input_control_s
 
union  cvmx_npei_pkt_instr_enb
 
struct  cvmx_npei_pkt_instr_enb::cvmx_npei_pkt_instr_enb_s
 
union  cvmx_npei_pkt_instr_rd_size
 
struct  cvmx_npei_pkt_instr_rd_size::cvmx_npei_pkt_instr_rd_size_s
 
union  cvmx_npei_pkt_instr_size
 
struct  cvmx_npei_pkt_instr_size::cvmx_npei_pkt_instr_size_s
 
union  cvmx_npei_pkt_int_levels
 
struct  cvmx_npei_pkt_int_levels::cvmx_npei_pkt_int_levels_s
 
union  cvmx_npei_pkt_iptr
 
struct  cvmx_npei_pkt_iptr::cvmx_npei_pkt_iptr_s
 
union  cvmx_npei_pkt_out_bmode
 
struct  cvmx_npei_pkt_out_bmode::cvmx_npei_pkt_out_bmode_s
 
union  cvmx_npei_pkt_out_enb
 
struct  cvmx_npei_pkt_out_enb::cvmx_npei_pkt_out_enb_s
 
union  cvmx_npei_pkt_output_wmark
 
struct  cvmx_npei_pkt_output_wmark::cvmx_npei_pkt_output_wmark_s
 
union  cvmx_npei_pkt_pcie_port
 
struct  cvmx_npei_pkt_pcie_port::cvmx_npei_pkt_pcie_port_s
 
union  cvmx_npei_pkt_port_in_rst
 
struct  cvmx_npei_pkt_port_in_rst::cvmx_npei_pkt_port_in_rst_s
 
union  cvmx_npei_pkt_slist_es
 
struct  cvmx_npei_pkt_slist_es::cvmx_npei_pkt_slist_es_s
 
union  cvmx_npei_pkt_slist_id_size
 
struct  cvmx_npei_pkt_slist_id_size::cvmx_npei_pkt_slist_id_size_s
 
union  cvmx_npei_pkt_slist_ns
 
struct  cvmx_npei_pkt_slist_ns::cvmx_npei_pkt_slist_ns_s
 
union  cvmx_npei_pkt_slist_ror
 
struct  cvmx_npei_pkt_slist_ror::cvmx_npei_pkt_slist_ror_s
 
union  cvmx_npei_pkt_time_int
 
struct  cvmx_npei_pkt_time_int::cvmx_npei_pkt_time_int_s
 
union  cvmx_npei_pkt_time_int_enb
 
struct  cvmx_npei_pkt_time_int_enb::cvmx_npei_pkt_time_int_enb_s
 
union  cvmx_npei_rsl_int_blocks
 
struct  cvmx_npei_rsl_int_blocks::cvmx_npei_rsl_int_blocks_s
 
union  cvmx_npei_scratch_1
 
struct  cvmx_npei_scratch_1::cvmx_npei_scratch_1_s
 
union  cvmx_npei_state1
 
struct  cvmx_npei_state1::cvmx_npei_state1_s
 
union  cvmx_npei_state2
 
struct  cvmx_npei_state2::cvmx_npei_state2_s
 
union  cvmx_npei_state3
 
struct  cvmx_npei_state3::cvmx_npei_state3_s
 
union  cvmx_npei_win_rd_addr
 
struct  cvmx_npei_win_rd_addr::cvmx_npei_win_rd_addr_s
 
union  cvmx_npei_win_rd_data
 
struct  cvmx_npei_win_rd_data::cvmx_npei_win_rd_data_s
 
union  cvmx_npei_win_wr_addr
 
struct  cvmx_npei_win_wr_addr::cvmx_npei_win_wr_addr_s
 
union  cvmx_npei_win_wr_data
 
struct  cvmx_npei_win_wr_data::cvmx_npei_win_wr_data_s
 
union  cvmx_npei_win_wr_mask
 
struct  cvmx_npei_win_wr_mask::cvmx_npei_win_wr_mask_s
 
union  cvmx_npei_window_ctl
 
struct  cvmx_npei_window_ctl::cvmx_npei_window_ctl_s
 

Macros

#define CVMX_NPEI_BAR1_INDEXX(offset)   (0x0000000000000000ull + ((offset) & 31) * 16)
 
#define CVMX_NPEI_BIST_STATUS   (0x0000000000000580ull)
 
#define CVMX_NPEI_BIST_STATUS2   (0x0000000000000680ull)
 
#define CVMX_NPEI_CTL_PORT0   (0x0000000000000250ull)
 
#define CVMX_NPEI_CTL_PORT1   (0x0000000000000260ull)
 
#define CVMX_NPEI_CTL_STATUS   (0x0000000000000570ull)
 
#define CVMX_NPEI_CTL_STATUS2   (0x0000000000003C00ull)
 
#define CVMX_NPEI_DATA_OUT_CNT   (0x00000000000005F0ull)
 
#define CVMX_NPEI_DBG_DATA   (0x0000000000000510ull)
 
#define CVMX_NPEI_DBG_SELECT   (0x0000000000000500ull)
 
#define CVMX_NPEI_DMA0_INT_LEVEL   (0x00000000000005C0ull)
 
#define CVMX_NPEI_DMA1_INT_LEVEL   (0x00000000000005D0ull)
 
#define CVMX_NPEI_DMAX_COUNTS(offset)   (0x0000000000000450ull + ((offset) & 7) * 16)
 
#define CVMX_NPEI_DMAX_DBELL(offset)   (0x00000000000003B0ull + ((offset) & 7) * 16)
 
#define CVMX_NPEI_DMAX_IBUFF_SADDR(offset)   (0x0000000000000400ull + ((offset) & 7) * 16)
 
#define CVMX_NPEI_DMAX_NADDR(offset)   (0x00000000000004A0ull + ((offset) & 7) * 16)
 
#define CVMX_NPEI_DMA_CNTS   (0x00000000000005E0ull)
 
#define CVMX_NPEI_DMA_CONTROL   (0x00000000000003A0ull)
 
#define CVMX_NPEI_DMA_PCIE_REQ_NUM   (0x00000000000005B0ull)
 
#define CVMX_NPEI_DMA_STATE1   (0x00000000000006C0ull)
 
#define CVMX_NPEI_DMA_STATE1_P1   (0x0000000000000680ull)
 
#define CVMX_NPEI_DMA_STATE2   (0x00000000000006D0ull)
 
#define CVMX_NPEI_DMA_STATE2_P1   (0x0000000000000690ull)
 
#define CVMX_NPEI_DMA_STATE3_P1   (0x00000000000006A0ull)
 
#define CVMX_NPEI_DMA_STATE4_P1   (0x00000000000006B0ull)
 
#define CVMX_NPEI_DMA_STATE5_P1   (0x00000000000006C0ull)
 
#define CVMX_NPEI_INT_A_ENB   (0x0000000000000560ull)
 
#define CVMX_NPEI_INT_A_ENB2   (0x0000000000003CE0ull)
 
#define CVMX_NPEI_INT_A_SUM   (0x0000000000000550ull)
 
#define CVMX_NPEI_INT_ENB   (0x0000000000000540ull)
 
#define CVMX_NPEI_INT_ENB2   (0x0000000000003CD0ull)
 
#define CVMX_NPEI_INT_INFO   (0x0000000000000590ull)
 
#define CVMX_NPEI_INT_SUM   (0x0000000000000530ull)
 
#define CVMX_NPEI_INT_SUM2   (0x0000000000003CC0ull)
 
#define CVMX_NPEI_LAST_WIN_RDATA0   (0x0000000000000600ull)
 
#define CVMX_NPEI_LAST_WIN_RDATA1   (0x0000000000000610ull)
 
#define CVMX_NPEI_MEM_ACCESS_CTL   (0x00000000000004F0ull)
 
#define CVMX_NPEI_MEM_ACCESS_SUBIDX(offset)   (0x0000000000000280ull + ((offset) & 31) * 16 - 16*12)
 
#define CVMX_NPEI_MSI_ENB0   (0x0000000000003C50ull)
 
#define CVMX_NPEI_MSI_ENB1   (0x0000000000003C60ull)
 
#define CVMX_NPEI_MSI_ENB2   (0x0000000000003C70ull)
 
#define CVMX_NPEI_MSI_ENB3   (0x0000000000003C80ull)
 
#define CVMX_NPEI_MSI_RCV0   (0x0000000000003C10ull)
 
#define CVMX_NPEI_MSI_RCV1   (0x0000000000003C20ull)
 
#define CVMX_NPEI_MSI_RCV2   (0x0000000000003C30ull)
 
#define CVMX_NPEI_MSI_RCV3   (0x0000000000003C40ull)
 
#define CVMX_NPEI_MSI_RD_MAP   (0x0000000000003CA0ull)
 
#define CVMX_NPEI_MSI_W1C_ENB0   (0x0000000000003CF0ull)
 
#define CVMX_NPEI_MSI_W1C_ENB1   (0x0000000000003D00ull)
 
#define CVMX_NPEI_MSI_W1C_ENB2   (0x0000000000003D10ull)
 
#define CVMX_NPEI_MSI_W1C_ENB3   (0x0000000000003D20ull)
 
#define CVMX_NPEI_MSI_W1S_ENB0   (0x0000000000003D30ull)
 
#define CVMX_NPEI_MSI_W1S_ENB1   (0x0000000000003D40ull)
 
#define CVMX_NPEI_MSI_W1S_ENB2   (0x0000000000003D50ull)
 
#define CVMX_NPEI_MSI_W1S_ENB3   (0x0000000000003D60ull)
 
#define CVMX_NPEI_MSI_WR_MAP   (0x0000000000003C90ull)
 
#define CVMX_NPEI_PCIE_CREDIT_CNT   (0x0000000000003D70ull)
 
#define CVMX_NPEI_PCIE_MSI_RCV   (0x0000000000003CB0ull)
 
#define CVMX_NPEI_PCIE_MSI_RCV_B1   (0x0000000000000650ull)
 
#define CVMX_NPEI_PCIE_MSI_RCV_B2   (0x0000000000000660ull)
 
#define CVMX_NPEI_PCIE_MSI_RCV_B3   (0x0000000000000670ull)
 
#define CVMX_NPEI_PKTX_CNTS(offset)   (0x0000000000002400ull + ((offset) & 31) * 16)
 
#define CVMX_NPEI_PKTX_INSTR_BADDR(offset)   (0x0000000000002800ull + ((offset) & 31) * 16)
 
#define CVMX_NPEI_PKTX_INSTR_BAOFF_DBELL(offset)   (0x0000000000002C00ull + ((offset) & 31) * 16)
 
#define CVMX_NPEI_PKTX_INSTR_FIFO_RSIZE(offset)   (0x0000000000003000ull + ((offset) & 31) * 16)
 
#define CVMX_NPEI_PKTX_INSTR_HEADER(offset)   (0x0000000000003400ull + ((offset) & 31) * 16)
 
#define CVMX_NPEI_PKTX_IN_BP(offset)   (0x0000000000003800ull + ((offset) & 31) * 16)
 
#define CVMX_NPEI_PKTX_SLIST_BADDR(offset)   (0x0000000000001400ull + ((offset) & 31) * 16)
 
#define CVMX_NPEI_PKTX_SLIST_BAOFF_DBELL(offset)   (0x0000000000001800ull + ((offset) & 31) * 16)
 
#define CVMX_NPEI_PKTX_SLIST_FIFO_RSIZE(offset)   (0x0000000000001C00ull + ((offset) & 31) * 16)
 
#define CVMX_NPEI_PKT_CNT_INT   (0x0000000000001110ull)
 
#define CVMX_NPEI_PKT_CNT_INT_ENB   (0x0000000000001130ull)
 
#define CVMX_NPEI_PKT_DATA_OUT_ES   (0x00000000000010B0ull)
 
#define CVMX_NPEI_PKT_DATA_OUT_NS   (0x00000000000010A0ull)
 
#define CVMX_NPEI_PKT_DATA_OUT_ROR   (0x0000000000001090ull)
 
#define CVMX_NPEI_PKT_DPADDR   (0x0000000000001080ull)
 
#define CVMX_NPEI_PKT_INPUT_CONTROL   (0x0000000000001150ull)
 
#define CVMX_NPEI_PKT_INSTR_ENB   (0x0000000000001000ull)
 
#define CVMX_NPEI_PKT_INSTR_RD_SIZE   (0x0000000000001190ull)
 
#define CVMX_NPEI_PKT_INSTR_SIZE   (0x0000000000001020ull)
 
#define CVMX_NPEI_PKT_INT_LEVELS   (0x0000000000001100ull)
 
#define CVMX_NPEI_PKT_IN_BP   (0x00000000000006B0ull)
 
#define CVMX_NPEI_PKT_IN_DONEX_CNTS(offset)   (0x0000000000002000ull + ((offset) & 31) * 16)
 
#define CVMX_NPEI_PKT_IN_INSTR_COUNTS   (0x00000000000006A0ull)
 
#define CVMX_NPEI_PKT_IN_PCIE_PORT   (0x00000000000011A0ull)
 
#define CVMX_NPEI_PKT_IPTR   (0x0000000000001070ull)
 
#define CVMX_NPEI_PKT_OUTPUT_WMARK   (0x0000000000001160ull)
 
#define CVMX_NPEI_PKT_OUT_BMODE   (0x00000000000010D0ull)
 
#define CVMX_NPEI_PKT_OUT_ENB   (0x0000000000001010ull)
 
#define CVMX_NPEI_PKT_PCIE_PORT   (0x00000000000010E0ull)
 
#define CVMX_NPEI_PKT_PORT_IN_RST   (0x0000000000000690ull)
 
#define CVMX_NPEI_PKT_SLIST_ES   (0x0000000000001050ull)
 
#define CVMX_NPEI_PKT_SLIST_ID_SIZE   (0x0000000000001180ull)
 
#define CVMX_NPEI_PKT_SLIST_NS   (0x0000000000001040ull)
 
#define CVMX_NPEI_PKT_SLIST_ROR   (0x0000000000001030ull)
 
#define CVMX_NPEI_PKT_TIME_INT   (0x0000000000001120ull)
 
#define CVMX_NPEI_PKT_TIME_INT_ENB   (0x0000000000001140ull)
 
#define CVMX_NPEI_RSL_INT_BLOCKS   (0x0000000000000520ull)
 
#define CVMX_NPEI_SCRATCH_1   (0x0000000000000270ull)
 
#define CVMX_NPEI_STATE1   (0x0000000000000620ull)
 
#define CVMX_NPEI_STATE2   (0x0000000000000630ull)
 
#define CVMX_NPEI_STATE3   (0x0000000000000640ull)
 
#define CVMX_NPEI_WINDOW_CTL   (0x0000000000000380ull)
 
#define CVMX_NPEI_WIN_RD_ADDR   (0x0000000000000210ull)
 
#define CVMX_NPEI_WIN_RD_DATA   (0x0000000000000240ull)
 
#define CVMX_NPEI_WIN_WR_ADDR   (0x0000000000000200ull)
 
#define CVMX_NPEI_WIN_WR_DATA   (0x0000000000000220ull)
 
#define CVMX_NPEI_WIN_WR_MASK   (0x0000000000000230ull)
 

Macro Definition Documentation

#define CVMX_NPEI_BAR1_INDEXX (   offset)    (0x0000000000000000ull + ((offset) & 31) * 16)

Definition at line 31 of file cvmx-npei-defs.h.

#define CVMX_NPEI_BIST_STATUS   (0x0000000000000580ull)

Definition at line 32 of file cvmx-npei-defs.h.

#define CVMX_NPEI_BIST_STATUS2   (0x0000000000000680ull)

Definition at line 33 of file cvmx-npei-defs.h.

#define CVMX_NPEI_CTL_PORT0   (0x0000000000000250ull)

Definition at line 34 of file cvmx-npei-defs.h.

#define CVMX_NPEI_CTL_PORT1   (0x0000000000000260ull)

Definition at line 35 of file cvmx-npei-defs.h.

#define CVMX_NPEI_CTL_STATUS   (0x0000000000000570ull)

Definition at line 36 of file cvmx-npei-defs.h.

#define CVMX_NPEI_CTL_STATUS2   (0x0000000000003C00ull)

Definition at line 37 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DATA_OUT_CNT   (0x00000000000005F0ull)

Definition at line 38 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DBG_DATA   (0x0000000000000510ull)

Definition at line 39 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DBG_SELECT   (0x0000000000000500ull)

Definition at line 40 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA0_INT_LEVEL   (0x00000000000005C0ull)

Definition at line 41 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA1_INT_LEVEL   (0x00000000000005D0ull)

Definition at line 42 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA_CNTS   (0x00000000000005E0ull)

Definition at line 47 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA_CONTROL   (0x00000000000003A0ull)

Definition at line 48 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA_PCIE_REQ_NUM   (0x00000000000005B0ull)

Definition at line 49 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA_STATE1   (0x00000000000006C0ull)

Definition at line 50 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA_STATE1_P1   (0x0000000000000680ull)

Definition at line 51 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA_STATE2   (0x00000000000006D0ull)

Definition at line 52 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA_STATE2_P1   (0x0000000000000690ull)

Definition at line 53 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA_STATE3_P1   (0x00000000000006A0ull)

Definition at line 54 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA_STATE4_P1   (0x00000000000006B0ull)

Definition at line 55 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMA_STATE5_P1   (0x00000000000006C0ull)

Definition at line 56 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMAX_COUNTS (   offset)    (0x0000000000000450ull + ((offset) & 7) * 16)

Definition at line 43 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMAX_DBELL (   offset)    (0x00000000000003B0ull + ((offset) & 7) * 16)

Definition at line 44 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMAX_IBUFF_SADDR (   offset)    (0x0000000000000400ull + ((offset) & 7) * 16)

Definition at line 45 of file cvmx-npei-defs.h.

#define CVMX_NPEI_DMAX_NADDR (   offset)    (0x00000000000004A0ull + ((offset) & 7) * 16)

Definition at line 46 of file cvmx-npei-defs.h.

#define CVMX_NPEI_INT_A_ENB   (0x0000000000000560ull)

Definition at line 57 of file cvmx-npei-defs.h.

#define CVMX_NPEI_INT_A_ENB2   (0x0000000000003CE0ull)

Definition at line 58 of file cvmx-npei-defs.h.

#define CVMX_NPEI_INT_A_SUM   (0x0000000000000550ull)

Definition at line 59 of file cvmx-npei-defs.h.

#define CVMX_NPEI_INT_ENB   (0x0000000000000540ull)

Definition at line 60 of file cvmx-npei-defs.h.

#define CVMX_NPEI_INT_ENB2   (0x0000000000003CD0ull)

Definition at line 61 of file cvmx-npei-defs.h.

#define CVMX_NPEI_INT_INFO   (0x0000000000000590ull)

Definition at line 62 of file cvmx-npei-defs.h.

#define CVMX_NPEI_INT_SUM   (0x0000000000000530ull)

Definition at line 63 of file cvmx-npei-defs.h.

#define CVMX_NPEI_INT_SUM2   (0x0000000000003CC0ull)

Definition at line 64 of file cvmx-npei-defs.h.

#define CVMX_NPEI_LAST_WIN_RDATA0   (0x0000000000000600ull)

Definition at line 65 of file cvmx-npei-defs.h.

#define CVMX_NPEI_LAST_WIN_RDATA1   (0x0000000000000610ull)

Definition at line 66 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MEM_ACCESS_CTL   (0x00000000000004F0ull)

Definition at line 67 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MEM_ACCESS_SUBIDX (   offset)    (0x0000000000000280ull + ((offset) & 31) * 16 - 16*12)

Definition at line 68 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_ENB0   (0x0000000000003C50ull)

Definition at line 69 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_ENB1   (0x0000000000003C60ull)

Definition at line 70 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_ENB2   (0x0000000000003C70ull)

Definition at line 71 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_ENB3   (0x0000000000003C80ull)

Definition at line 72 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_RCV0   (0x0000000000003C10ull)

Definition at line 73 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_RCV1   (0x0000000000003C20ull)

Definition at line 74 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_RCV2   (0x0000000000003C30ull)

Definition at line 75 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_RCV3   (0x0000000000003C40ull)

Definition at line 76 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_RD_MAP   (0x0000000000003CA0ull)

Definition at line 77 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_W1C_ENB0   (0x0000000000003CF0ull)

Definition at line 78 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_W1C_ENB1   (0x0000000000003D00ull)

Definition at line 79 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_W1C_ENB2   (0x0000000000003D10ull)

Definition at line 80 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_W1C_ENB3   (0x0000000000003D20ull)

Definition at line 81 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_W1S_ENB0   (0x0000000000003D30ull)

Definition at line 82 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_W1S_ENB1   (0x0000000000003D40ull)

Definition at line 83 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_W1S_ENB2   (0x0000000000003D50ull)

Definition at line 84 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_W1S_ENB3   (0x0000000000003D60ull)

Definition at line 85 of file cvmx-npei-defs.h.

#define CVMX_NPEI_MSI_WR_MAP   (0x0000000000003C90ull)

Definition at line 86 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PCIE_CREDIT_CNT   (0x0000000000003D70ull)

Definition at line 87 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PCIE_MSI_RCV   (0x0000000000003CB0ull)

Definition at line 88 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PCIE_MSI_RCV_B1   (0x0000000000000650ull)

Definition at line 89 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PCIE_MSI_RCV_B2   (0x0000000000000660ull)

Definition at line 90 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PCIE_MSI_RCV_B3   (0x0000000000000670ull)

Definition at line 91 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_CNT_INT   (0x0000000000001110ull)

Definition at line 101 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_CNT_INT_ENB   (0x0000000000001130ull)

Definition at line 102 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_DATA_OUT_ES   (0x00000000000010B0ull)

Definition at line 103 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_DATA_OUT_NS   (0x00000000000010A0ull)

Definition at line 104 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_DATA_OUT_ROR   (0x0000000000001090ull)

Definition at line 105 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_DPADDR   (0x0000000000001080ull)

Definition at line 106 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_IN_BP   (0x00000000000006B0ull)

Definition at line 112 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_IN_DONEX_CNTS (   offset)    (0x0000000000002000ull + ((offset) & 31) * 16)

Definition at line 113 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_IN_INSTR_COUNTS   (0x00000000000006A0ull)

Definition at line 114 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_IN_PCIE_PORT   (0x00000000000011A0ull)

Definition at line 115 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_INPUT_CONTROL   (0x0000000000001150ull)

Definition at line 107 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_INSTR_ENB   (0x0000000000001000ull)

Definition at line 108 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_INSTR_RD_SIZE   (0x0000000000001190ull)

Definition at line 109 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_INSTR_SIZE   (0x0000000000001020ull)

Definition at line 110 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_INT_LEVELS   (0x0000000000001100ull)

Definition at line 111 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_IPTR   (0x0000000000001070ull)

Definition at line 116 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_OUT_BMODE   (0x00000000000010D0ull)

Definition at line 118 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_OUT_ENB   (0x0000000000001010ull)

Definition at line 119 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_OUTPUT_WMARK   (0x0000000000001160ull)

Definition at line 117 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_PCIE_PORT   (0x00000000000010E0ull)

Definition at line 120 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_PORT_IN_RST   (0x0000000000000690ull)

Definition at line 121 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_SLIST_ES   (0x0000000000001050ull)

Definition at line 122 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_SLIST_ID_SIZE   (0x0000000000001180ull)

Definition at line 123 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_SLIST_NS   (0x0000000000001040ull)

Definition at line 124 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_SLIST_ROR   (0x0000000000001030ull)

Definition at line 125 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_TIME_INT   (0x0000000000001120ull)

Definition at line 126 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKT_TIME_INT_ENB   (0x0000000000001140ull)

Definition at line 127 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKTX_CNTS (   offset)    (0x0000000000002400ull + ((offset) & 31) * 16)

Definition at line 92 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKTX_IN_BP (   offset)    (0x0000000000003800ull + ((offset) & 31) * 16)

Definition at line 97 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKTX_INSTR_BADDR (   offset)    (0x0000000000002800ull + ((offset) & 31) * 16)

Definition at line 93 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKTX_INSTR_BAOFF_DBELL (   offset)    (0x0000000000002C00ull + ((offset) & 31) * 16)

Definition at line 94 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKTX_INSTR_FIFO_RSIZE (   offset)    (0x0000000000003000ull + ((offset) & 31) * 16)

Definition at line 95 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKTX_INSTR_HEADER (   offset)    (0x0000000000003400ull + ((offset) & 31) * 16)

Definition at line 96 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKTX_SLIST_BADDR (   offset)    (0x0000000000001400ull + ((offset) & 31) * 16)

Definition at line 98 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKTX_SLIST_BAOFF_DBELL (   offset)    (0x0000000000001800ull + ((offset) & 31) * 16)

Definition at line 99 of file cvmx-npei-defs.h.

#define CVMX_NPEI_PKTX_SLIST_FIFO_RSIZE (   offset)    (0x0000000000001C00ull + ((offset) & 31) * 16)

Definition at line 100 of file cvmx-npei-defs.h.

#define CVMX_NPEI_RSL_INT_BLOCKS   (0x0000000000000520ull)

Definition at line 128 of file cvmx-npei-defs.h.

#define CVMX_NPEI_SCRATCH_1   (0x0000000000000270ull)

Definition at line 129 of file cvmx-npei-defs.h.

#define CVMX_NPEI_STATE1   (0x0000000000000620ull)

Definition at line 130 of file cvmx-npei-defs.h.

#define CVMX_NPEI_STATE2   (0x0000000000000630ull)

Definition at line 131 of file cvmx-npei-defs.h.

#define CVMX_NPEI_STATE3   (0x0000000000000640ull)

Definition at line 132 of file cvmx-npei-defs.h.

#define CVMX_NPEI_WIN_RD_ADDR   (0x0000000000000210ull)

Definition at line 134 of file cvmx-npei-defs.h.

#define CVMX_NPEI_WIN_RD_DATA   (0x0000000000000240ull)

Definition at line 135 of file cvmx-npei-defs.h.

#define CVMX_NPEI_WIN_WR_ADDR   (0x0000000000000200ull)

Definition at line 136 of file cvmx-npei-defs.h.

#define CVMX_NPEI_WIN_WR_DATA   (0x0000000000000220ull)

Definition at line 137 of file cvmx-npei-defs.h.

#define CVMX_NPEI_WIN_WR_MASK   (0x0000000000000230ull)

Definition at line 138 of file cvmx-npei-defs.h.

#define CVMX_NPEI_WINDOW_CTL   (0x0000000000000380ull)

Definition at line 133 of file cvmx-npei-defs.h.