Linux Kernel
3.7.1
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Macros | |
#define | RISC_CNT_INC 0x00010000 |
#define | RISC_CNT_RESET 0x00030000 |
#define | RISC_IRQ1 0x01000000 |
#define | RISC_IRQ2 0x02000000 |
#define | RISC_EOL 0x04000000 |
#define | RISC_SOL 0x08000000 |
#define | RISC_WRITE 0x10000000 |
#define | RISC_SKIP 0x20000000 |
#define | RISC_JUMP 0x70000000 |
#define | RISC_SYNC 0x80000000 |
#define | RISC_RESYNC 0x80008000 |
#define | RISC_READ 0x90000000 |
#define | RISC_WRITERM 0xB0000000 |
#define | RISC_WRITECM 0xC0000000 |
#define | RISC_WRITECR 0xD0000000 |
#define | RISC_WRITEC 0x50000000 |
#define | RISC_READC 0xA0000000 |
#define | HOST_REG1 0x00000000 |
#define | HOST_REG2 0x00000001 |
#define | HOST_REG3 0x00000002 |
#define | CHIP_CTRL 0x00000100 |
#define | AFE_CTRL 0x00000104 |
#define | VID_PLL_INT_POST 0x00000108 |
#define | VID_PLL_FRAC 0x0000010C |
#define | AUX_PLL_INT_POST 0x00000110 |
#define | AUX_PLL_FRAC 0x00000114 |
#define | SYS_PLL_INT_POST 0x00000118 |
#define | SYS_PLL_FRAC 0x0000011C |
#define | PIN_CTRL 0x00000120 |
#define | AUD_IO_CTRL 0x00000124 |
#define | AUD_LOCK1 0x00000128 |
#define | AUD_LOCK2 0x0000012C |
#define | POWER_CTRL 0x00000130 |
#define | AFE_DIAG_CTRL1 0x00000134 |
#define | AFE_DIAG_CTRL3 0x0000013C |
#define | PLL_DIAG_CTRL 0x00000140 |
#define | AFE_CLK_OUT_CTRL 0x00000144 |
#define | DLL1_DIAG_CTRL 0x0000015C |
#define | GPIO2_OUT_EN_REG 0x00000160 |
#define | GPIO2 0x00000164 |
#define | IFADC_CTRL 0x00000180 |
#define | IR_CNTRL_REG 0x00000200 |
#define | IR_TXCLK_REG 0x00000204 |
#define | IR_RXCLK_REG 0x00000208 |
#define | IR_CDUTY_REG 0x0000020C |
#define | IR_STAT_REG 0x00000210 |
#define | IR_IRQEN_REG 0x00000214 |
#define | IR_FILTR_REG 0x00000218 |
#define | IR_FIFO_REG 0x0000023C |
#define | MODE_CTRL 0x00000400 |
#define | OUT_CTRL1 0x00000404 |
#define | OUT_CTRL2 0x00000408 |
#define | GEN_STAT 0x0000040C |
#define | INT_STAT_MASK 0x00000410 |
#define | LUMA_CTRL 0x00000414 |
#define | HSCALE_CTRL 0x00000418 |
#define | VSCALE_CTRL 0x0000041C |
#define | CHROMA_CTRL 0x00000420 |
#define | VBI_LINE_CTRL1 0x00000424 |
#define | VBI_LINE_CTRL2 0x00000428 |
#define | VBI_LINE_CTRL3 0x0000042C |
#define | VBI_LINE_CTRL4 0x00000430 |
#define | VBI_LINE_CTRL5 0x00000434 |
#define | VBI_FC_CFG 0x00000438 |
#define | VBI_MISC_CFG1 0x0000043C |
#define | VBI_MISC_CFG2 0x00000440 |
#define | VBI_PAY1 0x00000444 |
#define | VBI_PAY2 0x00000448 |
#define | VBI_CUST1_CFG1 0x0000044C |
#define | VBI_CUST1_CFG2 0x00000450 |
#define | VBI_CUST1_CFG3 0x00000454 |
#define | VBI_CUST2_CFG1 0x00000458 |
#define | VBI_CUST2_CFG2 0x0000045C |
#define | VBI_CUST2_CFG3 0x00000460 |
#define | VBI_CUST3_CFG1 0x00000464 |
#define | VBI_CUST3_CFG2 0x00000468 |
#define | VBI_CUST3_CFG3 0x0000046C |
#define | HORIZ_TIM_CTRL 0x00000470 |
#define | VERT_TIM_CTRL 0x00000474 |
#define | SRC_COMB_CFG 0x00000478 |
#define | CHROMA_VBIOFF_CFG 0x0000047C |
#define | FIELD_COUNT 0x00000480 |
#define | MISC_TIM_CTRL 0x00000484 |
#define | DFE_CTRL1 0x00000488 |
#define | DFE_CTRL2 0x0000048C |
#define | DFE_CTRL3 0x00000490 |
#define | PLL_CTRL 0x00000494 |
#define | HTL_CTRL 0x00000498 |
#define | COMB_CTRL 0x0000049C |
#define | CRUSH_CTRL 0x000004A0 |
#define | SOFT_RST_CTRL 0x000004A4 |
#define | CX885_VERSION 0x000004B4 |
#define | VBI_PASS_CTRL 0x000004BC |
#define | DL_CTL 0x00000800 |
#define | STD_DET_STATUS 0x00000804 |
#define | STD_DET_CTL 0x00000808 |
#define | DW8051_INT 0x0000080C |
#define | GENERAL_CTL 0x00000810 |
#define | AAGC_CTL 0x00000814 |
#define | DEMATRIX_CTL 0x000008CC |
#define | PATH1_CTL1 0x000008D0 |
#define | PATH1_VOL_CTL 0x000008D4 |
#define | PATH1_EQ_CTL 0x000008D8 |
#define | PATH1_SC_CTL 0x000008DC |
#define | PATH2_CTL1 0x000008E0 |
#define | PATH2_VOL_CTL 0x000008E4 |
#define | PATH2_EQ_CTL 0x000008E8 |
#define | PATH2_SC_CTL 0x000008EC |
#define | SRC_CTL 0x000008F0 |
#define | SRC_LF_COEF 0x000008F4 |
#define | SRC1_CTL 0x000008F8 |
#define | SRC2_CTL 0x000008FC |
#define | SRC3_CTL 0x00000900 |
#define | SRC4_CTL 0x00000904 |
#define | SRC5_CTL 0x00000908 |
#define | SRC6_CTL 0x0000090C |
#define | BAND_OUT_SEL 0x00000910 |
#define | I2S_N_CTL 0x00000914 |
#define | I2S_OUT_CTL 0x00000918 |
#define | AUTOCONFIG_REG 0x000009C4 |
#define | DSM_CTRL1 0x00000000 |
#define | DSM_CTRL2 0x00000001 |
#define | CHP_EN_CTRL 0x00000002 |
#define | CHP_CLK_CTRL1 0x00000004 |
#define | CHP_CLK_CTRL2 0x00000005 |
#define | BG_REF_CTRL 0x00000006 |
#define | SD2_SW_CTRL1 0x00000008 |
#define | SD2_SW_CTRL2 0x00000009 |
#define | SD2_BIAS_CTRL 0x0000000A |
#define | AMP_BIAS_CTRL 0x0000000C |
#define | CH_PWR_CTRL1 0x0000000E |
#define | FLD_CH_SEL (1 << 3) |
#define | CH_PWR_CTRL2 0x0000000F |
#define | DSM_STATUS1 0x00000010 |
#define | DSM_STATUS2 0x00000011 |
#define | DIG_CTL1 0x00000012 |
#define | DIG_CTL2 0x00000013 |
#define | I2S_TX_CFG 0x0000001A |
#define | DEV_CNTRL2 0x00040000 |
#define | PCI_MSK_IR (1 << 28) |
#define | PCI_MSK_AV_CORE (1 << 27) |
#define | PCI_MSK_GPIO1 (1 << 24) |
#define | PCI_MSK_GPIO0 (1 << 23) |
#define | PCI_MSK_APB_DMA (1 << 12) |
#define | PCI_MSK_AL_WR (1 << 11) |
#define | PCI_MSK_AL_RD (1 << 10) |
#define | PCI_MSK_RISC_WR (1 << 9) |
#define | PCI_MSK_RISC_RD (1 << 8) |
#define | PCI_MSK_AUD_EXT (1 << 4) |
#define | PCI_MSK_AUD_INT (1 << 3) |
#define | PCI_MSK_VID_C (1 << 2) |
#define | PCI_MSK_VID_B (1 << 1) |
#define | PCI_MSK_VID_A 1 |
#define | PCI_INT_MSK 0x00040010 |
#define | PCI_INT_STAT 0x00040014 |
#define | PCI_INT_MSTAT 0x00040018 |
#define | VID_A_INT_MSK 0x00040020 |
#define | VID_A_INT_STAT 0x00040024 |
#define | VID_A_INT_MSTAT 0x00040028 |
#define | VID_A_INT_SSTAT 0x0004002C |
#define | VID_B_INT_MSK 0x00040030 |
#define | VID_B_MSK_BAD_PKT (1 << 20) |
#define | VID_B_MSK_VBI_OPC_ERR (1 << 17) |
#define | VID_B_MSK_OPC_ERR (1 << 16) |
#define | VID_B_MSK_VBI_SYNC (1 << 13) |
#define | VID_B_MSK_SYNC (1 << 12) |
#define | VID_B_MSK_VBI_OF (1 << 9) |
#define | VID_B_MSK_OF (1 << 8) |
#define | VID_B_MSK_VBI_RISCI2 (1 << 5) |
#define | VID_B_MSK_RISCI2 (1 << 4) |
#define | VID_B_MSK_VBI_RISCI1 (1 << 1) |
#define | VID_B_MSK_RISCI1 1 |
#define | VID_B_INT_STAT 0x00040034 |
#define | VID_B_INT_MSTAT 0x00040038 |
#define | VID_B_INT_SSTAT 0x0004003C |
#define | VID_B_MSK_BAD_PKT (1 << 20) |
#define | VID_B_MSK_OPC_ERR (1 << 16) |
#define | VID_B_MSK_SYNC (1 << 12) |
#define | VID_B_MSK_OF (1 << 8) |
#define | VID_B_MSK_RISCI2 (1 << 4) |
#define | VID_B_MSK_RISCI1 1 |
#define | VID_C_MSK_BAD_PKT (1 << 20) |
#define | VID_C_MSK_OPC_ERR (1 << 16) |
#define | VID_C_MSK_SYNC (1 << 12) |
#define | VID_C_MSK_OF (1 << 8) |
#define | VID_C_MSK_RISCI2 (1 << 4) |
#define | VID_C_MSK_RISCI1 1 |
#define | VID_BC_MSK_BAD_PKT (1 << 20) |
#define | VID_BC_MSK_OPC_ERR (1 << 16) |
#define | VID_BC_MSK_SYNC (1 << 12) |
#define | VID_BC_MSK_OF (1 << 8) |
#define | VID_BC_MSK_VBI_RISCI2 (1 << 5) |
#define | VID_BC_MSK_RISCI2 (1 << 4) |
#define | VID_BC_MSK_VBI_RISCI1 (1 << 1) |
#define | VID_BC_MSK_RISCI1 1 |
#define | VID_C_INT_MSK 0x00040040 |
#define | VID_C_INT_STAT 0x00040044 |
#define | VID_C_INT_MSTAT 0x00040048 |
#define | VID_C_INT_SSTAT 0x0004004C |
#define | AUDIO_INT_INT_MSK 0x00040050 |
#define | AUDIO_INT_INT_STAT 0x00040054 |
#define | AUDIO_INT_INT_MSTAT 0x00040058 |
#define | AUDIO_INT_INT_SSTAT 0x0004005C |
#define | AUDIO_EXT_INT_MSK 0x00040060 |
#define | AUDIO_EXT_INT_STAT 0x00040064 |
#define | AUDIO_EXT_INT_MSTAT 0x00040068 |
#define | AUDIO_EXT_INT_SSTAT 0x0004006C |
#define | RDR_CFG0 0x00050000 |
#define | RDR_CFG1 0x00050004 |
#define | RDR_CFG2 0x00050008 |
#define | RDR_RDRCTL1 0x0005030c |
#define | RDR_TLCTL0 0x00050318 |
#define | DMA1_PTR1 0x00100000 |
#define | DMA2_PTR1 0x00100004 |
#define | DMA3_PTR1 0x00100008 |
#define | DMA4_PTR1 0x0010000C |
#define | DMA5_PTR1 0x00100010 |
#define | DMA6_PTR1 0x00100014 |
#define | DMA7_PTR1 0x00100018 |
#define | DMA8_PTR1 0x0010001C |
#define | DMA1_PTR2 0x00100040 |
#define | DMA2_PTR2 0x00100044 |
#define | DMA3_PTR2 0x00100048 |
#define | DMA4_PTR2 0x0010004C |
#define | DMA5_PTR2 0x00100050 |
#define | DMA6_PTR2 0x00100054 |
#define | DMA7_PTR2 0x00100058 |
#define | DMA8_PTR2 0x0010005C |
#define | DMA1_CNT1 0x00100080 |
#define | DMA2_CNT1 0x00100084 |
#define | DMA3_CNT1 0x00100088 |
#define | DMA4_CNT1 0x0010008C |
#define | DMA5_CNT1 0x00100090 |
#define | DMA6_CNT1 0x00100094 |
#define | DMA7_CNT1 0x00100098 |
#define | DMA8_CNT1 0x0010009C |
#define | DMA1_CNT2 0x001000C0 |
#define | DMA2_CNT2 0x001000C4 |
#define | DMA3_CNT2 0x001000C8 |
#define | DMA4_CNT2 0x001000CC |
#define | DMA5_CNT2 0x001000D0 |
#define | DMA6_CNT2 0x001000D4 |
#define | DMA7_CNT2 0x001000D8 |
#define | DMA8_CNT2 0x001000DC |
#define | TM_CNT_LDW 0x00110000 |
#define | TM_CNT_UW 0x00110004 |
#define | TM_LMT_LDW 0x00110008 |
#define | TM_LMT_UW 0x0011000C |
#define | GP0_IO 0x00110010 |
#define | GPIO_ISM 0x00110014 |
#define | SOFT_RESET 0x0011001C |
#define | MC417_RWD 0x00110020 |
#define | MC417_OEN 0x00110024 |
#define | MC417_CTL 0x00110028 |
#define | ALT_PIN_OUT_SEL 0x0011002C |
#define | CLK_DELAY 0x00110048 |
#define | PAD_CTRL 0x0011004C |
#define | VID_A_GPCNT 0x00130020 |
#define | VBI_A_GPCNT 0x00130024 |
#define | VID_A_GPCNT_CTL 0x00130030 |
#define | VBI_A_GPCNT_CTL 0x00130034 |
#define | VID_A_DMA_CTL 0x00130040 |
#define | VID_A_VIP_CTRL 0x00130080 |
#define | VID_A_PIXEL_FRMT 0x00130084 |
#define | VID_A_VBI_CTRL 0x00130088 |
#define | VID_B_DMA 0x00130100 |
#define | VBI_B_DMA 0x00130108 |
#define | VID_B_GPCNT 0x00130120 |
#define | VBI_B_GPCNT 0x00130124 |
#define | VID_B_GPCNT_CTL 0x00130134 |
#define | VBI_B_GPCNT_CTL 0x00130138 |
#define | VID_B_DMA_CTL 0x00130140 |
#define | VID_B_SRC_SEL 0x00130144 |
#define | VID_B_LNGTH 0x00130150 |
#define | VID_B_HW_SOP_CTL 0x00130154 |
#define | VID_B_GEN_CTL 0x00130158 |
#define | VID_B_BD_PKT_STATUS 0x0013015C |
#define | VID_B_SOP_STATUS 0x00130160 |
#define | VID_B_FIFO_OVFL_STAT 0x00130164 |
#define | VID_B_VLD_MISC 0x00130168 |
#define | VID_B_TS_CLK_EN 0x0013016C |
#define | VID_B_VIP_CTRL 0x00130180 |
#define | VID_B_PIXEL_FRMT 0x00130184 |
#define | VID_C_GPCNT 0x00130220 |
#define | VID_C_GPCNT_CTL 0x00130230 |
#define | VBI_C_GPCNT_CTL 0x00130234 |
#define | VID_C_DMA_CTL 0x00130240 |
#define | VID_C_LNGTH 0x00130250 |
#define | VID_C_HW_SOP_CTL 0x00130254 |
#define | VID_C_GEN_CTL 0x00130258 |
#define | VID_C_BD_PKT_STATUS 0x0013025C |
#define | VID_C_SOP_STATUS 0x00130260 |
#define | VID_C_FIFO_OVFL_STAT 0x00130264 |
#define | VID_C_VLD_MISC 0x00130268 |
#define | VID_C_TS_CLK_EN 0x0013026C |
#define | AUD_INT_A_GPCNT 0x00140020 |
#define | AUD_INT_B_GPCNT 0x00140024 |
#define | AUD_INT_A_GPCNT_CTL 0x00140030 |
#define | AUD_INT_B_GPCNT_CTL 0x00140034 |
#define | AUD_INT_DMA_CTL 0x00140040 |
#define | AUD_INT_A_LNGTH 0x00140050 |
#define | AUD_INT_B_LNGTH 0x00140054 |
#define | AUD_INT_A_MODE 0x00140058 |
#define | AUD_INT_B_MODE 0x0014005C |
#define | AUD_EXT_DMA 0x00140100 |
#define | AUD_EXT_GPCNT 0x00140120 |
#define | AUD_EXT_GPCNT_CTL 0x00140130 |
#define | AUD_EXT_DMA_CTL 0x00140140 |
#define | AUD_EXT_LNGTH 0x00140150 |
#define | AUD_EXT_A_MODE 0x00140158 |
#define | I2C1_ADDR 0x00180000 |
#define | I2C1_WDATA 0x00180004 |
#define | I2C1_CTRL 0x00180008 |
#define | I2C1_RDATA 0x0018000C |
#define | I2C1_STAT 0x00180010 |
#define | I2C2_ADDR 0x00190000 |
#define | I2C2_WDATA 0x00190004 |
#define | I2C2_CTRL 0x00190008 |
#define | I2C2_RDATA 0x0019000C |
#define | I2C2_STAT 0x00190010 |
#define | I2C3_ADDR 0x001A0000 |
#define | I2C3_WDATA 0x001A0004 |
#define | I2C3_CTRL 0x001A0008 |
#define | I2C3_RDATA 0x001A000C |
#define | I2C3_STAT 0x001A0010 |
#define | UART_CTL 0x001B0000 |
#define | UART_BRD 0x001B0004 |
#define | UART_ISR 0x001B000C |
#define | UART_CNT 0x001B0010 |
#define AAGC_CTL 0x00000814 |
Definition at line 169 of file cx23885-reg.h.
#define AFE_CLK_OUT_CTRL 0x00000144 |
Definition at line 96 of file cx23885-reg.h.
#define AFE_CTRL 0x00000104 |
Definition at line 81 of file cx23885-reg.h.
#define AFE_DIAG_CTRL1 0x00000134 |
Definition at line 93 of file cx23885-reg.h.
#define AFE_DIAG_CTRL3 0x0000013C |
Definition at line 94 of file cx23885-reg.h.
#define ALT_PIN_OUT_SEL 0x0011002C |
Definition at line 358 of file cx23885-reg.h.
#define AMP_BIAS_CTRL 0x0000000C |
Definition at line 204 of file cx23885-reg.h.
#define AUD_EXT_A_MODE 0x00140158 |
Definition at line 423 of file cx23885-reg.h.
#define AUD_EXT_DMA 0x00140100 |
Definition at line 418 of file cx23885-reg.h.
#define AUD_EXT_DMA_CTL 0x00140140 |
Definition at line 421 of file cx23885-reg.h.
#define AUD_EXT_GPCNT 0x00140120 |
Definition at line 419 of file cx23885-reg.h.
#define AUD_EXT_GPCNT_CTL 0x00140130 |
Definition at line 420 of file cx23885-reg.h.
#define AUD_EXT_LNGTH 0x00140150 |
Definition at line 422 of file cx23885-reg.h.
#define AUD_INT_A_GPCNT 0x00140020 |
Definition at line 407 of file cx23885-reg.h.
#define AUD_INT_A_GPCNT_CTL 0x00140030 |
Definition at line 409 of file cx23885-reg.h.
#define AUD_INT_A_LNGTH 0x00140050 |
Definition at line 412 of file cx23885-reg.h.
#define AUD_INT_A_MODE 0x00140058 |
Definition at line 414 of file cx23885-reg.h.
#define AUD_INT_B_GPCNT 0x00140024 |
Definition at line 408 of file cx23885-reg.h.
#define AUD_INT_B_GPCNT_CTL 0x00140034 |
Definition at line 410 of file cx23885-reg.h.
#define AUD_INT_B_LNGTH 0x00140054 |
Definition at line 413 of file cx23885-reg.h.
#define AUD_INT_B_MODE 0x0014005C |
Definition at line 415 of file cx23885-reg.h.
#define AUD_INT_DMA_CTL 0x00140040 |
Definition at line 411 of file cx23885-reg.h.
#define AUD_IO_CTRL 0x00000124 |
Definition at line 89 of file cx23885-reg.h.
#define AUD_LOCK1 0x00000128 |
Definition at line 90 of file cx23885-reg.h.
#define AUD_LOCK2 0x0000012C |
Definition at line 91 of file cx23885-reg.h.
#define AUDIO_EXT_INT_MSK 0x00040060 |
Definition at line 290 of file cx23885-reg.h.
#define AUDIO_EXT_INT_MSTAT 0x00040068 |
Definition at line 292 of file cx23885-reg.h.
#define AUDIO_EXT_INT_SSTAT 0x0004006C |
Definition at line 293 of file cx23885-reg.h.
#define AUDIO_EXT_INT_STAT 0x00040064 |
Definition at line 291 of file cx23885-reg.h.
#define AUDIO_INT_INT_MSK 0x00040050 |
Definition at line 285 of file cx23885-reg.h.
#define AUDIO_INT_INT_MSTAT 0x00040058 |
Definition at line 287 of file cx23885-reg.h.
#define AUDIO_INT_INT_SSTAT 0x0004005C |
Definition at line 288 of file cx23885-reg.h.
#define AUDIO_INT_INT_STAT 0x00040054 |
Definition at line 286 of file cx23885-reg.h.
#define AUTOCONFIG_REG 0x000009C4 |
Definition at line 192 of file cx23885-reg.h.
#define AUX_PLL_FRAC 0x00000114 |
Definition at line 85 of file cx23885-reg.h.
#define AUX_PLL_INT_POST 0x00000110 |
Definition at line 84 of file cx23885-reg.h.
#define BAND_OUT_SEL 0x00000910 |
Definition at line 189 of file cx23885-reg.h.
#define BG_REF_CTRL 0x00000006 |
Definition at line 200 of file cx23885-reg.h.
#define CH_PWR_CTRL1 0x0000000E |
Definition at line 205 of file cx23885-reg.h.
#define CH_PWR_CTRL2 0x0000000F |
Definition at line 207 of file cx23885-reg.h.
#define CHIP_CTRL 0x00000100 |
Definition at line 80 of file cx23885-reg.h.
#define CHP_CLK_CTRL1 0x00000004 |
Definition at line 198 of file cx23885-reg.h.
#define CHP_CLK_CTRL2 0x00000005 |
Definition at line 199 of file cx23885-reg.h.
#define CHP_EN_CTRL 0x00000002 |
Definition at line 197 of file cx23885-reg.h.
#define CHROMA_CTRL 0x00000420 |
Definition at line 125 of file cx23885-reg.h.
#define CHROMA_VBIOFF_CFG 0x0000047C |
Definition at line 148 of file cx23885-reg.h.
#define CLK_DELAY 0x00110048 |
Definition at line 359 of file cx23885-reg.h.
#define COMB_CTRL 0x0000049C |
Definition at line 156 of file cx23885-reg.h.
#define CRUSH_CTRL 0x000004A0 |
Definition at line 157 of file cx23885-reg.h.
#define CX885_VERSION 0x000004B4 |
Definition at line 159 of file cx23885-reg.h.
#define DEMATRIX_CTL 0x000008CC |
Definition at line 170 of file cx23885-reg.h.
#define DEV_CNTRL2 0x00040000 |
Definition at line 214 of file cx23885-reg.h.
#define DFE_CTRL1 0x00000488 |
Definition at line 151 of file cx23885-reg.h.
#define DFE_CTRL2 0x0000048C |
Definition at line 152 of file cx23885-reg.h.
#define DFE_CTRL3 0x00000490 |
Definition at line 153 of file cx23885-reg.h.
#define DIG_CTL1 0x00000012 |
Definition at line 210 of file cx23885-reg.h.
#define DIG_CTL2 0x00000013 |
Definition at line 211 of file cx23885-reg.h.
#define DL_CTL 0x00000800 |
Definition at line 164 of file cx23885-reg.h.
#define DLL1_DIAG_CTRL 0x0000015C |
Definition at line 97 of file cx23885-reg.h.
#define DMA1_CNT1 0x00100080 |
Definition at line 322 of file cx23885-reg.h.
#define DMA1_CNT2 0x001000C0 |
Definition at line 332 of file cx23885-reg.h.
#define DMA1_PTR1 0x00100000 |
Definition at line 302 of file cx23885-reg.h.
#define DMA1_PTR2 0x00100040 |
Definition at line 312 of file cx23885-reg.h.
#define DMA2_CNT1 0x00100084 |
Definition at line 323 of file cx23885-reg.h.
#define DMA2_CNT2 0x001000C4 |
Definition at line 333 of file cx23885-reg.h.
#define DMA2_PTR1 0x00100004 |
Definition at line 303 of file cx23885-reg.h.
#define DMA2_PTR2 0x00100044 |
Definition at line 313 of file cx23885-reg.h.
#define DMA3_CNT1 0x00100088 |
Definition at line 324 of file cx23885-reg.h.
#define DMA3_CNT2 0x001000C8 |
Definition at line 334 of file cx23885-reg.h.
#define DMA3_PTR1 0x00100008 |
Definition at line 304 of file cx23885-reg.h.
#define DMA3_PTR2 0x00100048 |
Definition at line 314 of file cx23885-reg.h.
#define DMA4_CNT1 0x0010008C |
Definition at line 325 of file cx23885-reg.h.
#define DMA4_CNT2 0x001000CC |
Definition at line 335 of file cx23885-reg.h.
#define DMA4_PTR1 0x0010000C |
Definition at line 305 of file cx23885-reg.h.
#define DMA4_PTR2 0x0010004C |
Definition at line 315 of file cx23885-reg.h.
#define DMA5_CNT1 0x00100090 |
Definition at line 326 of file cx23885-reg.h.
#define DMA5_CNT2 0x001000D0 |
Definition at line 336 of file cx23885-reg.h.
#define DMA5_PTR1 0x00100010 |
Definition at line 306 of file cx23885-reg.h.
#define DMA5_PTR2 0x00100050 |
Definition at line 316 of file cx23885-reg.h.
#define DMA6_CNT1 0x00100094 |
Definition at line 327 of file cx23885-reg.h.
#define DMA6_CNT2 0x001000D4 |
Definition at line 337 of file cx23885-reg.h.
#define DMA6_PTR1 0x00100014 |
Definition at line 307 of file cx23885-reg.h.
#define DMA6_PTR2 0x00100054 |
Definition at line 317 of file cx23885-reg.h.
#define DMA7_CNT1 0x00100098 |
Definition at line 328 of file cx23885-reg.h.
#define DMA7_CNT2 0x001000D8 |
Definition at line 338 of file cx23885-reg.h.
#define DMA7_PTR1 0x00100018 |
Definition at line 308 of file cx23885-reg.h.
#define DMA7_PTR2 0x00100058 |
Definition at line 318 of file cx23885-reg.h.
#define DMA8_CNT1 0x0010009C |
Definition at line 329 of file cx23885-reg.h.
#define DMA8_CNT2 0x001000DC |
Definition at line 339 of file cx23885-reg.h.
#define DMA8_PTR1 0x0010001C |
Definition at line 309 of file cx23885-reg.h.
#define DMA8_PTR2 0x0010005C |
Definition at line 319 of file cx23885-reg.h.
#define DSM_CTRL1 0x00000000 |
Definition at line 195 of file cx23885-reg.h.
#define DSM_CTRL2 0x00000001 |
Definition at line 196 of file cx23885-reg.h.
#define DSM_STATUS1 0x00000010 |
Definition at line 208 of file cx23885-reg.h.
#define DSM_STATUS2 0x00000011 |
Definition at line 209 of file cx23885-reg.h.
#define DW8051_INT 0x0000080C |
Definition at line 167 of file cx23885-reg.h.
#define FIELD_COUNT 0x00000480 |
Definition at line 149 of file cx23885-reg.h.
#define FLD_CH_SEL (1 << 3) |
Definition at line 206 of file cx23885-reg.h.
#define GEN_STAT 0x0000040C |
Definition at line 120 of file cx23885-reg.h.
#define GENERAL_CTL 0x00000810 |
Definition at line 168 of file cx23885-reg.h.
#define GP0_IO 0x00110010 |
Definition at line 348 of file cx23885-reg.h.
#define GPIO2 0x00000164 |
Definition at line 102 of file cx23885-reg.h.
#define GPIO2_OUT_EN_REG 0x00000160 |
Definition at line 100 of file cx23885-reg.h.
#define GPIO_ISM 0x00110014 |
Definition at line 349 of file cx23885-reg.h.
#define HORIZ_TIM_CTRL 0x00000470 |
Definition at line 145 of file cx23885-reg.h.
#define HOST_REG1 0x00000000 |
Definition at line 75 of file cx23885-reg.h.
#define HOST_REG2 0x00000001 |
Definition at line 76 of file cx23885-reg.h.
#define HOST_REG3 0x00000002 |
Definition at line 77 of file cx23885-reg.h.
#define HSCALE_CTRL 0x00000418 |
Definition at line 123 of file cx23885-reg.h.
#define HTL_CTRL 0x00000498 |
Definition at line 155 of file cx23885-reg.h.
#define I2C1_ADDR 0x00180000 |
Definition at line 426 of file cx23885-reg.h.
#define I2C1_CTRL 0x00180008 |
Definition at line 428 of file cx23885-reg.h.
#define I2C1_RDATA 0x0018000C |
Definition at line 429 of file cx23885-reg.h.
#define I2C1_STAT 0x00180010 |
Definition at line 430 of file cx23885-reg.h.
#define I2C1_WDATA 0x00180004 |
Definition at line 427 of file cx23885-reg.h.
#define I2C2_ADDR 0x00190000 |
Definition at line 433 of file cx23885-reg.h.
#define I2C2_CTRL 0x00190008 |
Definition at line 435 of file cx23885-reg.h.
#define I2C2_RDATA 0x0019000C |
Definition at line 436 of file cx23885-reg.h.
#define I2C2_STAT 0x00190010 |
Definition at line 437 of file cx23885-reg.h.
#define I2C2_WDATA 0x00190004 |
Definition at line 434 of file cx23885-reg.h.
#define I2C3_ADDR 0x001A0000 |
Definition at line 440 of file cx23885-reg.h.
#define I2C3_CTRL 0x001A0008 |
Definition at line 442 of file cx23885-reg.h.
#define I2C3_RDATA 0x001A000C |
Definition at line 443 of file cx23885-reg.h.
#define I2C3_STAT 0x001A0010 |
Definition at line 444 of file cx23885-reg.h.
#define I2C3_WDATA 0x001A0004 |
Definition at line 441 of file cx23885-reg.h.
#define I2S_N_CTL 0x00000914 |
Definition at line 190 of file cx23885-reg.h.
#define I2S_OUT_CTL 0x00000918 |
Definition at line 191 of file cx23885-reg.h.
#define I2S_TX_CFG 0x0000001A |
Definition at line 212 of file cx23885-reg.h.
#define IFADC_CTRL 0x00000180 |
Definition at line 104 of file cx23885-reg.h.
#define INT_STAT_MASK 0x00000410 |
Definition at line 121 of file cx23885-reg.h.
#define IR_CDUTY_REG 0x0000020C |
Definition at line 110 of file cx23885-reg.h.
#define IR_CNTRL_REG 0x00000200 |
Definition at line 107 of file cx23885-reg.h.
#define IR_FIFO_REG 0x0000023C |
Definition at line 114 of file cx23885-reg.h.
#define IR_FILTR_REG 0x00000218 |
Definition at line 113 of file cx23885-reg.h.
#define IR_IRQEN_REG 0x00000214 |
Definition at line 112 of file cx23885-reg.h.
#define IR_RXCLK_REG 0x00000208 |
Definition at line 109 of file cx23885-reg.h.
#define IR_STAT_REG 0x00000210 |
Definition at line 111 of file cx23885-reg.h.
#define IR_TXCLK_REG 0x00000204 |
Definition at line 108 of file cx23885-reg.h.
#define LUMA_CTRL 0x00000414 |
Definition at line 122 of file cx23885-reg.h.
#define MC417_CTL 0x00110028 |
Definition at line 357 of file cx23885-reg.h.
#define MC417_OEN 0x00110024 |
Definition at line 356 of file cx23885-reg.h.
#define MC417_RWD 0x00110020 |
Definition at line 353 of file cx23885-reg.h.
#define MISC_TIM_CTRL 0x00000484 |
Definition at line 150 of file cx23885-reg.h.
#define MODE_CTRL 0x00000400 |
Definition at line 117 of file cx23885-reg.h.
#define OUT_CTRL1 0x00000404 |
Definition at line 118 of file cx23885-reg.h.
#define OUT_CTRL2 0x00000408 |
Definition at line 119 of file cx23885-reg.h.
#define PAD_CTRL 0x0011004C |
Definition at line 360 of file cx23885-reg.h.
#define PATH1_CTL1 0x000008D0 |
Definition at line 171 of file cx23885-reg.h.
#define PATH1_EQ_CTL 0x000008D8 |
Definition at line 173 of file cx23885-reg.h.
#define PATH1_SC_CTL 0x000008DC |
Definition at line 174 of file cx23885-reg.h.
#define PATH1_VOL_CTL 0x000008D4 |
Definition at line 172 of file cx23885-reg.h.
#define PATH2_CTL1 0x000008E0 |
Definition at line 175 of file cx23885-reg.h.
#define PATH2_EQ_CTL 0x000008E8 |
Definition at line 177 of file cx23885-reg.h.
#define PATH2_SC_CTL 0x000008EC |
Definition at line 178 of file cx23885-reg.h.
#define PATH2_VOL_CTL 0x000008E4 |
Definition at line 176 of file cx23885-reg.h.
#define PCI_INT_MSK 0x00040010 |
Definition at line 230 of file cx23885-reg.h.
#define PCI_INT_MSTAT 0x00040018 |
Definition at line 233 of file cx23885-reg.h.
#define PCI_INT_STAT 0x00040014 |
Definition at line 232 of file cx23885-reg.h.
#define PCI_MSK_AL_RD (1 << 10) |
Definition at line 222 of file cx23885-reg.h.
#define PCI_MSK_AL_WR (1 << 11) |
Definition at line 221 of file cx23885-reg.h.
#define PCI_MSK_APB_DMA (1 << 12) |
Definition at line 220 of file cx23885-reg.h.
#define PCI_MSK_AUD_EXT (1 << 4) |
Definition at line 225 of file cx23885-reg.h.
#define PCI_MSK_AUD_INT (1 << 3) |
Definition at line 226 of file cx23885-reg.h.
#define PCI_MSK_AV_CORE (1 << 27) |
Definition at line 217 of file cx23885-reg.h.
#define PCI_MSK_GPIO0 (1 << 23) |
Definition at line 219 of file cx23885-reg.h.
#define PCI_MSK_GPIO1 (1 << 24) |
Definition at line 218 of file cx23885-reg.h.
#define PCI_MSK_IR (1 << 28) |
Definition at line 216 of file cx23885-reg.h.
#define PCI_MSK_RISC_RD (1 << 8) |
Definition at line 224 of file cx23885-reg.h.
#define PCI_MSK_RISC_WR (1 << 9) |
Definition at line 223 of file cx23885-reg.h.
#define PCI_MSK_VID_A 1 |
Definition at line 229 of file cx23885-reg.h.
#define PCI_MSK_VID_B (1 << 1) |
Definition at line 228 of file cx23885-reg.h.
#define PCI_MSK_VID_C (1 << 2) |
Definition at line 227 of file cx23885-reg.h.
#define PIN_CTRL 0x00000120 |
Definition at line 88 of file cx23885-reg.h.
#define PLL_CTRL 0x00000494 |
Definition at line 154 of file cx23885-reg.h.
#define PLL_DIAG_CTRL 0x00000140 |
Definition at line 95 of file cx23885-reg.h.
#define POWER_CTRL 0x00000130 |
Definition at line 92 of file cx23885-reg.h.
#define RDR_CFG0 0x00050000 |
Definition at line 295 of file cx23885-reg.h.
#define RDR_CFG1 0x00050004 |
Definition at line 296 of file cx23885-reg.h.
#define RDR_CFG2 0x00050008 |
Definition at line 297 of file cx23885-reg.h.
#define RDR_RDRCTL1 0x0005030c |
Definition at line 298 of file cx23885-reg.h.
#define RDR_TLCTL0 0x00050318 |
Definition at line 299 of file cx23885-reg.h.
#define RISC_CNT_INC 0x00010000 |
Definition at line 55 of file cx23885-reg.h.
#define RISC_CNT_RESET 0x00030000 |
Definition at line 56 of file cx23885-reg.h.
#define RISC_EOL 0x04000000 |
Definition at line 59 of file cx23885-reg.h.
#define RISC_IRQ1 0x01000000 |
Definition at line 57 of file cx23885-reg.h.
#define RISC_IRQ2 0x02000000 |
Definition at line 58 of file cx23885-reg.h.
#define RISC_JUMP 0x70000000 |
Definition at line 63 of file cx23885-reg.h.
#define RISC_READ 0x90000000 |
Definition at line 66 of file cx23885-reg.h.
#define RISC_READC 0xA0000000 |
Definition at line 71 of file cx23885-reg.h.
#define RISC_RESYNC 0x80008000 |
Definition at line 65 of file cx23885-reg.h.
#define RISC_SKIP 0x20000000 |
Definition at line 62 of file cx23885-reg.h.
#define RISC_SOL 0x08000000 |
Definition at line 60 of file cx23885-reg.h.
#define RISC_SYNC 0x80000000 |
Definition at line 64 of file cx23885-reg.h.
#define RISC_WRITE 0x10000000 |
Definition at line 61 of file cx23885-reg.h.
#define RISC_WRITEC 0x50000000 |
Definition at line 70 of file cx23885-reg.h.
#define RISC_WRITECM 0xC0000000 |
Definition at line 68 of file cx23885-reg.h.
#define RISC_WRITECR 0xD0000000 |
Definition at line 69 of file cx23885-reg.h.
#define RISC_WRITERM 0xB0000000 |
Definition at line 67 of file cx23885-reg.h.
#define SD2_BIAS_CTRL 0x0000000A |
Definition at line 203 of file cx23885-reg.h.
#define SD2_SW_CTRL1 0x00000008 |
Definition at line 201 of file cx23885-reg.h.
#define SD2_SW_CTRL2 0x00000009 |
Definition at line 202 of file cx23885-reg.h.
#define SOFT_RESET 0x0011001C |
Definition at line 350 of file cx23885-reg.h.
#define SOFT_RST_CTRL 0x000004A4 |
Definition at line 158 of file cx23885-reg.h.
#define SRC1_CTL 0x000008F8 |
Definition at line 183 of file cx23885-reg.h.
#define SRC2_CTL 0x000008FC |
Definition at line 184 of file cx23885-reg.h.
#define SRC3_CTL 0x00000900 |
Definition at line 185 of file cx23885-reg.h.
#define SRC4_CTL 0x00000904 |
Definition at line 186 of file cx23885-reg.h.
#define SRC5_CTL 0x00000908 |
Definition at line 187 of file cx23885-reg.h.
#define SRC6_CTL 0x0000090C |
Definition at line 188 of file cx23885-reg.h.
#define SRC_COMB_CFG 0x00000478 |
Definition at line 147 of file cx23885-reg.h.
#define SRC_CTL 0x000008F0 |
Definition at line 181 of file cx23885-reg.h.
#define SRC_LF_COEF 0x000008F4 |
Definition at line 182 of file cx23885-reg.h.
#define STD_DET_CTL 0x00000808 |
Definition at line 166 of file cx23885-reg.h.
#define STD_DET_STATUS 0x00000804 |
Definition at line 165 of file cx23885-reg.h.
#define SYS_PLL_FRAC 0x0000011C |
Definition at line 87 of file cx23885-reg.h.
#define SYS_PLL_INT_POST 0x00000118 |
Definition at line 86 of file cx23885-reg.h.
#define TM_CNT_LDW 0x00110000 |
Definition at line 342 of file cx23885-reg.h.
#define TM_CNT_UW 0x00110004 |
Definition at line 343 of file cx23885-reg.h.
#define TM_LMT_LDW 0x00110008 |
Definition at line 344 of file cx23885-reg.h.
#define TM_LMT_UW 0x0011000C |
Definition at line 345 of file cx23885-reg.h.
#define UART_BRD 0x001B0004 |
Definition at line 448 of file cx23885-reg.h.
#define UART_CNT 0x001B0010 |
Definition at line 450 of file cx23885-reg.h.
#define UART_CTL 0x001B0000 |
Definition at line 447 of file cx23885-reg.h.
#define UART_ISR 0x001B000C |
Definition at line 449 of file cx23885-reg.h.
#define VBI_A_GPCNT 0x00130024 |
Definition at line 364 of file cx23885-reg.h.
#define VBI_A_GPCNT_CTL 0x00130034 |
Definition at line 366 of file cx23885-reg.h.
#define VBI_B_DMA 0x00130108 |
Definition at line 374 of file cx23885-reg.h.
#define VBI_B_GPCNT 0x00130124 |
Definition at line 376 of file cx23885-reg.h.
#define VBI_B_GPCNT_CTL 0x00130138 |
Definition at line 378 of file cx23885-reg.h.
#define VBI_C_GPCNT_CTL 0x00130234 |
Definition at line 395 of file cx23885-reg.h.
#define VBI_CUST1_CFG1 0x0000044C |
Definition at line 136 of file cx23885-reg.h.
#define VBI_CUST1_CFG2 0x00000450 |
Definition at line 137 of file cx23885-reg.h.
#define VBI_CUST1_CFG3 0x00000454 |
Definition at line 138 of file cx23885-reg.h.
#define VBI_CUST2_CFG1 0x00000458 |
Definition at line 139 of file cx23885-reg.h.
#define VBI_CUST2_CFG2 0x0000045C |
Definition at line 140 of file cx23885-reg.h.
#define VBI_CUST2_CFG3 0x00000460 |
Definition at line 141 of file cx23885-reg.h.
#define VBI_CUST3_CFG1 0x00000464 |
Definition at line 142 of file cx23885-reg.h.
#define VBI_CUST3_CFG2 0x00000468 |
Definition at line 143 of file cx23885-reg.h.
#define VBI_CUST3_CFG3 0x0000046C |
Definition at line 144 of file cx23885-reg.h.
#define VBI_FC_CFG 0x00000438 |
Definition at line 131 of file cx23885-reg.h.
#define VBI_LINE_CTRL1 0x00000424 |
Definition at line 126 of file cx23885-reg.h.
#define VBI_LINE_CTRL2 0x00000428 |
Definition at line 127 of file cx23885-reg.h.
#define VBI_LINE_CTRL3 0x0000042C |
Definition at line 128 of file cx23885-reg.h.
#define VBI_LINE_CTRL4 0x00000430 |
Definition at line 129 of file cx23885-reg.h.
#define VBI_LINE_CTRL5 0x00000434 |
Definition at line 130 of file cx23885-reg.h.
#define VBI_MISC_CFG1 0x0000043C |
Definition at line 132 of file cx23885-reg.h.
#define VBI_MISC_CFG2 0x00000440 |
Definition at line 133 of file cx23885-reg.h.
#define VBI_PASS_CTRL 0x000004BC |
Definition at line 160 of file cx23885-reg.h.
#define VBI_PAY1 0x00000444 |
Definition at line 134 of file cx23885-reg.h.
#define VBI_PAY2 0x00000448 |
Definition at line 135 of file cx23885-reg.h.
#define VERT_TIM_CTRL 0x00000474 |
Definition at line 146 of file cx23885-reg.h.
#define VID_A_DMA_CTL 0x00130040 |
Definition at line 367 of file cx23885-reg.h.
#define VID_A_GPCNT 0x00130020 |
Definition at line 363 of file cx23885-reg.h.
#define VID_A_GPCNT_CTL 0x00130030 |
Definition at line 365 of file cx23885-reg.h.
#define VID_A_INT_MSK 0x00040020 |
Definition at line 235 of file cx23885-reg.h.
#define VID_A_INT_MSTAT 0x00040028 |
Definition at line 237 of file cx23885-reg.h.
#define VID_A_INT_SSTAT 0x0004002C |
Definition at line 238 of file cx23885-reg.h.
#define VID_A_INT_STAT 0x00040024 |
Definition at line 236 of file cx23885-reg.h.
#define VID_A_PIXEL_FRMT 0x00130084 |
Definition at line 369 of file cx23885-reg.h.
#define VID_A_VBI_CTRL 0x00130088 |
Definition at line 370 of file cx23885-reg.h.
#define VID_A_VIP_CTRL 0x00130080 |
Definition at line 368 of file cx23885-reg.h.
#define VID_B_BD_PKT_STATUS 0x0013015C |
Definition at line 384 of file cx23885-reg.h.
#define VID_B_DMA 0x00130100 |
Definition at line 373 of file cx23885-reg.h.
#define VID_B_DMA_CTL 0x00130140 |
Definition at line 379 of file cx23885-reg.h.
#define VID_B_FIFO_OVFL_STAT 0x00130164 |
Definition at line 386 of file cx23885-reg.h.
#define VID_B_GEN_CTL 0x00130158 |
Definition at line 383 of file cx23885-reg.h.
#define VID_B_GPCNT 0x00130120 |
Definition at line 375 of file cx23885-reg.h.
#define VID_B_GPCNT_CTL 0x00130134 |
Definition at line 377 of file cx23885-reg.h.
#define VID_B_HW_SOP_CTL 0x00130154 |
Definition at line 382 of file cx23885-reg.h.
#define VID_B_INT_MSK 0x00040030 |
Definition at line 240 of file cx23885-reg.h.
#define VID_B_INT_MSTAT 0x00040038 |
Definition at line 253 of file cx23885-reg.h.
#define VID_B_INT_SSTAT 0x0004003C |
Definition at line 254 of file cx23885-reg.h.
#define VID_B_INT_STAT 0x00040034 |
Definition at line 252 of file cx23885-reg.h.
#define VID_B_LNGTH 0x00130150 |
Definition at line 381 of file cx23885-reg.h.
#define VID_B_MSK_BAD_PKT (1 << 20) |
Definition at line 256 of file cx23885-reg.h.
#define VID_B_MSK_BAD_PKT (1 << 20) |
Definition at line 256 of file cx23885-reg.h.
#define VID_B_MSK_OF (1 << 8) |
Definition at line 259 of file cx23885-reg.h.
#define VID_B_MSK_OF (1 << 8) |
Definition at line 259 of file cx23885-reg.h.
#define VID_B_MSK_OPC_ERR (1 << 16) |
Definition at line 257 of file cx23885-reg.h.
#define VID_B_MSK_OPC_ERR (1 << 16) |
Definition at line 257 of file cx23885-reg.h.
#define VID_B_MSK_RISCI1 1 |
Definition at line 261 of file cx23885-reg.h.
#define VID_B_MSK_RISCI1 1 |
Definition at line 261 of file cx23885-reg.h.
#define VID_B_MSK_RISCI2 (1 << 4) |
Definition at line 260 of file cx23885-reg.h.
#define VID_B_MSK_RISCI2 (1 << 4) |
Definition at line 260 of file cx23885-reg.h.
#define VID_B_MSK_SYNC (1 << 12) |
Definition at line 258 of file cx23885-reg.h.
#define VID_B_MSK_SYNC (1 << 12) |
Definition at line 258 of file cx23885-reg.h.
#define VID_B_MSK_VBI_OF (1 << 9) |
Definition at line 246 of file cx23885-reg.h.
#define VID_B_MSK_VBI_OPC_ERR (1 << 17) |
Definition at line 242 of file cx23885-reg.h.
#define VID_B_MSK_VBI_RISCI1 (1 << 1) |
Definition at line 250 of file cx23885-reg.h.
#define VID_B_MSK_VBI_RISCI2 (1 << 5) |
Definition at line 248 of file cx23885-reg.h.
#define VID_B_MSK_VBI_SYNC (1 << 13) |
Definition at line 244 of file cx23885-reg.h.
#define VID_B_PIXEL_FRMT 0x00130184 |
Definition at line 390 of file cx23885-reg.h.
#define VID_B_SOP_STATUS 0x00130160 |
Definition at line 385 of file cx23885-reg.h.
#define VID_B_SRC_SEL 0x00130144 |
Definition at line 380 of file cx23885-reg.h.
#define VID_B_TS_CLK_EN 0x0013016C |
Definition at line 388 of file cx23885-reg.h.
#define VID_B_VIP_CTRL 0x00130180 |
Definition at line 389 of file cx23885-reg.h.
#define VID_B_VLD_MISC 0x00130168 |
Definition at line 387 of file cx23885-reg.h.
#define VID_BC_MSK_BAD_PKT (1 << 20) |
Definition at line 271 of file cx23885-reg.h.
#define VID_BC_MSK_OF (1 << 8) |
Definition at line 274 of file cx23885-reg.h.
#define VID_BC_MSK_OPC_ERR (1 << 16) |
Definition at line 272 of file cx23885-reg.h.
#define VID_BC_MSK_RISCI1 1 |
Definition at line 278 of file cx23885-reg.h.
#define VID_BC_MSK_RISCI2 (1 << 4) |
Definition at line 276 of file cx23885-reg.h.
#define VID_BC_MSK_SYNC (1 << 12) |
Definition at line 273 of file cx23885-reg.h.
#define VID_BC_MSK_VBI_RISCI1 (1 << 1) |
Definition at line 277 of file cx23885-reg.h.
#define VID_BC_MSK_VBI_RISCI2 (1 << 5) |
Definition at line 275 of file cx23885-reg.h.
#define VID_C_BD_PKT_STATUS 0x0013025C |
Definition at line 400 of file cx23885-reg.h.
#define VID_C_DMA_CTL 0x00130240 |
Definition at line 396 of file cx23885-reg.h.
#define VID_C_FIFO_OVFL_STAT 0x00130264 |
Definition at line 402 of file cx23885-reg.h.
#define VID_C_GEN_CTL 0x00130258 |
Definition at line 399 of file cx23885-reg.h.
#define VID_C_GPCNT 0x00130220 |
Definition at line 393 of file cx23885-reg.h.
#define VID_C_GPCNT_CTL 0x00130230 |
Definition at line 394 of file cx23885-reg.h.
#define VID_C_HW_SOP_CTL 0x00130254 |
Definition at line 398 of file cx23885-reg.h.
#define VID_C_INT_MSK 0x00040040 |
Definition at line 280 of file cx23885-reg.h.
#define VID_C_INT_MSTAT 0x00040048 |
Definition at line 282 of file cx23885-reg.h.
#define VID_C_INT_SSTAT 0x0004004C |
Definition at line 283 of file cx23885-reg.h.
#define VID_C_INT_STAT 0x00040044 |
Definition at line 281 of file cx23885-reg.h.
#define VID_C_LNGTH 0x00130250 |
Definition at line 397 of file cx23885-reg.h.
#define VID_C_MSK_BAD_PKT (1 << 20) |
Definition at line 263 of file cx23885-reg.h.
#define VID_C_MSK_OF (1 << 8) |
Definition at line 266 of file cx23885-reg.h.
#define VID_C_MSK_OPC_ERR (1 << 16) |
Definition at line 264 of file cx23885-reg.h.
#define VID_C_MSK_RISCI1 1 |
Definition at line 268 of file cx23885-reg.h.
#define VID_C_MSK_RISCI2 (1 << 4) |
Definition at line 267 of file cx23885-reg.h.
#define VID_C_MSK_SYNC (1 << 12) |
Definition at line 265 of file cx23885-reg.h.
#define VID_C_SOP_STATUS 0x00130260 |
Definition at line 401 of file cx23885-reg.h.
#define VID_C_TS_CLK_EN 0x0013026C |
Definition at line 404 of file cx23885-reg.h.
#define VID_C_VLD_MISC 0x00130268 |
Definition at line 403 of file cx23885-reg.h.
#define VID_PLL_FRAC 0x0000010C |
Definition at line 83 of file cx23885-reg.h.
#define VID_PLL_INT_POST 0x00000108 |
Definition at line 82 of file cx23885-reg.h.
#define VSCALE_CTRL 0x0000041C |
Definition at line 124 of file cx23885-reg.h.