Linux Kernel
3.7.1
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Macros | |
#define | PCI_VENDOR_ID_CONEXANT 0x14F1 |
#define | PCI_DEVICE_ID_CX2300_VID 0x8800 |
#define | CX88X_DEVCTRL 0x40 |
#define | CX88X_EN_TBFX 0x02 |
#define | CX88X_EN_VSFX 0x04 |
#define | F0_CMD_STAT_MM 0x2f0004 |
#define | F1_CMD_STAT_MM 0x2f0104 |
#define | F2_CMD_STAT_MM 0x2f0204 |
#define | F3_CMD_STAT_MM 0x2f0304 |
#define | F4_CMD_STAT_MM 0x2f0404 |
#define | F0_DEV_CNTRL1_MM 0x2f0040 |
#define | F1_DEV_CNTRL1_MM 0x2f0140 |
#define | F2_DEV_CNTRL1_MM 0x2f0240 |
#define | F3_DEV_CNTRL1_MM 0x2f0340 |
#define | F4_DEV_CNTRL1_MM 0x2f0440 |
#define | F0_BAR0_MM 0x2f0010 |
#define | F1_BAR0_MM 0x2f0110 |
#define | F2_BAR0_MM 0x2f0210 |
#define | F3_BAR0_MM 0x2f0310 |
#define | F4_BAR0_MM 0x2f0410 |
#define | MO_PDMA_STHRSH 0x200000 |
#define | MO_PDMA_STADRS 0x200004 |
#define | MO_PDMA_SIADRS 0x200008 |
#define | MO_PDMA_SCNTRL 0x20000C |
#define | MO_PDMA_DTHRSH 0x200010 |
#define | MO_PDMA_DTADRS 0x200014 |
#define | MO_PDMA_DIADRS 0x200018 |
#define | MO_PDMA_DCNTRL 0x20001C |
#define | MO_LD_SSID 0x200030 |
#define | MO_DEV_CNTRL2 0x200034 |
#define | MO_PCI_INTMSK 0x200040 |
#define | MO_PCI_INTSTAT 0x200044 |
#define | MO_PCI_INTMSTAT 0x200048 |
#define | MO_VID_INTMSK 0x200050 |
#define | MO_VID_INTSTAT 0x200054 |
#define | MO_VID_INTMSTAT 0x200058 |
#define | MO_VID_INTSSTAT 0x20005C |
#define | MO_AUD_INTMSK 0x200060 |
#define | MO_AUD_INTSTAT 0x200064 |
#define | MO_AUD_INTMSTAT 0x200068 |
#define | MO_AUD_INTSSTAT 0x20006C |
#define | MO_TS_INTMSK 0x200070 |
#define | MO_TS_INTSTAT 0x200074 |
#define | MO_TS_INTMSTAT 0x200078 |
#define | MO_TS_INTSSTAT 0x20007C |
#define | MO_VIP_INTMSK 0x200080 |
#define | MO_VIP_INTSTAT 0x200084 |
#define | MO_VIP_INTMSTAT 0x200088 |
#define | MO_VIP_INTSSTAT 0x20008C |
#define | MO_GPHST_INTMSK 0x200090 |
#define | MO_GPHST_INTSTAT 0x200094 |
#define | MO_GPHST_INTMSTAT 0x200098 |
#define | MO_GPHST_INTSSTAT 0x20009C |
#define | MO_DMA7_PTR1 0x300018 |
#define | MO_DMA8_PTR1 0x30001C |
#define | MO_DMA21_PTR1 0x300080 |
#define | MO_DMA22_PTR1 0x300084 |
#define | MO_DMA23_PTR1 0x300088 |
#define | MO_DMA24_PTR1 0x30008C |
#define | MO_DMA25_PTR1 0x300090 |
#define | MO_DMA26_PTR1 0x300094 |
#define | MO_DMA27_PTR1 0x300098 |
#define | MO_DMA28_PTR1 0x30009C |
#define | MO_DMA29_PTR1 0x3000A0 |
#define | MO_DMA30_PTR1 0x3000A4 |
#define | MO_DMA31_PTR1 0x3000A8 |
#define | MO_DMA32_PTR1 0x3000AC |
#define | MO_DMA21_PTR2 0x3000C0 |
#define | MO_DMA22_PTR2 0x3000C4 |
#define | MO_DMA23_PTR2 0x3000C8 |
#define | MO_DMA24_PTR2 0x3000CC |
#define | MO_DMA25_PTR2 0x3000D0 |
#define | MO_DMA26_PTR2 0x3000D4 |
#define | MO_DMA27_PTR2 0x3000D8 |
#define | MO_DMA28_PTR2 0x3000DC |
#define | MO_DMA29_PTR2 0x3000E0 |
#define | MO_DMA30_PTR2 0x3000E4 |
#define | MO_DMA31_PTR2 0x3000E8 |
#define | MO_DMA32_PTR2 0x3000EC |
#define | MO_DMA21_CNT1 0x300100 |
#define | MO_DMA22_CNT1 0x300104 |
#define | MO_DMA23_CNT1 0x300108 |
#define | MO_DMA24_CNT1 0x30010C |
#define | MO_DMA25_CNT1 0x300110 |
#define | MO_DMA26_CNT1 0x300114 |
#define | MO_DMA27_CNT1 0x300118 |
#define | MO_DMA28_CNT1 0x30011C |
#define | MO_DMA29_CNT1 0x300120 |
#define | MO_DMA30_CNT1 0x300124 |
#define | MO_DMA31_CNT1 0x300128 |
#define | MO_DMA32_CNT1 0x30012C |
#define | MO_DMA21_CNT2 0x300140 |
#define | MO_DMA22_CNT2 0x300144 |
#define | MO_DMA23_CNT2 0x300148 |
#define | MO_DMA24_CNT2 0x30014C |
#define | MO_DMA25_CNT2 0x300150 |
#define | MO_DMA26_CNT2 0x300154 |
#define | MO_DMA27_CNT2 0x300158 |
#define | MO_DMA28_CNT2 0x30015C |
#define | MO_DMA29_CNT2 0x300160 |
#define | MO_DMA30_CNT2 0x300164 |
#define | MO_DMA31_CNT2 0x300168 |
#define | MO_DMA32_CNT2 0x30016C |
#define | MO_VIDY_DMA 0x310000 |
#define | MO_VIDU_DMA 0x310008 |
#define | MO_VIDV_DMA 0x310010 |
#define | MO_VBI_DMA 0x310018 |
#define | MO_DEVICE_STATUS 0x310100 |
#define | MO_INPUT_FORMAT 0x310104 |
#define | MO_AGC_BURST 0x31010c |
#define | MO_CONTR_BRIGHT 0x310110 |
#define | MO_UV_SATURATION 0x310114 |
#define | MO_HUE 0x310118 |
#define | MO_HTOTAL 0x310120 |
#define | MO_HDELAY_EVEN 0x310124 |
#define | MO_HDELAY_ODD 0x310128 |
#define | MO_VDELAY_ODD 0x31012c |
#define | MO_VDELAY_EVEN 0x310130 |
#define | MO_HACTIVE_EVEN 0x31013c |
#define | MO_HACTIVE_ODD 0x310140 |
#define | MO_VACTIVE_EVEN 0x310144 |
#define | MO_VACTIVE_ODD 0x310148 |
#define | MO_HSCALE_EVEN 0x31014c |
#define | MO_HSCALE_ODD 0x310150 |
#define | MO_VSCALE_EVEN 0x310154 |
#define | MO_FILTER_EVEN 0x31015c |
#define | MO_VSCALE_ODD 0x310158 |
#define | MO_FILTER_ODD 0x310160 |
#define | MO_OUTPUT_FORMAT 0x310164 |
#define | MO_PLL_REG 0x310168 |
#define | MO_PLL_ADJ_CTRL 0x31016c |
#define | MO_SCONV_REG 0x310170 |
#define | MO_SCONV_FIFO 0x310174 |
#define | MO_SUB_STEP 0x310178 |
#define | MO_SUB_STEP_DR 0x31017c |
#define | MO_CAPTURE_CTRL 0x310180 |
#define | MO_COLOR_CTRL 0x310184 |
#define | MO_VBI_PACKET 0x310188 |
#define | MO_FIELD_COUNT 0x310190 |
#define | MO_VIP_CONFIG 0x310194 |
#define | MO_VBOS_CONTROL 0x3101a8 |
#define | MO_AGC_BACK_VBI 0x310200 |
#define | MO_AGC_SYNC_TIP1 0x310208 |
#define | MO_VIDY_GPCNT 0x31C020 |
#define | MO_VIDU_GPCNT 0x31C024 |
#define | MO_VIDV_GPCNT 0x31C028 |
#define | MO_VBI_GPCNT 0x31C02C |
#define | MO_VIDY_GPCNTRL 0x31C030 |
#define | MO_VIDU_GPCNTRL 0x31C034 |
#define | MO_VIDV_GPCNTRL 0x31C038 |
#define | MO_VBI_GPCNTRL 0x31C03C |
#define | MO_VID_DMACNTRL 0x31C040 |
#define | MO_VID_XFR_STAT 0x31C044 |
#define | MO_AUDD_DMA 0x320000 |
#define | MO_AUDU_DMA 0x320008 |
#define | MO_AUDR_DMA 0x320010 |
#define | MO_AUDD_GPCNT 0x32C020 |
#define | MO_AUDU_GPCNT 0x32C024 |
#define | MO_AUDR_GPCNT 0x32C028 |
#define | MO_AUDD_GPCNTRL 0x32C030 |
#define | MO_AUDU_GPCNTRL 0x32C034 |
#define | MO_AUDR_GPCNTRL 0x32C038 |
#define | MO_AUD_DMACNTRL 0x32C040 |
#define | MO_AUD_XFR_STAT 0x32C044 |
#define | MO_AUDD_LNGTH 0x32C048 |
#define | MO_AUDR_LNGTH 0x32C04C |
#define | AUD_INIT 0x320100 |
#define | AUD_INIT_LD 0x320104 |
#define | AUD_SOFT_RESET 0x320108 |
#define | AUD_I2SINPUTCNTL 0x320120 |
#define | AUD_BAUDRATE 0x320124 |
#define | AUD_I2SOUTPUTCNTL 0x320128 |
#define | AAGC_HYST 0x320134 |
#define | AAGC_GAIN 0x320138 |
#define | AAGC_DEF 0x32013c |
#define | AUD_IIR1_0_SEL 0x320150 |
#define | AUD_IIR1_0_SHIFT 0x320154 |
#define | AUD_IIR1_1_SEL 0x320158 |
#define | AUD_IIR1_1_SHIFT 0x32015c |
#define | AUD_IIR1_2_SEL 0x320160 |
#define | AUD_IIR1_2_SHIFT 0x320164 |
#define | AUD_IIR1_3_SEL 0x320168 |
#define | AUD_IIR1_3_SHIFT 0x32016c |
#define | AUD_IIR1_4_SEL 0x320170 |
#define | AUD_IIR1_4_SHIFT 0x32017c |
#define | AUD_IIR1_5_SEL 0x320180 |
#define | AUD_IIR1_5_SHIFT 0x320184 |
#define | AUD_IIR2_0_SEL 0x320190 |
#define | AUD_IIR2_0_SHIFT 0x320194 |
#define | AUD_IIR2_1_SEL 0x320198 |
#define | AUD_IIR2_1_SHIFT 0x32019c |
#define | AUD_IIR2_2_SEL 0x3201a0 |
#define | AUD_IIR2_2_SHIFT 0x3201a4 |
#define | AUD_IIR2_3_SEL 0x3201a8 |
#define | AUD_IIR2_3_SHIFT 0x3201ac |
#define | AUD_IIR3_0_SEL 0x3201c0 |
#define | AUD_IIR3_0_SHIFT 0x3201c4 |
#define | AUD_IIR3_1_SEL 0x3201c8 |
#define | AUD_IIR3_1_SHIFT 0x3201cc |
#define | AUD_IIR3_2_SEL 0x3201d0 |
#define | AUD_IIR3_2_SHIFT 0x3201d4 |
#define | AUD_IIR4_0_SEL 0x3201e0 |
#define | AUD_IIR4_0_SHIFT 0x3201e4 |
#define | AUD_IIR4_1_SEL 0x3201e8 |
#define | AUD_IIR4_1_SHIFT 0x3201ec |
#define | AUD_IIR4_2_SEL 0x3201f0 |
#define | AUD_IIR4_2_SHIFT 0x3201f4 |
#define | AUD_IIR4_0_CA0 0x320200 |
#define | AUD_IIR4_0_CA1 0x320204 |
#define | AUD_IIR4_0_CA2 0x320208 |
#define | AUD_IIR4_0_CB0 0x32020c |
#define | AUD_IIR4_0_CB1 0x320210 |
#define | AUD_IIR4_1_CA0 0x320214 |
#define | AUD_IIR4_1_CA1 0x320218 |
#define | AUD_IIR4_1_CA2 0x32021c |
#define | AUD_IIR4_1_CB0 0x320220 |
#define | AUD_IIR4_1_CB1 0x320224 |
#define | AUD_IIR4_2_CA0 0x320228 |
#define | AUD_IIR4_2_CA1 0x32022c |
#define | AUD_IIR4_2_CA2 0x320230 |
#define | AUD_IIR4_2_CB0 0x320234 |
#define | AUD_IIR4_2_CB1 0x320238 |
#define | AUD_HP_MD_IIR4_1 0x320250 |
#define | AUD_HP_PROG_IIR4_1 0x320254 |
#define | AUD_FM_MODE_ENABLE 0x320258 |
#define | AUD_POLY0_DDS_CONSTANT 0x320270 |
#define | AUD_DN0_FREQ 0x320274 |
#define | AUD_DN1_FREQ 0x320278 |
#define | AUD_DN1_FREQ_SHIFT 0x32027c |
#define | AUD_DN1_AFC 0x320280 |
#define | AUD_DN1_SRC_SEL 0x320284 |
#define | AUD_DN1_SHFT 0x320288 |
#define | AUD_DN2_FREQ 0x32028c |
#define | AUD_DN2_FREQ_SHIFT 0x320290 |
#define | AUD_DN2_AFC 0x320294 |
#define | AUD_DN2_SRC_SEL 0x320298 |
#define | AUD_DN2_SHFT 0x32029c |
#define | AUD_CRDC0_SRC_SEL 0x320300 |
#define | AUD_CRDC0_SHIFT 0x320304 |
#define | AUD_CORDIC_SHIFT_0 0x320308 |
#define | AUD_CRDC1_SRC_SEL 0x32030c |
#define | AUD_CRDC1_SHIFT 0x320310 |
#define | AUD_CORDIC_SHIFT_1 0x320314 |
#define | AUD_DCOC_0_SRC 0x320320 |
#define | AUD_DCOC0_SHIFT 0x320324 |
#define | AUD_DCOC_0_SHIFT_IN0 0x320328 |
#define | AUD_DCOC_0_SHIFT_IN1 0x32032c |
#define | AUD_DCOC_1_SRC 0x320330 |
#define | AUD_DCOC1_SHIFT 0x320334 |
#define | AUD_DCOC_1_SHIFT_IN0 0x320338 |
#define | AUD_DCOC_1_SHIFT_IN1 0x32033c |
#define | AUD_DCOC_2_SRC 0x320340 |
#define | AUD_DCOC2_SHIFT 0x320344 |
#define | AUD_DCOC_2_SHIFT_IN0 0x320348 |
#define | AUD_DCOC_2_SHIFT_IN1 0x32034c |
#define | AUD_DCOC_PASS_IN 0x320350 |
#define | AUD_PDET_SRC 0x320370 |
#define | AUD_PDET_SHIFT 0x320374 |
#define | AUD_PILOT_BQD_1_K0 0x320380 |
#define | AUD_PILOT_BQD_1_K1 0x320384 |
#define | AUD_PILOT_BQD_1_K2 0x320388 |
#define | AUD_PILOT_BQD_1_K3 0x32038c |
#define | AUD_PILOT_BQD_1_K4 0x320390 |
#define | AUD_PILOT_BQD_2_K0 0x320394 |
#define | AUD_PILOT_BQD_2_K1 0x320398 |
#define | AUD_PILOT_BQD_2_K2 0x32039c |
#define | AUD_PILOT_BQD_2_K3 0x3203a0 |
#define | AUD_PILOT_BQD_2_K4 0x3203a4 |
#define | AUD_THR_FR 0x3203c0 |
#define | AUD_X_PROG 0x3203c4 |
#define | AUD_Y_PROG 0x3203c8 |
#define | AUD_HARMONIC_MULT 0x3203cc |
#define | AUD_C1_UP_THR 0x3203d0 |
#define | AUD_C1_LO_THR 0x3203d4 |
#define | AUD_C2_UP_THR 0x3203d8 |
#define | AUD_C2_LO_THR 0x3203dc |
#define | AUD_PLL_EN 0x320400 |
#define | AUD_PLL_SRC 0x320404 |
#define | AUD_PLL_SHIFT 0x320408 |
#define | AUD_PLL_IF_SEL 0x32040c |
#define | AUD_PLL_IF_SHIFT 0x320410 |
#define | AUD_BIQUAD_PLL_K0 0x320414 |
#define | AUD_BIQUAD_PLL_K1 0x320418 |
#define | AUD_BIQUAD_PLL_K2 0x32041c |
#define | AUD_BIQUAD_PLL_K3 0x320420 |
#define | AUD_BIQUAD_PLL_K4 0x320424 |
#define | AUD_DEEMPH0_SRC_SEL 0x320440 |
#define | AUD_DEEMPH0_SHIFT 0x320444 |
#define | AUD_DEEMPH0_G0 0x320448 |
#define | AUD_DEEMPH0_A0 0x32044c |
#define | AUD_DEEMPH0_B0 0x320450 |
#define | AUD_DEEMPH0_A1 0x320454 |
#define | AUD_DEEMPH0_B1 0x320458 |
#define | AUD_DEEMPH1_SRC_SEL 0x32045c |
#define | AUD_DEEMPH1_SHIFT 0x320460 |
#define | AUD_DEEMPH1_G0 0x320464 |
#define | AUD_DEEMPH1_A0 0x320468 |
#define | AUD_DEEMPH1_B0 0x32046c |
#define | AUD_DEEMPH1_A1 0x320470 |
#define | AUD_DEEMPH1_B1 0x320474 |
#define | AUD_OUT0_SEL 0x320490 |
#define | AUD_OUT0_SHIFT 0x320494 |
#define | AUD_OUT1_SEL 0x320498 |
#define | AUD_OUT1_SHIFT 0x32049c |
#define | AUD_RDSI_SEL 0x3204a0 |
#define | AUD_RDSI_SHIFT 0x3204a4 |
#define | AUD_RDSQ_SEL 0x3204a8 |
#define | AUD_RDSQ_SHIFT 0x3204ac |
#define | AUD_DBX_IN_GAIN 0x320500 |
#define | AUD_DBX_WBE_GAIN 0x320504 |
#define | AUD_DBX_SE_GAIN 0x320508 |
#define | AUD_DBX_RMS_WBE 0x32050c |
#define | AUD_DBX_RMS_SE 0x320510 |
#define | AUD_DBX_SE_BYPASS 0x320514 |
#define | AUD_FAWDETCTL 0x320530 |
#define | AUD_FAWDETWINCTL 0x320534 |
#define | AUD_DEEMPHGAIN_R 0x320538 |
#define | AUD_DEEMPHNUMER1_R 0x32053c |
#define | AUD_DEEMPHNUMER2_R 0x320540 |
#define | AUD_DEEMPHDENOM1_R 0x320544 |
#define | AUD_DEEMPHDENOM2_R 0x320548 |
#define | AUD_ERRLOGPERIOD_R 0x32054c |
#define | AUD_ERRINTRPTTHSHLD1_R 0x320550 |
#define | AUD_ERRINTRPTTHSHLD2_R 0x320554 |
#define | AUD_ERRINTRPTTHSHLD3_R 0x320558 |
#define | AUD_NICAM_STATUS1 0x32055c |
#define | AUD_NICAM_STATUS2 0x320560 |
#define | AUD_ERRLOG1 0x320564 |
#define | AUD_ERRLOG2 0x320568 |
#define | AUD_ERRLOG3 0x32056c |
#define | AUD_DAC_BYPASS_L 0x320580 |
#define | AUD_DAC_BYPASS_R 0x320584 |
#define | AUD_DAC_BYPASS_CTL 0x320588 |
#define | AUD_CTL 0x32058c |
#define | AUD_STATUS 0x320590 |
#define | AUD_VOL_CTL 0x320594 |
#define | AUD_BAL_CTL 0x320598 |
#define | AUD_START_TIMER 0x3205b0 |
#define | AUD_MODE_CHG_TIMER 0x3205b4 |
#define | AUD_POLYPH80SCALEFAC 0x3205b8 |
#define | AUD_DMD_RA_DDS 0x3205bc |
#define | AUD_I2S_RA_DDS 0x3205c0 |
#define | AUD_RATE_THRES_DMD 0x3205d0 |
#define | AUD_RATE_THRES_I2S 0x3205d4 |
#define | AUD_RATE_ADJ1 0x3205d8 |
#define | AUD_RATE_ADJ2 0x3205dc |
#define | AUD_RATE_ADJ3 0x3205e0 |
#define | AUD_RATE_ADJ4 0x3205e4 |
#define | AUD_RATE_ADJ5 0x3205e8 |
#define | AUD_APB_IN_RATE_ADJ 0x3205ec |
#define | AUD_I2SCNTL 0x3205ec |
#define | AUD_PHASE_FIX_CTL 0x3205f0 |
#define | AUD_PLL_PRESCALE 0x320600 |
#define | AUD_PLL_DDS 0x320604 |
#define | AUD_PLL_INT 0x320608 |
#define | AUD_PLL_FRAC 0x32060c |
#define | AUD_PLL_JTAG 0x320620 |
#define | AUD_PLL_SPMP 0x320624 |
#define | AUD_AFE_12DB_EN 0x320628 |
#define | AUD_PDF_DDS_CNST_BYTE2 0x320d01 |
#define | AUD_PDF_DDS_CNST_BYTE1 0x320d02 |
#define | AUD_PDF_DDS_CNST_BYTE0 0x320d03 |
#define | AUD_PHACC_FREQ_8MSB 0x320d2a |
#define | AUD_PHACC_FREQ_8LSB 0x320d2b |
#define | AUD_QAM_MODE 0x320d04 |
#define | MO_TS_DMA 0x330000 |
#define | MO_TS_GPCNT 0x33C020 |
#define | MO_TS_GPCNTRL 0x33C030 |
#define | MO_TS_DMACNTRL 0x33C040 |
#define | MO_TS_XFR_STAT 0x33C044 |
#define | MO_TS_LNGTH 0x33C048 |
#define | TS_HW_SOP_CNTRL 0x33C04C |
#define | TS_GEN_CNTRL 0x33C050 |
#define | TS_BD_PKT_STAT 0x33C054 |
#define | TS_SOP_STAT 0x33C058 |
#define | TS_FIFO_OVFL_STAT 0x33C05C |
#define | TS_VALERR_CNTRL 0x33C060 |
#define | MO_VIPD_DMA 0x340000 |
#define | MO_VIPU_DMA 0x340008 |
#define | MO_VIPD_GPCNT 0x34C020 |
#define | MO_VIPU_GPCNT 0x34C024 |
#define | MO_VIPD_GPCNTRL 0x34C030 |
#define | MO_VIPU_GPCNTRL 0x34C034 |
#define | MO_VIP_DMACNTRL 0x34C040 |
#define | MO_VIP_XFR_STAT 0x34C044 |
#define | MO_VIP_CFG 0x340048 |
#define | MO_VIPU_CNTRL 0x34004C |
#define | MO_VIPD_CNTRL 0x340050 |
#define | MO_VIPD_LNGTH 0x340054 |
#define | MO_VIP_BRSTLN 0x340058 |
#define | MO_VIP_INTCNTRL 0x34C05C |
#define | MO_VIP_XFTERM 0x340060 |
#define | MO_M2M_DMA 0x350000 |
#define | MO_GP0_IO 0x350010 |
#define | MO_GP1_IO 0x350014 |
#define | MO_GP2_IO 0x350018 |
#define | MO_GP3_IO 0x35001C |
#define | MO_GPIO 0x350020 |
#define | MO_GPOE 0x350024 |
#define | MO_GP_ISM 0x350028 |
#define | MO_PLL_B 0x35C008 |
#define | MO_M2M_CNT 0x35C024 |
#define | MO_M2M_XSUM 0x35C028 |
#define | MO_CRC 0x35C02C |
#define | MO_CRC_D 0x35C030 |
#define | MO_TM_CNT_LDW 0x35C034 |
#define | MO_TM_CNT_UW 0x35C038 |
#define | MO_TM_LMT_LDW 0x35C03C |
#define | MO_TM_LMT_UW 0x35C040 |
#define | MO_PINMUX_IO 0x35C044 |
#define | MO_TSTSEL_IO 0x35C048 |
#define | MO_AFECFG_IO 0x35C04C |
#define | MO_DDS_IO 0x35C050 |
#define | MO_DDSCFG_IO 0x35C054 |
#define | MO_SAMPLE_IO 0x35C058 |
#define | MO_SRST_IO 0x35C05C |
#define | MO_INT1_MSK 0x35C060 |
#define | MO_INT1_STAT 0x35C064 |
#define | MO_INT1_MSTAT 0x35C068 |
#define | MO_I2C 0x368000 |
#define | MO_I2C_DIV (0xf<<4) |
#define | MO_I2C_SYNC (1<<3) |
#define | MO_I2C_W3B (1<<2) |
#define | MO_I2C_SCL (1<<1) |
#define | MO_I2C_SDA (1<<0) |
#define | MO_GPHSTD_DMA 0x350000 |
#define | MO_GPHSTU_DMA 0x350008 |
#define | MO_GPHSTU_CNTRL 0x380048 |
#define | MO_GPHSTD_CNTRL 0x38004C |
#define | MO_GPHSTD_LNGTH 0x380050 |
#define | MO_GPHST_WSC 0x380054 |
#define | MO_GPHST_XFR 0x380058 |
#define | MO_GPHST_WDTH 0x38005C |
#define | MO_GPHST_HDSHK 0x380060 |
#define | MO_GPHST_MUX16 0x380064 |
#define | MO_GPHST_MODE 0x380068 |
#define | MO_GPHSTD_GPCNT 0x35C020 |
#define | MO_GPHSTU_GPCNT 0x35C024 |
#define | MO_GPHSTD_GPCNTRL 0x38C030 |
#define | MO_GPHSTU_GPCNTRL 0x38C034 |
#define | MO_GPHST_DMACNTRL 0x38C040 |
#define | MO_GPHST_XFR_STAT 0x38C044 |
#define | MO_GPHST_SOFT_RST 0x38C06C |
#define | RISC_SYNC 0x80000000 |
#define | RISC_SYNC_ODD 0x80000000 |
#define | RISC_SYNC_EVEN 0x80000200 |
#define | RISC_RESYNC 0x80008000 |
#define | RISC_RESYNC_ODD 0x80008000 |
#define | RISC_RESYNC_EVEN 0x80008200 |
#define | RISC_WRITE 0x10000000 |
#define | RISC_WRITEC 0x50000000 |
#define | RISC_READ 0x90000000 |
#define | RISC_READC 0xA0000000 |
#define | RISC_JUMP 0x70000000 |
#define | RISC_SKIP 0x20000000 |
#define | RISC_WRITERM 0xB0000000 |
#define | RISC_WRITECM 0xC0000000 |
#define | RISC_WRITECR 0xD0000000 |
#define | RISC_IMM 0x00000001 |
#define | RISC_SOL 0x08000000 |
#define | RISC_EOL 0x04000000 |
#define | RISC_IRQ2 0x02000000 |
#define | RISC_IRQ1 0x01000000 |
#define | RISC_CNT_NONE 0x00000000 |
#define | RISC_CNT_INC 0x00010000 |
#define | RISC_CNT_RSVR 0x00020000 |
#define | RISC_CNT_RESET 0x00030000 |
#define | RISC_JMP_SRP 0x01 |
#define | PCI_INT_VIDINT (1 << 0) |
#define | PCI_INT_AUDINT (1 << 1) |
#define | PCI_INT_TSINT (1 << 2) |
#define | PCI_INT_VIPINT (1 << 3) |
#define | PCI_INT_HSTINT (1 << 4) |
#define | PCI_INT_TM1INT (1 << 5) |
#define | PCI_INT_SRCDMAINT (1 << 6) |
#define | PCI_INT_DSTDMAINT (1 << 7) |
#define | PCI_INT_RISC_RD_BERRINT (1 << 10) |
#define | PCI_INT_RISC_WR_BERRINT (1 << 11) |
#define | PCI_INT_BRDG_BERRINT (1 << 12) |
#define | PCI_INT_SRC_DMA_BERRINT (1 << 13) |
#define | PCI_INT_DST_DMA_BERRINT (1 << 14) |
#define | PCI_INT_IPB_DMA_BERRINT (1 << 15) |
#define | PCI_INT_I2CDONE (1 << 16) |
#define | PCI_INT_I2CRACK (1 << 17) |
#define | PCI_INT_IR_SMPINT (1 << 18) |
#define | PCI_INT_GPIO_INT0 (1 << 19) |
#define | PCI_INT_GPIO_INT1 (1 << 20) |
#define | SEL_BTSC 0x01 |
#define | SEL_EIAJ 0x02 |
#define | SEL_A2 0x04 |
#define | SEL_SAP 0x08 |
#define | SEL_NICAM 0x10 |
#define | SEL_FMRADIO 0x20 |
#define | AUD_INT_DN_RISCI1 (1 << 0) |
#define | AUD_INT_UP_RISCI1 (1 << 1) |
#define | AUD_INT_RDS_DN_RISCI1 (1 << 2) |
#define | AUD_INT_DN_RISCI2 (1 << 4) /* yes, 3 is skipped */ |
#define | AUD_INT_UP_RISCI2 (1 << 5) |
#define | AUD_INT_RDS_DN_RISCI2 (1 << 6) |
#define | AUD_INT_DN_SYNC (1 << 12) |
#define | AUD_INT_UP_SYNC (1 << 13) |
#define | AUD_INT_RDS_DN_SYNC (1 << 14) |
#define | AUD_INT_OPC_ERR (1 << 16) |
#define | AUD_INT_BER_IRQ (1 << 20) |
#define | AUD_INT_MCHG_IRQ (1 << 21) |
#define | EN_BTSC_FORCE_MONO 0 |
#define | EN_BTSC_FORCE_STEREO 1 |
#define | EN_BTSC_FORCE_SAP 2 |
#define | EN_BTSC_AUTO_STEREO 3 |
#define | EN_BTSC_AUTO_SAP 4 |
#define | EN_A2_FORCE_MONO1 8 |
#define | EN_A2_FORCE_MONO2 9 |
#define | EN_A2_FORCE_STEREO 10 |
#define | EN_A2_AUTO_MONO2 11 |
#define | EN_A2_AUTO_STEREO 12 |
#define | EN_EIAJ_FORCE_MONO1 16 |
#define | EN_EIAJ_FORCE_MONO2 17 |
#define | EN_EIAJ_FORCE_STEREO 18 |
#define | EN_EIAJ_AUTO_MONO2 19 |
#define | EN_EIAJ_AUTO_STEREO 20 |
#define | EN_NICAM_FORCE_MONO1 32 |
#define | EN_NICAM_FORCE_MONO2 33 |
#define | EN_NICAM_FORCE_STEREO 34 |
#define | EN_NICAM_AUTO_MONO2 35 |
#define | EN_NICAM_AUTO_STEREO 36 |
#define | EN_FMRADIO_FORCE_MONO 24 |
#define | EN_FMRADIO_FORCE_STEREO 25 |
#define | EN_FMRADIO_AUTO_STEREO 26 |
#define | EN_NICAM_AUTO_FALLBACK 0x00000040 |
#define | EN_FMRADIO_EN_RDS 0x00000200 |
#define | EN_NICAM_TRY_AGAIN_BIT 0x00000400 |
#define | EN_DAC_ENABLE 0x00001000 |
#define | EN_I2SOUT_ENABLE 0x00002000 |
#define | EN_I2SIN_STR2DAC 0x00004000 |
#define | EN_I2SIN_ENABLE 0x00008000 |
#define | EN_DMTRX_SUMDIFF (0 << 7) |
#define | EN_DMTRX_SUMR (1 << 7) |
#define | EN_DMTRX_LR (2 << 7) |
#define | EN_DMTRX_MONO (3 << 7) |
#define | EN_DMTRX_BYPASS (1 << 11) |
#define | VID_CAPTURE_CONTROL 0x310180 |
#define | CX23880_CAP_CTL_CAPTURE_VBI_ODD (1<<3) |
#define | CX23880_CAP_CTL_CAPTURE_VBI_EVEN (1<<2) |
#define | CX23880_CAP_CTL_CAPTURE_ODD (1<<1) |
#define | CX23880_CAP_CTL_CAPTURE_EVEN (1<<0) |
#define | VideoInputMux0 0x0 |
#define | VideoInputMux1 0x1 |
#define | VideoInputMux2 0x2 |
#define | VideoInputMux3 0x3 |
#define | VideoInputTuner 0x0 |
#define | VideoInputComposite 0x1 |
#define | VideoInputSVideo 0x2 |
#define | VideoInputOther 0x3 |
#define | Xtal0 0x1 |
#define | Xtal1 0x2 |
#define | XtalAuto 0x3 |
#define | VideoFormatAuto 0x0 |
#define | VideoFormatNTSC 0x1 |
#define | VideoFormatNTSCJapan 0x2 |
#define | VideoFormatNTSC443 0x3 |
#define | VideoFormatPAL 0x4 |
#define | VideoFormatPALB 0x4 |
#define | VideoFormatPALD 0x4 |
#define | VideoFormatPALG 0x4 |
#define | VideoFormatPALH 0x4 |
#define | VideoFormatPALI 0x4 |
#define | VideoFormatPALBDGHI 0x4 |
#define | VideoFormatPALM 0x5 |
#define | VideoFormatPALN 0x6 |
#define | VideoFormatPALNC 0x7 |
#define | VideoFormatPAL60 0x8 |
#define | VideoFormatSECAM 0x9 |
#define | VideoFormatAuto27MHz 0x10 |
#define | VideoFormatNTSC27MHz 0x11 |
#define | VideoFormatNTSCJapan27MHz 0x12 |
#define | VideoFormatNTSC44327MHz 0x13 |
#define | VideoFormatPAL27MHz 0x14 |
#define | VideoFormatPALB27MHz 0x14 |
#define | VideoFormatPALD27MHz 0x14 |
#define | VideoFormatPALG27MHz 0x14 |
#define | VideoFormatPALH27MHz 0x14 |
#define | VideoFormatPALI27MHz 0x14 |
#define | VideoFormatPALBDGHI27MHz 0x14 |
#define | VideoFormatPALM27MHz 0x15 |
#define | VideoFormatPALN27MHz 0x16 |
#define | VideoFormatPALNC27MHz 0x17 |
#define | VideoFormatPAL6027MHz 0x18 |
#define | VideoFormatSECAM27MHz 0x19 |
#define | NominalUSECAM 0x87 |
#define | NominalVSECAM 0x85 |
#define | NominalUNTSC 0xFE |
#define | NominalVNTSC 0xB4 |
#define | NominalContrast 0xD8 |
#define | HFilterAutoFormat 0x0 |
#define | HFilterCIF 0x1 |
#define | HFilterQCIF 0x2 |
#define | HFilterICON 0x3 |
#define | VFilter2TapInterpolate 0 |
#define | VFilter3TapInterpolate 1 |
#define | VFilter4TapInterpolate 2 |
#define | VFilter5TapInterpolate 3 |
#define | VFilter2TapNoInterpolate 4 |
#define | VFilter3TapNoInterpolate 5 |
#define | VFilter4TapNoInterpolate 6 |
#define | VFilter5TapNoInterpolate 7 |
#define | ColorFormatRGB32 0x0000 |
#define | ColorFormatRGB24 0x0011 |
#define | ColorFormatRGB16 0x0022 |
#define | ColorFormatRGB15 0x0033 |
#define | ColorFormatYUY2 0x0044 |
#define | ColorFormatBTYUV 0x0055 |
#define | ColorFormatY8 0x0066 |
#define | ColorFormatRGB8 0x0077 |
#define | ColorFormatPL422 0x0088 |
#define | ColorFormatPL411 0x0099 |
#define | ColorFormatYUV12 0x00AA |
#define | ColorFormatYUV9 0x00BB |
#define | ColorFormatRAW 0x00EE |
#define | ColorFormatBSWAP 0x0300 |
#define | ColorFormatWSWAP 0x0c00 |
#define | ColorFormatEvenMask 0x050f |
#define | ColorFormatOddMask 0x0af0 |
#define | ColorFormatGamma 0x1000 |
#define | Interlaced 0x1 |
#define | NonInterlaced 0x0 |
#define | FieldEven 0x1 |
#define | FieldOdd 0x0 |
#define | TGReadWriteMode 0x0 |
#define | TGEnableMode 0x1 |
#define | DV_CbAlign 0x0 |
#define | DV_Y0Align 0x1 |
#define | DV_CrAlign 0x2 |
#define | DV_Y1Align 0x3 |
#define | DVF_Analog 0x0 |
#define | DVF_CCIR656 0x1 |
#define | DVF_ByteStream 0x2 |
#define | DVF_ExtVSYNC 0x4 |
#define | DVF_ExtField 0x5 |
#define | CHANNEL_VID_Y 0x1 |
#define | CHANNEL_VID_U 0x2 |
#define | CHANNEL_VID_V 0x3 |
#define | CHANNEL_VID_VBI 0x4 |
#define | CHANNEL_AUD_DN 0x5 |
#define | CHANNEL_AUD_UP 0x6 |
#define | CHANNEL_AUD_RDS_DN 0x7 |
#define | CHANNEL_MPEG_DN 0x8 |
#define | CHANNEL_VIP_DN 0x9 |
#define | CHANNEL_VIP_UP 0xA |
#define | CHANNEL_HOST_DN 0xB |
#define | CHANNEL_HOST_UP 0xC |
#define | CHANNEL_FIRST 0x1 |
#define | CHANNEL_LAST 0xC |
#define | GP_COUNT_CONTROL_NONE 0x0 |
#define | GP_COUNT_CONTROL_INC 0x1 |
#define | GP_COUNT_CONTROL_RESERVED 0x2 |
#define | GP_COUNT_CONTROL_RESET 0x3 |
#define | PLL_PRESCALE_BY_2 2 |
#define | PLL_PRESCALE_BY_3 3 |
#define | PLL_PRESCALE_BY_4 4 |
#define | PLL_PRESCALE_BY_5 5 |
#define | HLNotchFilter4xFsc 0 |
#define | HLNotchFilterSquare 1 |
#define | HLNotchFilter135NTSC 2 |
#define | HLNotchFilter135PAL 3 |
#define | NTSC_8x_SUB_CARRIER 28.63636E6 |
#define | PAL_8x_SUB_CARRIER 35.46895E6 |
#define | DEFAULT_HUE_NTSC 0x00 |
#define | DEFAULT_BRIGHTNESS_NTSC 0x00 |
#define | DEFAULT_CONTRAST_NTSC 0x39 |
#define | DEFAULT_SAT_U_NTSC 0x7F |
#define | DEFAULT_SAT_V_NTSC 0x5A |
Enumerations | |
enum | VIDEOSOURCETYPE { SOURCE_TUNER = 0, SOURCE_COMPOSITE, SOURCE_SVIDEO, SOURCE_OTHER1, SOURCE_OTHER2, SOURCE_COMPVIASVIDEO, SOURCE_CCIR656 } |
#define AAGC_DEF 0x32013c |
Definition at line 246 of file cx88-reg.h.
#define AAGC_GAIN 0x320138 |
Definition at line 245 of file cx88-reg.h.
#define AAGC_HYST 0x320134 |
Definition at line 244 of file cx88-reg.h.
#define AUD_AFE_12DB_EN 0x320628 |
Definition at line 430 of file cx88-reg.h.
#define AUD_APB_IN_RATE_ADJ 0x3205ec |
Definition at line 421 of file cx88-reg.h.
#define AUD_BAL_CTL 0x320598 |
Definition at line 408 of file cx88-reg.h.
#define AUD_BAUDRATE 0x320124 |
Definition at line 242 of file cx88-reg.h.
#define AUD_BIQUAD_PLL_K0 0x320414 |
Definition at line 353 of file cx88-reg.h.
#define AUD_BIQUAD_PLL_K1 0x320418 |
Definition at line 354 of file cx88-reg.h.
#define AUD_BIQUAD_PLL_K2 0x32041c |
Definition at line 355 of file cx88-reg.h.
#define AUD_BIQUAD_PLL_K3 0x320420 |
Definition at line 356 of file cx88-reg.h.
#define AUD_BIQUAD_PLL_K4 0x320424 |
Definition at line 357 of file cx88-reg.h.
#define AUD_C1_LO_THR 0x3203d4 |
Definition at line 345 of file cx88-reg.h.
#define AUD_C1_UP_THR 0x3203d0 |
Definition at line 344 of file cx88-reg.h.
#define AUD_C2_LO_THR 0x3203dc |
Definition at line 347 of file cx88-reg.h.
#define AUD_C2_UP_THR 0x3203d8 |
Definition at line 346 of file cx88-reg.h.
#define AUD_CORDIC_SHIFT_0 0x320308 |
Definition at line 311 of file cx88-reg.h.
#define AUD_CORDIC_SHIFT_1 0x320314 |
Definition at line 314 of file cx88-reg.h.
#define AUD_CRDC0_SHIFT 0x320304 |
Definition at line 310 of file cx88-reg.h.
#define AUD_CRDC0_SRC_SEL 0x320300 |
Definition at line 309 of file cx88-reg.h.
#define AUD_CRDC1_SHIFT 0x320310 |
Definition at line 313 of file cx88-reg.h.
#define AUD_CRDC1_SRC_SEL 0x32030c |
Definition at line 312 of file cx88-reg.h.
#define AUD_CTL 0x32058c |
Definition at line 405 of file cx88-reg.h.
#define AUD_DAC_BYPASS_CTL 0x320588 |
Definition at line 404 of file cx88-reg.h.
#define AUD_DAC_BYPASS_L 0x320580 |
Definition at line 402 of file cx88-reg.h.
#define AUD_DAC_BYPASS_R 0x320584 |
Definition at line 403 of file cx88-reg.h.
#define AUD_DBX_IN_GAIN 0x320500 |
Definition at line 380 of file cx88-reg.h.
#define AUD_DBX_RMS_SE 0x320510 |
Definition at line 384 of file cx88-reg.h.
#define AUD_DBX_RMS_WBE 0x32050c |
Definition at line 383 of file cx88-reg.h.
#define AUD_DBX_SE_BYPASS 0x320514 |
Definition at line 385 of file cx88-reg.h.
#define AUD_DBX_SE_GAIN 0x320508 |
Definition at line 382 of file cx88-reg.h.
#define AUD_DBX_WBE_GAIN 0x320504 |
Definition at line 381 of file cx88-reg.h.
#define AUD_DCOC0_SHIFT 0x320324 |
Definition at line 316 of file cx88-reg.h.
#define AUD_DCOC1_SHIFT 0x320334 |
Definition at line 320 of file cx88-reg.h.
#define AUD_DCOC2_SHIFT 0x320344 |
Definition at line 324 of file cx88-reg.h.
#define AUD_DCOC_0_SHIFT_IN0 0x320328 |
Definition at line 317 of file cx88-reg.h.
#define AUD_DCOC_0_SHIFT_IN1 0x32032c |
Definition at line 318 of file cx88-reg.h.
#define AUD_DCOC_0_SRC 0x320320 |
Definition at line 315 of file cx88-reg.h.
#define AUD_DCOC_1_SHIFT_IN0 0x320338 |
Definition at line 321 of file cx88-reg.h.
#define AUD_DCOC_1_SHIFT_IN1 0x32033c |
Definition at line 322 of file cx88-reg.h.
#define AUD_DCOC_1_SRC 0x320330 |
Definition at line 319 of file cx88-reg.h.
#define AUD_DCOC_2_SHIFT_IN0 0x320348 |
Definition at line 325 of file cx88-reg.h.
#define AUD_DCOC_2_SHIFT_IN1 0x32034c |
Definition at line 326 of file cx88-reg.h.
#define AUD_DCOC_2_SRC 0x320340 |
Definition at line 323 of file cx88-reg.h.
#define AUD_DCOC_PASS_IN 0x320350 |
Definition at line 327 of file cx88-reg.h.
#define AUD_DEEMPH0_A0 0x32044c |
Definition at line 361 of file cx88-reg.h.
#define AUD_DEEMPH0_A1 0x320454 |
Definition at line 363 of file cx88-reg.h.
#define AUD_DEEMPH0_B0 0x320450 |
Definition at line 362 of file cx88-reg.h.
#define AUD_DEEMPH0_B1 0x320458 |
Definition at line 364 of file cx88-reg.h.
#define AUD_DEEMPH0_G0 0x320448 |
Definition at line 360 of file cx88-reg.h.
#define AUD_DEEMPH0_SHIFT 0x320444 |
Definition at line 359 of file cx88-reg.h.
#define AUD_DEEMPH0_SRC_SEL 0x320440 |
Definition at line 358 of file cx88-reg.h.
#define AUD_DEEMPH1_A0 0x320468 |
Definition at line 368 of file cx88-reg.h.
#define AUD_DEEMPH1_A1 0x320470 |
Definition at line 370 of file cx88-reg.h.
#define AUD_DEEMPH1_B0 0x32046c |
Definition at line 369 of file cx88-reg.h.
#define AUD_DEEMPH1_B1 0x320474 |
Definition at line 371 of file cx88-reg.h.
#define AUD_DEEMPH1_G0 0x320464 |
Definition at line 367 of file cx88-reg.h.
#define AUD_DEEMPH1_SHIFT 0x320460 |
Definition at line 366 of file cx88-reg.h.
#define AUD_DEEMPH1_SRC_SEL 0x32045c |
Definition at line 365 of file cx88-reg.h.
#define AUD_DEEMPHDENOM1_R 0x320544 |
Definition at line 391 of file cx88-reg.h.
#define AUD_DEEMPHDENOM2_R 0x320548 |
Definition at line 392 of file cx88-reg.h.
#define AUD_DEEMPHGAIN_R 0x320538 |
Definition at line 388 of file cx88-reg.h.
#define AUD_DEEMPHNUMER1_R 0x32053c |
Definition at line 389 of file cx88-reg.h.
#define AUD_DEEMPHNUMER2_R 0x320540 |
Definition at line 390 of file cx88-reg.h.
#define AUD_DMD_RA_DDS 0x3205bc |
Definition at line 412 of file cx88-reg.h.
#define AUD_DN0_FREQ 0x320274 |
Definition at line 298 of file cx88-reg.h.
#define AUD_DN1_AFC 0x320280 |
Definition at line 301 of file cx88-reg.h.
#define AUD_DN1_FREQ 0x320278 |
Definition at line 299 of file cx88-reg.h.
#define AUD_DN1_FREQ_SHIFT 0x32027c |
Definition at line 300 of file cx88-reg.h.
#define AUD_DN1_SHFT 0x320288 |
Definition at line 303 of file cx88-reg.h.
#define AUD_DN1_SRC_SEL 0x320284 |
Definition at line 302 of file cx88-reg.h.
#define AUD_DN2_AFC 0x320294 |
Definition at line 306 of file cx88-reg.h.
#define AUD_DN2_FREQ 0x32028c |
Definition at line 304 of file cx88-reg.h.
#define AUD_DN2_FREQ_SHIFT 0x320290 |
Definition at line 305 of file cx88-reg.h.
#define AUD_DN2_SHFT 0x32029c |
Definition at line 308 of file cx88-reg.h.
#define AUD_DN2_SRC_SEL 0x320298 |
Definition at line 307 of file cx88-reg.h.
#define AUD_ERRINTRPTTHSHLD1_R 0x320550 |
Definition at line 394 of file cx88-reg.h.
#define AUD_ERRINTRPTTHSHLD2_R 0x320554 |
Definition at line 395 of file cx88-reg.h.
#define AUD_ERRINTRPTTHSHLD3_R 0x320558 |
Definition at line 396 of file cx88-reg.h.
#define AUD_ERRLOG1 0x320564 |
Definition at line 399 of file cx88-reg.h.
#define AUD_ERRLOG2 0x320568 |
Definition at line 400 of file cx88-reg.h.
#define AUD_ERRLOG3 0x32056c |
Definition at line 401 of file cx88-reg.h.
#define AUD_ERRLOGPERIOD_R 0x32054c |
Definition at line 393 of file cx88-reg.h.
#define AUD_FAWDETCTL 0x320530 |
Definition at line 386 of file cx88-reg.h.
#define AUD_FAWDETWINCTL 0x320534 |
Definition at line 387 of file cx88-reg.h.
#define AUD_FM_MODE_ENABLE 0x320258 |
Definition at line 296 of file cx88-reg.h.
#define AUD_HARMONIC_MULT 0x3203cc |
Definition at line 343 of file cx88-reg.h.
#define AUD_HP_MD_IIR4_1 0x320250 |
Definition at line 294 of file cx88-reg.h.
#define AUD_HP_PROG_IIR4_1 0x320254 |
Definition at line 295 of file cx88-reg.h.
#define AUD_I2S_RA_DDS 0x3205c0 |
Definition at line 413 of file cx88-reg.h.
#define AUD_I2SCNTL 0x3205ec |
Definition at line 422 of file cx88-reg.h.
#define AUD_I2SINPUTCNTL 0x320120 |
Definition at line 241 of file cx88-reg.h.
#define AUD_I2SOUTPUTCNTL 0x320128 |
Definition at line 243 of file cx88-reg.h.
#define AUD_IIR1_0_SEL 0x320150 |
Definition at line 247 of file cx88-reg.h.
#define AUD_IIR1_0_SHIFT 0x320154 |
Definition at line 248 of file cx88-reg.h.
#define AUD_IIR1_1_SEL 0x320158 |
Definition at line 249 of file cx88-reg.h.
#define AUD_IIR1_1_SHIFT 0x32015c |
Definition at line 250 of file cx88-reg.h.
#define AUD_IIR1_2_SEL 0x320160 |
Definition at line 251 of file cx88-reg.h.
#define AUD_IIR1_2_SHIFT 0x320164 |
Definition at line 252 of file cx88-reg.h.
#define AUD_IIR1_3_SEL 0x320168 |
Definition at line 253 of file cx88-reg.h.
#define AUD_IIR1_3_SHIFT 0x32016c |
Definition at line 254 of file cx88-reg.h.
#define AUD_IIR1_4_SEL 0x320170 |
Definition at line 255 of file cx88-reg.h.
#define AUD_IIR1_4_SHIFT 0x32017c |
Definition at line 256 of file cx88-reg.h.
#define AUD_IIR1_5_SEL 0x320180 |
Definition at line 257 of file cx88-reg.h.
#define AUD_IIR1_5_SHIFT 0x320184 |
Definition at line 258 of file cx88-reg.h.
#define AUD_IIR2_0_SEL 0x320190 |
Definition at line 259 of file cx88-reg.h.
#define AUD_IIR2_0_SHIFT 0x320194 |
Definition at line 260 of file cx88-reg.h.
#define AUD_IIR2_1_SEL 0x320198 |
Definition at line 261 of file cx88-reg.h.
#define AUD_IIR2_1_SHIFT 0x32019c |
Definition at line 262 of file cx88-reg.h.
#define AUD_IIR2_2_SEL 0x3201a0 |
Definition at line 263 of file cx88-reg.h.
#define AUD_IIR2_2_SHIFT 0x3201a4 |
Definition at line 264 of file cx88-reg.h.
#define AUD_IIR2_3_SEL 0x3201a8 |
Definition at line 265 of file cx88-reg.h.
#define AUD_IIR2_3_SHIFT 0x3201ac |
Definition at line 266 of file cx88-reg.h.
#define AUD_IIR3_0_SEL 0x3201c0 |
Definition at line 267 of file cx88-reg.h.
#define AUD_IIR3_0_SHIFT 0x3201c4 |
Definition at line 268 of file cx88-reg.h.
#define AUD_IIR3_1_SEL 0x3201c8 |
Definition at line 269 of file cx88-reg.h.
#define AUD_IIR3_1_SHIFT 0x3201cc |
Definition at line 270 of file cx88-reg.h.
#define AUD_IIR3_2_SEL 0x3201d0 |
Definition at line 271 of file cx88-reg.h.
#define AUD_IIR3_2_SHIFT 0x3201d4 |
Definition at line 272 of file cx88-reg.h.
#define AUD_IIR4_0_CA0 0x320200 |
Definition at line 279 of file cx88-reg.h.
#define AUD_IIR4_0_CA1 0x320204 |
Definition at line 280 of file cx88-reg.h.
#define AUD_IIR4_0_CA2 0x320208 |
Definition at line 281 of file cx88-reg.h.
#define AUD_IIR4_0_CB0 0x32020c |
Definition at line 282 of file cx88-reg.h.
#define AUD_IIR4_0_CB1 0x320210 |
Definition at line 283 of file cx88-reg.h.
#define AUD_IIR4_0_SEL 0x3201e0 |
Definition at line 273 of file cx88-reg.h.
#define AUD_IIR4_0_SHIFT 0x3201e4 |
Definition at line 274 of file cx88-reg.h.
#define AUD_IIR4_1_CA0 0x320214 |
Definition at line 284 of file cx88-reg.h.
#define AUD_IIR4_1_CA1 0x320218 |
Definition at line 285 of file cx88-reg.h.
#define AUD_IIR4_1_CA2 0x32021c |
Definition at line 286 of file cx88-reg.h.
#define AUD_IIR4_1_CB0 0x320220 |
Definition at line 287 of file cx88-reg.h.
#define AUD_IIR4_1_CB1 0x320224 |
Definition at line 288 of file cx88-reg.h.
#define AUD_IIR4_1_SEL 0x3201e8 |
Definition at line 275 of file cx88-reg.h.
#define AUD_IIR4_1_SHIFT 0x3201ec |
Definition at line 276 of file cx88-reg.h.
#define AUD_IIR4_2_CA0 0x320228 |
Definition at line 289 of file cx88-reg.h.
#define AUD_IIR4_2_CA1 0x32022c |
Definition at line 290 of file cx88-reg.h.
#define AUD_IIR4_2_CA2 0x320230 |
Definition at line 291 of file cx88-reg.h.
#define AUD_IIR4_2_CB0 0x320234 |
Definition at line 292 of file cx88-reg.h.
#define AUD_IIR4_2_CB1 0x320238 |
Definition at line 293 of file cx88-reg.h.
#define AUD_IIR4_2_SEL 0x3201f0 |
Definition at line 277 of file cx88-reg.h.
#define AUD_IIR4_2_SHIFT 0x3201f4 |
Definition at line 278 of file cx88-reg.h.
#define AUD_INIT 0x320100 |
Definition at line 238 of file cx88-reg.h.
#define AUD_INIT_LD 0x320104 |
Definition at line 239 of file cx88-reg.h.
#define AUD_INT_BER_IRQ (1 << 20) |
Definition at line 625 of file cx88-reg.h.
#define AUD_INT_DN_RISCI1 (1 << 0) |
Definition at line 615 of file cx88-reg.h.
Definition at line 618 of file cx88-reg.h.
#define AUD_INT_DN_SYNC (1 << 12) |
Definition at line 621 of file cx88-reg.h.
#define AUD_INT_MCHG_IRQ (1 << 21) |
Definition at line 626 of file cx88-reg.h.
#define AUD_INT_OPC_ERR (1 << 16) |
Definition at line 624 of file cx88-reg.h.
#define AUD_INT_RDS_DN_RISCI1 (1 << 2) |
Definition at line 617 of file cx88-reg.h.
#define AUD_INT_RDS_DN_RISCI2 (1 << 6) |
Definition at line 620 of file cx88-reg.h.
#define AUD_INT_RDS_DN_SYNC (1 << 14) |
Definition at line 623 of file cx88-reg.h.
#define AUD_INT_UP_RISCI1 (1 << 1) |
Definition at line 616 of file cx88-reg.h.
#define AUD_INT_UP_RISCI2 (1 << 5) |
Definition at line 619 of file cx88-reg.h.
#define AUD_INT_UP_SYNC (1 << 13) |
Definition at line 622 of file cx88-reg.h.
#define AUD_MODE_CHG_TIMER 0x3205b4 |
Definition at line 410 of file cx88-reg.h.
#define AUD_NICAM_STATUS1 0x32055c |
Definition at line 397 of file cx88-reg.h.
#define AUD_NICAM_STATUS2 0x320560 |
Definition at line 398 of file cx88-reg.h.
#define AUD_OUT0_SEL 0x320490 |
Definition at line 372 of file cx88-reg.h.
#define AUD_OUT0_SHIFT 0x320494 |
Definition at line 373 of file cx88-reg.h.
#define AUD_OUT1_SEL 0x320498 |
Definition at line 374 of file cx88-reg.h.
#define AUD_OUT1_SHIFT 0x32049c |
Definition at line 375 of file cx88-reg.h.
#define AUD_PDET_SHIFT 0x320374 |
Definition at line 329 of file cx88-reg.h.
#define AUD_PDET_SRC 0x320370 |
Definition at line 328 of file cx88-reg.h.
#define AUD_PDF_DDS_CNST_BYTE0 0x320d03 |
Definition at line 435 of file cx88-reg.h.
#define AUD_PDF_DDS_CNST_BYTE1 0x320d02 |
Definition at line 434 of file cx88-reg.h.
#define AUD_PDF_DDS_CNST_BYTE2 0x320d01 |
Definition at line 433 of file cx88-reg.h.
#define AUD_PHACC_FREQ_8LSB 0x320d2b |
Definition at line 437 of file cx88-reg.h.
#define AUD_PHACC_FREQ_8MSB 0x320d2a |
Definition at line 436 of file cx88-reg.h.
#define AUD_PHASE_FIX_CTL 0x3205f0 |
Definition at line 423 of file cx88-reg.h.
#define AUD_PILOT_BQD_1_K0 0x320380 |
Definition at line 330 of file cx88-reg.h.
#define AUD_PILOT_BQD_1_K1 0x320384 |
Definition at line 331 of file cx88-reg.h.
#define AUD_PILOT_BQD_1_K2 0x320388 |
Definition at line 332 of file cx88-reg.h.
#define AUD_PILOT_BQD_1_K3 0x32038c |
Definition at line 333 of file cx88-reg.h.
#define AUD_PILOT_BQD_1_K4 0x320390 |
Definition at line 334 of file cx88-reg.h.
#define AUD_PILOT_BQD_2_K0 0x320394 |
Definition at line 335 of file cx88-reg.h.
#define AUD_PILOT_BQD_2_K1 0x320398 |
Definition at line 336 of file cx88-reg.h.
#define AUD_PILOT_BQD_2_K2 0x32039c |
Definition at line 337 of file cx88-reg.h.
#define AUD_PILOT_BQD_2_K3 0x3203a0 |
Definition at line 338 of file cx88-reg.h.
#define AUD_PILOT_BQD_2_K4 0x3203a4 |
Definition at line 339 of file cx88-reg.h.
#define AUD_PLL_DDS 0x320604 |
Definition at line 425 of file cx88-reg.h.
#define AUD_PLL_EN 0x320400 |
Definition at line 348 of file cx88-reg.h.
#define AUD_PLL_FRAC 0x32060c |
Definition at line 427 of file cx88-reg.h.
#define AUD_PLL_IF_SEL 0x32040c |
Definition at line 351 of file cx88-reg.h.
#define AUD_PLL_IF_SHIFT 0x320410 |
Definition at line 352 of file cx88-reg.h.
#define AUD_PLL_INT 0x320608 |
Definition at line 426 of file cx88-reg.h.
#define AUD_PLL_JTAG 0x320620 |
Definition at line 428 of file cx88-reg.h.
#define AUD_PLL_PRESCALE 0x320600 |
Definition at line 424 of file cx88-reg.h.
#define AUD_PLL_SHIFT 0x320408 |
Definition at line 350 of file cx88-reg.h.
#define AUD_PLL_SPMP 0x320624 |
Definition at line 429 of file cx88-reg.h.
#define AUD_PLL_SRC 0x320404 |
Definition at line 349 of file cx88-reg.h.
#define AUD_POLY0_DDS_CONSTANT 0x320270 |
Definition at line 297 of file cx88-reg.h.
#define AUD_POLYPH80SCALEFAC 0x3205b8 |
Definition at line 411 of file cx88-reg.h.
#define AUD_QAM_MODE 0x320d04 |
Definition at line 438 of file cx88-reg.h.
#define AUD_RATE_ADJ1 0x3205d8 |
Definition at line 416 of file cx88-reg.h.
#define AUD_RATE_ADJ2 0x3205dc |
Definition at line 417 of file cx88-reg.h.
#define AUD_RATE_ADJ3 0x3205e0 |
Definition at line 418 of file cx88-reg.h.
#define AUD_RATE_ADJ4 0x3205e4 |
Definition at line 419 of file cx88-reg.h.
#define AUD_RATE_ADJ5 0x3205e8 |
Definition at line 420 of file cx88-reg.h.
#define AUD_RATE_THRES_DMD 0x3205d0 |
Definition at line 414 of file cx88-reg.h.
#define AUD_RATE_THRES_I2S 0x3205d4 |
Definition at line 415 of file cx88-reg.h.
#define AUD_RDSI_SEL 0x3204a0 |
Definition at line 376 of file cx88-reg.h.
#define AUD_RDSI_SHIFT 0x3204a4 |
Definition at line 377 of file cx88-reg.h.
#define AUD_RDSQ_SEL 0x3204a8 |
Definition at line 378 of file cx88-reg.h.
#define AUD_RDSQ_SHIFT 0x3204ac |
Definition at line 379 of file cx88-reg.h.
#define AUD_SOFT_RESET 0x320108 |
Definition at line 240 of file cx88-reg.h.
#define AUD_START_TIMER 0x3205b0 |
Definition at line 409 of file cx88-reg.h.
#define AUD_STATUS 0x320590 |
Definition at line 406 of file cx88-reg.h.
#define AUD_THR_FR 0x3203c0 |
Definition at line 340 of file cx88-reg.h.
#define AUD_VOL_CTL 0x320594 |
Definition at line 407 of file cx88-reg.h.
#define AUD_X_PROG 0x3203c4 |
Definition at line 341 of file cx88-reg.h.
#define AUD_Y_PROG 0x3203c8 |
Definition at line 342 of file cx88-reg.h.
#define CHANNEL_AUD_DN 0x5 |
Definition at line 789 of file cx88-reg.h.
#define CHANNEL_AUD_RDS_DN 0x7 |
Definition at line 791 of file cx88-reg.h.
#define CHANNEL_AUD_UP 0x6 |
Definition at line 790 of file cx88-reg.h.
#define CHANNEL_FIRST 0x1 |
Definition at line 797 of file cx88-reg.h.
#define CHANNEL_HOST_DN 0xB |
Definition at line 795 of file cx88-reg.h.
#define CHANNEL_HOST_UP 0xC |
Definition at line 796 of file cx88-reg.h.
#define CHANNEL_LAST 0xC |
Definition at line 798 of file cx88-reg.h.
#define CHANNEL_MPEG_DN 0x8 |
Definition at line 792 of file cx88-reg.h.
#define CHANNEL_VID_U 0x2 |
Definition at line 786 of file cx88-reg.h.
#define CHANNEL_VID_V 0x3 |
Definition at line 787 of file cx88-reg.h.
#define CHANNEL_VID_VBI 0x4 |
Definition at line 788 of file cx88-reg.h.
#define CHANNEL_VID_Y 0x1 |
Definition at line 785 of file cx88-reg.h.
#define CHANNEL_VIP_DN 0x9 |
Definition at line 793 of file cx88-reg.h.
#define CHANNEL_VIP_UP 0xA |
Definition at line 794 of file cx88-reg.h.
#define ColorFormatBSWAP 0x0300 |
Definition at line 759 of file cx88-reg.h.
#define ColorFormatBTYUV 0x0055 |
Definition at line 751 of file cx88-reg.h.
#define ColorFormatEvenMask 0x050f |
Definition at line 761 of file cx88-reg.h.
#define ColorFormatGamma 0x1000 |
Definition at line 763 of file cx88-reg.h.
#define ColorFormatOddMask 0x0af0 |
Definition at line 762 of file cx88-reg.h.
#define ColorFormatPL411 0x0099 |
Definition at line 755 of file cx88-reg.h.
#define ColorFormatPL422 0x0088 |
Definition at line 754 of file cx88-reg.h.
#define ColorFormatRAW 0x00EE |
Definition at line 758 of file cx88-reg.h.
#define ColorFormatRGB15 0x0033 |
Definition at line 749 of file cx88-reg.h.
#define ColorFormatRGB16 0x0022 |
Definition at line 748 of file cx88-reg.h.
#define ColorFormatRGB24 0x0011 |
Definition at line 747 of file cx88-reg.h.
#define ColorFormatRGB32 0x0000 |
Definition at line 746 of file cx88-reg.h.
#define ColorFormatRGB8 0x0077 |
Definition at line 753 of file cx88-reg.h.
#define ColorFormatWSWAP 0x0c00 |
Definition at line 760 of file cx88-reg.h.
#define ColorFormatY8 0x0066 |
Definition at line 752 of file cx88-reg.h.
#define ColorFormatYUV12 0x00AA |
Definition at line 756 of file cx88-reg.h.
#define ColorFormatYUV9 0x00BB |
Definition at line 757 of file cx88-reg.h.
#define ColorFormatYUY2 0x0044 |
Definition at line 750 of file cx88-reg.h.
#define CX23880_CAP_CTL_CAPTURE_EVEN (1<<0) |
Definition at line 676 of file cx88-reg.h.
#define CX23880_CAP_CTL_CAPTURE_ODD (1<<1) |
Definition at line 675 of file cx88-reg.h.
#define CX23880_CAP_CTL_CAPTURE_VBI_EVEN (1<<2) |
Definition at line 674 of file cx88-reg.h.
#define CX23880_CAP_CTL_CAPTURE_VBI_ODD (1<<3) |
Definition at line 673 of file cx88-reg.h.
#define CX88X_DEVCTRL 0x40 |
Definition at line 38 of file cx88-reg.h.
#define CX88X_EN_TBFX 0x02 |
Definition at line 39 of file cx88-reg.h.
#define CX88X_EN_VSFX 0x04 |
Definition at line 40 of file cx88-reg.h.
#define DEFAULT_BRIGHTNESS_NTSC 0x00 |
Definition at line 820 of file cx88-reg.h.
#define DEFAULT_CONTRAST_NTSC 0x39 |
Definition at line 821 of file cx88-reg.h.
#define DEFAULT_HUE_NTSC 0x00 |
Definition at line 819 of file cx88-reg.h.
#define DEFAULT_SAT_U_NTSC 0x7F |
Definition at line 822 of file cx88-reg.h.
#define DEFAULT_SAT_V_NTSC 0x5A |
Definition at line 823 of file cx88-reg.h.
#define DV_CbAlign 0x0 |
Definition at line 774 of file cx88-reg.h.
#define DV_CrAlign 0x2 |
Definition at line 776 of file cx88-reg.h.
#define DV_Y0Align 0x1 |
Definition at line 775 of file cx88-reg.h.
#define DV_Y1Align 0x3 |
Definition at line 777 of file cx88-reg.h.
#define DVF_Analog 0x0 |
Definition at line 779 of file cx88-reg.h.
#define DVF_ByteStream 0x2 |
Definition at line 781 of file cx88-reg.h.
#define DVF_CCIR656 0x1 |
Definition at line 780 of file cx88-reg.h.
#define DVF_ExtField 0x5 |
Definition at line 783 of file cx88-reg.h.
#define DVF_ExtVSYNC 0x4 |
Definition at line 782 of file cx88-reg.h.
#define EN_A2_AUTO_MONO2 11 |
Definition at line 637 of file cx88-reg.h.
#define EN_A2_AUTO_STEREO 12 |
Definition at line 638 of file cx88-reg.h.
#define EN_A2_FORCE_MONO1 8 |
Definition at line 634 of file cx88-reg.h.
#define EN_A2_FORCE_MONO2 9 |
Definition at line 635 of file cx88-reg.h.
#define EN_A2_FORCE_STEREO 10 |
Definition at line 636 of file cx88-reg.h.
#define EN_BTSC_AUTO_SAP 4 |
Definition at line 632 of file cx88-reg.h.
#define EN_BTSC_AUTO_STEREO 3 |
Definition at line 631 of file cx88-reg.h.
#define EN_BTSC_FORCE_MONO 0 |
Definition at line 628 of file cx88-reg.h.
#define EN_BTSC_FORCE_SAP 2 |
Definition at line 630 of file cx88-reg.h.
#define EN_BTSC_FORCE_STEREO 1 |
Definition at line 629 of file cx88-reg.h.
#define EN_DAC_ENABLE 0x00001000 |
Definition at line 659 of file cx88-reg.h.
#define EN_DMTRX_BYPASS (1 << 11) |
Definition at line 668 of file cx88-reg.h.
#define EN_DMTRX_LR (2 << 7) |
Definition at line 666 of file cx88-reg.h.
#define EN_DMTRX_MONO (3 << 7) |
Definition at line 667 of file cx88-reg.h.
#define EN_DMTRX_SUMDIFF (0 << 7) |
Definition at line 664 of file cx88-reg.h.
#define EN_DMTRX_SUMR (1 << 7) |
Definition at line 665 of file cx88-reg.h.
#define EN_EIAJ_AUTO_MONO2 19 |
Definition at line 643 of file cx88-reg.h.
#define EN_EIAJ_AUTO_STEREO 20 |
Definition at line 644 of file cx88-reg.h.
#define EN_EIAJ_FORCE_MONO1 16 |
Definition at line 640 of file cx88-reg.h.
#define EN_EIAJ_FORCE_MONO2 17 |
Definition at line 641 of file cx88-reg.h.
#define EN_EIAJ_FORCE_STEREO 18 |
Definition at line 642 of file cx88-reg.h.
#define EN_FMRADIO_AUTO_STEREO 26 |
Definition at line 654 of file cx88-reg.h.
#define EN_FMRADIO_EN_RDS 0x00000200 |
Definition at line 657 of file cx88-reg.h.
#define EN_FMRADIO_FORCE_MONO 24 |
Definition at line 652 of file cx88-reg.h.
#define EN_FMRADIO_FORCE_STEREO 25 |
Definition at line 653 of file cx88-reg.h.
#define EN_I2SIN_ENABLE 0x00008000 |
Definition at line 662 of file cx88-reg.h.
#define EN_I2SIN_STR2DAC 0x00004000 |
Definition at line 661 of file cx88-reg.h.
#define EN_I2SOUT_ENABLE 0x00002000 |
Definition at line 660 of file cx88-reg.h.
#define EN_NICAM_AUTO_FALLBACK 0x00000040 |
Definition at line 656 of file cx88-reg.h.
#define EN_NICAM_AUTO_MONO2 35 |
Definition at line 649 of file cx88-reg.h.
#define EN_NICAM_AUTO_STEREO 36 |
Definition at line 650 of file cx88-reg.h.
#define EN_NICAM_FORCE_MONO1 32 |
Definition at line 646 of file cx88-reg.h.
#define EN_NICAM_FORCE_MONO2 33 |
Definition at line 647 of file cx88-reg.h.
#define EN_NICAM_FORCE_STEREO 34 |
Definition at line 648 of file cx88-reg.h.
#define EN_NICAM_TRY_AGAIN_BIT 0x00000400 |
Definition at line 658 of file cx88-reg.h.
#define F0_BAR0_MM 0x2f0010 |
Definition at line 60 of file cx88-reg.h.
#define F0_CMD_STAT_MM 0x2f0004 |
Definition at line 46 of file cx88-reg.h.
#define F0_DEV_CNTRL1_MM 0x2f0040 |
Definition at line 53 of file cx88-reg.h.
#define F1_BAR0_MM 0x2f0110 |
Definition at line 61 of file cx88-reg.h.
#define F1_CMD_STAT_MM 0x2f0104 |
Definition at line 47 of file cx88-reg.h.
#define F1_DEV_CNTRL1_MM 0x2f0140 |
Definition at line 54 of file cx88-reg.h.
#define F2_BAR0_MM 0x2f0210 |
Definition at line 62 of file cx88-reg.h.
#define F2_CMD_STAT_MM 0x2f0204 |
Definition at line 48 of file cx88-reg.h.
#define F2_DEV_CNTRL1_MM 0x2f0240 |
Definition at line 55 of file cx88-reg.h.
#define F3_BAR0_MM 0x2f0310 |
Definition at line 63 of file cx88-reg.h.
#define F3_CMD_STAT_MM 0x2f0304 |
Definition at line 49 of file cx88-reg.h.
#define F3_DEV_CNTRL1_MM 0x2f0340 |
Definition at line 56 of file cx88-reg.h.
#define F4_BAR0_MM 0x2f0410 |
Definition at line 64 of file cx88-reg.h.
#define F4_CMD_STAT_MM 0x2f0404 |
Definition at line 50 of file cx88-reg.h.
#define F4_DEV_CNTRL1_MM 0x2f0440 |
Definition at line 57 of file cx88-reg.h.
#define FieldEven 0x1 |
Definition at line 768 of file cx88-reg.h.
#define FieldOdd 0x0 |
Definition at line 769 of file cx88-reg.h.
#define GP_COUNT_CONTROL_INC 0x1 |
Definition at line 801 of file cx88-reg.h.
#define GP_COUNT_CONTROL_NONE 0x0 |
Definition at line 800 of file cx88-reg.h.
#define GP_COUNT_CONTROL_RESERVED 0x2 |
Definition at line 802 of file cx88-reg.h.
#define GP_COUNT_CONTROL_RESET 0x3 |
Definition at line 803 of file cx88-reg.h.
#define HFilterAutoFormat 0x0 |
Definition at line 732 of file cx88-reg.h.
#define HFilterCIF 0x1 |
Definition at line 733 of file cx88-reg.h.
#define HFilterICON 0x3 |
Definition at line 735 of file cx88-reg.h.
#define HFilterQCIF 0x2 |
Definition at line 734 of file cx88-reg.h.
#define HLNotchFilter135NTSC 2 |
Definition at line 812 of file cx88-reg.h.
#define HLNotchFilter135PAL 3 |
Definition at line 813 of file cx88-reg.h.
#define HLNotchFilter4xFsc 0 |
Definition at line 810 of file cx88-reg.h.
#define HLNotchFilterSquare 1 |
Definition at line 811 of file cx88-reg.h.
#define Interlaced 0x1 |
Definition at line 765 of file cx88-reg.h.
#define MO_AFECFG_IO 0x35C04C |
Definition at line 502 of file cx88-reg.h.
#define MO_AGC_BACK_VBI 0x310200 |
Definition at line 206 of file cx88-reg.h.
#define MO_AGC_BURST 0x31010c |
Definition at line 171 of file cx88-reg.h.
#define MO_AGC_SYNC_TIP1 0x310208 |
Definition at line 207 of file cx88-reg.h.
#define MO_AUD_DMACNTRL 0x32C040 |
Definition at line 233 of file cx88-reg.h.
#define MO_AUD_INTMSK 0x200060 |
Definition at line 86 of file cx88-reg.h.
#define MO_AUD_INTMSTAT 0x200068 |
Definition at line 88 of file cx88-reg.h.
#define MO_AUD_INTSSTAT 0x20006C |
Definition at line 89 of file cx88-reg.h.
#define MO_AUD_INTSTAT 0x200064 |
Definition at line 87 of file cx88-reg.h.
#define MO_AUD_XFR_STAT 0x32C044 |
Definition at line 234 of file cx88-reg.h.
#define MO_AUDD_DMA 0x320000 |
Definition at line 224 of file cx88-reg.h.
#define MO_AUDD_GPCNT 0x32C020 |
Definition at line 227 of file cx88-reg.h.
#define MO_AUDD_GPCNTRL 0x32C030 |
Definition at line 230 of file cx88-reg.h.
#define MO_AUDD_LNGTH 0x32C048 |
Definition at line 235 of file cx88-reg.h.
#define MO_AUDR_DMA 0x320010 |
Definition at line 226 of file cx88-reg.h.
#define MO_AUDR_GPCNT 0x32C028 |
Definition at line 229 of file cx88-reg.h.
#define MO_AUDR_GPCNTRL 0x32C038 |
Definition at line 232 of file cx88-reg.h.
#define MO_AUDR_LNGTH 0x32C04C |
Definition at line 236 of file cx88-reg.h.
#define MO_AUDU_DMA 0x320008 |
Definition at line 225 of file cx88-reg.h.
#define MO_AUDU_GPCNT 0x32C024 |
Definition at line 228 of file cx88-reg.h.
#define MO_AUDU_GPCNTRL 0x32C034 |
Definition at line 231 of file cx88-reg.h.
#define MO_CAPTURE_CTRL 0x310180 |
Definition at line 199 of file cx88-reg.h.
#define MO_COLOR_CTRL 0x310184 |
Definition at line 200 of file cx88-reg.h.
#define MO_CONTR_BRIGHT 0x310110 |
Definition at line 172 of file cx88-reg.h.
#define MO_CRC 0x35C02C |
Definition at line 494 of file cx88-reg.h.
#define MO_CRC_D 0x35C030 |
Definition at line 495 of file cx88-reg.h.
#define MO_DDS_IO 0x35C050 |
Definition at line 503 of file cx88-reg.h.
#define MO_DDSCFG_IO 0x35C054 |
Definition at line 504 of file cx88-reg.h.
#define MO_DEV_CNTRL2 0x200034 |
Definition at line 78 of file cx88-reg.h.
#define MO_DEVICE_STATUS 0x310100 |
Definition at line 169 of file cx88-reg.h.
#define MO_DMA21_CNT1 0x300100 |
Definition at line 134 of file cx88-reg.h.
#define MO_DMA21_CNT2 0x300140 |
Definition at line 147 of file cx88-reg.h.
#define MO_DMA21_PTR1 0x300080 |
Definition at line 108 of file cx88-reg.h.
#define MO_DMA21_PTR2 0x3000C0 |
Definition at line 121 of file cx88-reg.h.
#define MO_DMA22_CNT1 0x300104 |
Definition at line 135 of file cx88-reg.h.
#define MO_DMA22_CNT2 0x300144 |
Definition at line 148 of file cx88-reg.h.
#define MO_DMA22_PTR1 0x300084 |
Definition at line 109 of file cx88-reg.h.
#define MO_DMA22_PTR2 0x3000C4 |
Definition at line 122 of file cx88-reg.h.
#define MO_DMA23_CNT1 0x300108 |
Definition at line 136 of file cx88-reg.h.
#define MO_DMA23_CNT2 0x300148 |
Definition at line 149 of file cx88-reg.h.
#define MO_DMA23_PTR1 0x300088 |
Definition at line 110 of file cx88-reg.h.
#define MO_DMA23_PTR2 0x3000C8 |
Definition at line 123 of file cx88-reg.h.
#define MO_DMA24_CNT1 0x30010C |
Definition at line 137 of file cx88-reg.h.
#define MO_DMA24_CNT2 0x30014C |
Definition at line 150 of file cx88-reg.h.
#define MO_DMA24_PTR1 0x30008C |
Definition at line 111 of file cx88-reg.h.
#define MO_DMA24_PTR2 0x3000CC |
Definition at line 124 of file cx88-reg.h.
#define MO_DMA25_CNT1 0x300110 |
Definition at line 138 of file cx88-reg.h.
#define MO_DMA25_CNT2 0x300150 |
Definition at line 151 of file cx88-reg.h.
#define MO_DMA25_PTR1 0x300090 |
Definition at line 112 of file cx88-reg.h.
#define MO_DMA25_PTR2 0x3000D0 |
Definition at line 125 of file cx88-reg.h.
#define MO_DMA26_CNT1 0x300114 |
Definition at line 139 of file cx88-reg.h.
#define MO_DMA26_CNT2 0x300154 |
Definition at line 152 of file cx88-reg.h.
#define MO_DMA26_PTR1 0x300094 |
Definition at line 113 of file cx88-reg.h.
#define MO_DMA26_PTR2 0x3000D4 |
Definition at line 126 of file cx88-reg.h.
#define MO_DMA27_CNT1 0x300118 |
Definition at line 140 of file cx88-reg.h.
#define MO_DMA27_CNT2 0x300158 |
Definition at line 153 of file cx88-reg.h.
#define MO_DMA27_PTR1 0x300098 |
Definition at line 114 of file cx88-reg.h.
#define MO_DMA27_PTR2 0x3000D8 |
Definition at line 127 of file cx88-reg.h.
#define MO_DMA28_CNT1 0x30011C |
Definition at line 141 of file cx88-reg.h.
#define MO_DMA28_CNT2 0x30015C |
Definition at line 154 of file cx88-reg.h.
#define MO_DMA28_PTR1 0x30009C |
Definition at line 115 of file cx88-reg.h.
#define MO_DMA28_PTR2 0x3000DC |
Definition at line 128 of file cx88-reg.h.
#define MO_DMA29_CNT1 0x300120 |
Definition at line 142 of file cx88-reg.h.
#define MO_DMA29_CNT2 0x300160 |
Definition at line 155 of file cx88-reg.h.
#define MO_DMA29_PTR1 0x3000A0 |
Definition at line 116 of file cx88-reg.h.
#define MO_DMA29_PTR2 0x3000E0 |
Definition at line 129 of file cx88-reg.h.
#define MO_DMA30_CNT1 0x300124 |
Definition at line 143 of file cx88-reg.h.
#define MO_DMA30_CNT2 0x300164 |
Definition at line 156 of file cx88-reg.h.
#define MO_DMA30_PTR1 0x3000A4 |
Definition at line 117 of file cx88-reg.h.
#define MO_DMA30_PTR2 0x3000E4 |
Definition at line 130 of file cx88-reg.h.
#define MO_DMA31_CNT1 0x300128 |
Definition at line 144 of file cx88-reg.h.
#define MO_DMA31_CNT2 0x300168 |
Definition at line 157 of file cx88-reg.h.
#define MO_DMA31_PTR1 0x3000A8 |
Definition at line 118 of file cx88-reg.h.
#define MO_DMA31_PTR2 0x3000E8 |
Definition at line 131 of file cx88-reg.h.
#define MO_DMA32_CNT1 0x30012C |
Definition at line 145 of file cx88-reg.h.
#define MO_DMA32_CNT2 0x30016C |
Definition at line 158 of file cx88-reg.h.
#define MO_DMA32_PTR1 0x3000AC |
Definition at line 119 of file cx88-reg.h.
#define MO_DMA32_PTR2 0x3000EC |
Definition at line 132 of file cx88-reg.h.
#define MO_DMA7_PTR1 0x300018 |
Definition at line 104 of file cx88-reg.h.
#define MO_DMA8_PTR1 0x30001C |
Definition at line 105 of file cx88-reg.h.
#define MO_FIELD_COUNT 0x310190 |
Definition at line 202 of file cx88-reg.h.
#define MO_FILTER_EVEN 0x31015c |
Definition at line 187 of file cx88-reg.h.
#define MO_FILTER_ODD 0x310160 |
Definition at line 189 of file cx88-reg.h.
#define MO_GP0_IO 0x350010 |
Definition at line 483 of file cx88-reg.h.
#define MO_GP1_IO 0x350014 |
Definition at line 484 of file cx88-reg.h.
#define MO_GP2_IO 0x350018 |
Definition at line 485 of file cx88-reg.h.
#define MO_GP3_IO 0x35001C |
Definition at line 486 of file cx88-reg.h.
#define MO_GP_ISM 0x350028 |
Definition at line 489 of file cx88-reg.h.
#define MO_GPHST_DMACNTRL 0x38C040 |
Definition at line 544 of file cx88-reg.h.
#define MO_GPHST_HDSHK 0x380060 |
Definition at line 536 of file cx88-reg.h.
#define MO_GPHST_INTMSK 0x200090 |
Definition at line 98 of file cx88-reg.h.
#define MO_GPHST_INTMSTAT 0x200098 |
Definition at line 100 of file cx88-reg.h.
#define MO_GPHST_INTSSTAT 0x20009C |
Definition at line 101 of file cx88-reg.h.
#define MO_GPHST_INTSTAT 0x200094 |
Definition at line 99 of file cx88-reg.h.
#define MO_GPHST_MODE 0x380068 |
Definition at line 538 of file cx88-reg.h.
#define MO_GPHST_MUX16 0x380064 |
Definition at line 537 of file cx88-reg.h.
#define MO_GPHST_SOFT_RST 0x38C06C |
Definition at line 546 of file cx88-reg.h.
#define MO_GPHST_WDTH 0x38005C |
Definition at line 535 of file cx88-reg.h.
#define MO_GPHST_WSC 0x380054 |
Definition at line 533 of file cx88-reg.h.
#define MO_GPHST_XFR 0x380058 |
Definition at line 534 of file cx88-reg.h.
#define MO_GPHST_XFR_STAT 0x38C044 |
Definition at line 545 of file cx88-reg.h.
#define MO_GPHSTD_CNTRL 0x38004C |
Definition at line 531 of file cx88-reg.h.
#define MO_GPHSTD_DMA 0x350000 |
Definition at line 528 of file cx88-reg.h.
#define MO_GPHSTD_GPCNT 0x35C020 |
Definition at line 540 of file cx88-reg.h.
#define MO_GPHSTD_GPCNTRL 0x38C030 |
Definition at line 542 of file cx88-reg.h.
#define MO_GPHSTD_LNGTH 0x380050 |
Definition at line 532 of file cx88-reg.h.
#define MO_GPHSTU_CNTRL 0x380048 |
Definition at line 530 of file cx88-reg.h.
#define MO_GPHSTU_DMA 0x350008 |
Definition at line 529 of file cx88-reg.h.
#define MO_GPHSTU_GPCNT 0x35C024 |
Definition at line 541 of file cx88-reg.h.
#define MO_GPHSTU_GPCNTRL 0x38C034 |
Definition at line 543 of file cx88-reg.h.
#define MO_GPIO 0x350020 |
Definition at line 487 of file cx88-reg.h.
#define MO_GPOE 0x350024 |
Definition at line 488 of file cx88-reg.h.
#define MO_HACTIVE_EVEN 0x31013c |
Definition at line 180 of file cx88-reg.h.
#define MO_HACTIVE_ODD 0x310140 |
Definition at line 181 of file cx88-reg.h.
#define MO_HDELAY_EVEN 0x310124 |
Definition at line 176 of file cx88-reg.h.
#define MO_HDELAY_ODD 0x310128 |
Definition at line 177 of file cx88-reg.h.
#define MO_HSCALE_EVEN 0x31014c |
Definition at line 184 of file cx88-reg.h.
#define MO_HSCALE_ODD 0x310150 |
Definition at line 185 of file cx88-reg.h.
#define MO_HTOTAL 0x310120 |
Definition at line 175 of file cx88-reg.h.
#define MO_HUE 0x310118 |
Definition at line 174 of file cx88-reg.h.
#define MO_I2C 0x368000 |
Definition at line 516 of file cx88-reg.h.
#define MO_I2C_DIV (0xf<<4) |
Definition at line 517 of file cx88-reg.h.
#define MO_I2C_SCL (1<<1) |
Definition at line 520 of file cx88-reg.h.
#define MO_I2C_SDA (1<<0) |
Definition at line 521 of file cx88-reg.h.
#define MO_I2C_SYNC (1<<3) |
Definition at line 518 of file cx88-reg.h.
#define MO_I2C_W3B (1<<2) |
Definition at line 519 of file cx88-reg.h.
#define MO_INPUT_FORMAT 0x310104 |
Definition at line 170 of file cx88-reg.h.
#define MO_INT1_MSK 0x35C060 |
Definition at line 508 of file cx88-reg.h.
#define MO_INT1_MSTAT 0x35C068 |
Definition at line 510 of file cx88-reg.h.
#define MO_INT1_STAT 0x35C064 |
Definition at line 509 of file cx88-reg.h.
#define MO_LD_SSID 0x200030 |
Definition at line 77 of file cx88-reg.h.
#define MO_M2M_CNT 0x35C024 |
Definition at line 492 of file cx88-reg.h.
#define MO_M2M_DMA 0x350000 |
Definition at line 482 of file cx88-reg.h.
#define MO_M2M_XSUM 0x35C028 |
Definition at line 493 of file cx88-reg.h.
#define MO_OUTPUT_FORMAT 0x310164 |
Definition at line 190 of file cx88-reg.h.
#define MO_PCI_INTMSK 0x200040 |
Definition at line 79 of file cx88-reg.h.
#define MO_PCI_INTMSTAT 0x200048 |
Definition at line 81 of file cx88-reg.h.
#define MO_PCI_INTSTAT 0x200044 |
Definition at line 80 of file cx88-reg.h.
#define MO_PDMA_DCNTRL 0x20001C |
Definition at line 76 of file cx88-reg.h.
#define MO_PDMA_DIADRS 0x200018 |
Definition at line 75 of file cx88-reg.h.
#define MO_PDMA_DTADRS 0x200014 |
Definition at line 74 of file cx88-reg.h.
#define MO_PDMA_DTHRSH 0x200010 |
Definition at line 73 of file cx88-reg.h.
#define MO_PDMA_SCNTRL 0x20000C |
Definition at line 72 of file cx88-reg.h.
#define MO_PDMA_SIADRS 0x200008 |
Definition at line 71 of file cx88-reg.h.
#define MO_PDMA_STADRS 0x200004 |
Definition at line 70 of file cx88-reg.h.
#define MO_PDMA_STHRSH 0x200000 |
Definition at line 69 of file cx88-reg.h.
#define MO_PINMUX_IO 0x35C044 |
Definition at line 500 of file cx88-reg.h.
#define MO_PLL_ADJ_CTRL 0x31016c |
Definition at line 193 of file cx88-reg.h.
#define MO_PLL_B 0x35C008 |
Definition at line 491 of file cx88-reg.h.
#define MO_PLL_REG 0x310168 |
Definition at line 192 of file cx88-reg.h.
#define MO_SAMPLE_IO 0x35C058 |
Definition at line 505 of file cx88-reg.h.
#define MO_SCONV_FIFO 0x310174 |
Definition at line 195 of file cx88-reg.h.
#define MO_SCONV_REG 0x310170 |
Definition at line 194 of file cx88-reg.h.
#define MO_SRST_IO 0x35C05C |
Definition at line 506 of file cx88-reg.h.
#define MO_SUB_STEP 0x310178 |
Definition at line 196 of file cx88-reg.h.
#define MO_SUB_STEP_DR 0x31017c |
Definition at line 197 of file cx88-reg.h.
#define MO_TM_CNT_LDW 0x35C034 |
Definition at line 496 of file cx88-reg.h.
#define MO_TM_CNT_UW 0x35C038 |
Definition at line 497 of file cx88-reg.h.
#define MO_TM_LMT_LDW 0x35C03C |
Definition at line 498 of file cx88-reg.h.
#define MO_TM_LMT_UW 0x35C040 |
Definition at line 499 of file cx88-reg.h.
#define MO_TS_DMA 0x330000 |
Definition at line 444 of file cx88-reg.h.
#define MO_TS_DMACNTRL 0x33C040 |
Definition at line 447 of file cx88-reg.h.
#define MO_TS_GPCNT 0x33C020 |
Definition at line 445 of file cx88-reg.h.
#define MO_TS_GPCNTRL 0x33C030 |
Definition at line 446 of file cx88-reg.h.
#define MO_TS_INTMSK 0x200070 |
Definition at line 90 of file cx88-reg.h.
#define MO_TS_INTMSTAT 0x200078 |
Definition at line 92 of file cx88-reg.h.
#define MO_TS_INTSSTAT 0x20007C |
Definition at line 93 of file cx88-reg.h.
#define MO_TS_INTSTAT 0x200074 |
Definition at line 91 of file cx88-reg.h.
#define MO_TS_LNGTH 0x33C048 |
Definition at line 449 of file cx88-reg.h.
#define MO_TS_XFR_STAT 0x33C044 |
Definition at line 448 of file cx88-reg.h.
#define MO_TSTSEL_IO 0x35C048 |
Definition at line 501 of file cx88-reg.h.
#define MO_UV_SATURATION 0x310114 |
Definition at line 173 of file cx88-reg.h.
#define MO_VACTIVE_EVEN 0x310144 |
Definition at line 182 of file cx88-reg.h.
#define MO_VACTIVE_ODD 0x310148 |
Definition at line 183 of file cx88-reg.h.
#define MO_VBI_DMA 0x310018 |
Definition at line 167 of file cx88-reg.h.
#define MO_VBI_GPCNT 0x31C02C |
Definition at line 212 of file cx88-reg.h.
#define MO_VBI_GPCNTRL 0x31C03C |
Definition at line 216 of file cx88-reg.h.
#define MO_VBI_PACKET 0x310188 |
Definition at line 201 of file cx88-reg.h.
#define MO_VBOS_CONTROL 0x3101a8 |
Definition at line 204 of file cx88-reg.h.
#define MO_VDELAY_EVEN 0x310130 |
Definition at line 179 of file cx88-reg.h.
#define MO_VDELAY_ODD 0x31012c |
Definition at line 178 of file cx88-reg.h.
#define MO_VID_DMACNTRL 0x31C040 |
Definition at line 217 of file cx88-reg.h.
#define MO_VID_INTMSK 0x200050 |
Definition at line 82 of file cx88-reg.h.
#define MO_VID_INTMSTAT 0x200058 |
Definition at line 84 of file cx88-reg.h.
#define MO_VID_INTSSTAT 0x20005C |
Definition at line 85 of file cx88-reg.h.
#define MO_VID_INTSTAT 0x200054 |
Definition at line 83 of file cx88-reg.h.
#define MO_VID_XFR_STAT 0x31C044 |
Definition at line 218 of file cx88-reg.h.
#define MO_VIDU_DMA 0x310008 |
Definition at line 165 of file cx88-reg.h.
#define MO_VIDU_GPCNT 0x31C024 |
Definition at line 210 of file cx88-reg.h.
#define MO_VIDU_GPCNTRL 0x31C034 |
Definition at line 214 of file cx88-reg.h.
#define MO_VIDV_DMA 0x310010 |
Definition at line 166 of file cx88-reg.h.
#define MO_VIDV_GPCNT 0x31C028 |
Definition at line 211 of file cx88-reg.h.
#define MO_VIDV_GPCNTRL 0x31C038 |
Definition at line 215 of file cx88-reg.h.
#define MO_VIDY_DMA 0x310000 |
Definition at line 164 of file cx88-reg.h.
#define MO_VIDY_GPCNT 0x31C020 |
Definition at line 209 of file cx88-reg.h.
#define MO_VIDY_GPCNTRL 0x31C030 |
Definition at line 213 of file cx88-reg.h.
#define MO_VIP_BRSTLN 0x340058 |
Definition at line 474 of file cx88-reg.h.
#define MO_VIP_CFG 0x340048 |
Definition at line 470 of file cx88-reg.h.
#define MO_VIP_CONFIG 0x310194 |
Definition at line 203 of file cx88-reg.h.
#define MO_VIP_DMACNTRL 0x34C040 |
Definition at line 468 of file cx88-reg.h.
#define MO_VIP_INTCNTRL 0x34C05C |
Definition at line 475 of file cx88-reg.h.
#define MO_VIP_INTMSK 0x200080 |
Definition at line 94 of file cx88-reg.h.
#define MO_VIP_INTMSTAT 0x200088 |
Definition at line 96 of file cx88-reg.h.
#define MO_VIP_INTSSTAT 0x20008C |
Definition at line 97 of file cx88-reg.h.
#define MO_VIP_INTSTAT 0x200084 |
Definition at line 95 of file cx88-reg.h.
#define MO_VIP_XFR_STAT 0x34C044 |
Definition at line 469 of file cx88-reg.h.
#define MO_VIP_XFTERM 0x340060 |
Definition at line 476 of file cx88-reg.h.
#define MO_VIPD_CNTRL 0x340050 |
Definition at line 472 of file cx88-reg.h.
#define MO_VIPD_DMA 0x340000 |
Definition at line 462 of file cx88-reg.h.
#define MO_VIPD_GPCNT 0x34C020 |
Definition at line 464 of file cx88-reg.h.
#define MO_VIPD_GPCNTRL 0x34C030 |
Definition at line 466 of file cx88-reg.h.
#define MO_VIPD_LNGTH 0x340054 |
Definition at line 473 of file cx88-reg.h.
#define MO_VIPU_CNTRL 0x34004C |
Definition at line 471 of file cx88-reg.h.
#define MO_VIPU_DMA 0x340008 |
Definition at line 463 of file cx88-reg.h.
#define MO_VIPU_GPCNT 0x34C024 |
Definition at line 465 of file cx88-reg.h.
#define MO_VIPU_GPCNTRL 0x34C034 |
Definition at line 467 of file cx88-reg.h.
#define MO_VSCALE_EVEN 0x310154 |
Definition at line 186 of file cx88-reg.h.
#define MO_VSCALE_ODD 0x310158 |
Definition at line 188 of file cx88-reg.h.
#define NominalContrast 0xD8 |
Definition at line 730 of file cx88-reg.h.
#define NominalUNTSC 0xFE |
Definition at line 727 of file cx88-reg.h.
#define NominalUSECAM 0x87 |
Definition at line 725 of file cx88-reg.h.
#define NominalVNTSC 0xB4 |
Definition at line 728 of file cx88-reg.h.
#define NominalVSECAM 0x85 |
Definition at line 726 of file cx88-reg.h.
#define NonInterlaced 0x0 |
Definition at line 766 of file cx88-reg.h.
#define NTSC_8x_SUB_CARRIER 28.63636E6 |
Definition at line 815 of file cx88-reg.h.
#define PAL_8x_SUB_CARRIER 35.46895E6 |
Definition at line 816 of file cx88-reg.h.
#define PCI_DEVICE_ID_CX2300_VID 0x8800 |
Definition at line 35 of file cx88-reg.h.
#define PCI_INT_AUDINT (1 << 1) |
Definition at line 588 of file cx88-reg.h.
#define PCI_INT_BRDG_BERRINT (1 << 12) |
Definition at line 597 of file cx88-reg.h.
#define PCI_INT_DST_DMA_BERRINT (1 << 14) |
Definition at line 599 of file cx88-reg.h.
#define PCI_INT_DSTDMAINT (1 << 7) |
Definition at line 594 of file cx88-reg.h.
#define PCI_INT_GPIO_INT0 (1 << 19) |
Definition at line 604 of file cx88-reg.h.
#define PCI_INT_GPIO_INT1 (1 << 20) |
Definition at line 605 of file cx88-reg.h.
#define PCI_INT_HSTINT (1 << 4) |
Definition at line 591 of file cx88-reg.h.
#define PCI_INT_I2CDONE (1 << 16) |
Definition at line 601 of file cx88-reg.h.
#define PCI_INT_I2CRACK (1 << 17) |
Definition at line 602 of file cx88-reg.h.
#define PCI_INT_IPB_DMA_BERRINT (1 << 15) |
Definition at line 600 of file cx88-reg.h.
#define PCI_INT_IR_SMPINT (1 << 18) |
Definition at line 603 of file cx88-reg.h.
#define PCI_INT_RISC_RD_BERRINT (1 << 10) |
Definition at line 595 of file cx88-reg.h.
#define PCI_INT_RISC_WR_BERRINT (1 << 11) |
Definition at line 596 of file cx88-reg.h.
#define PCI_INT_SRC_DMA_BERRINT (1 << 13) |
Definition at line 598 of file cx88-reg.h.
#define PCI_INT_SRCDMAINT (1 << 6) |
Definition at line 593 of file cx88-reg.h.
#define PCI_INT_TM1INT (1 << 5) |
Definition at line 592 of file cx88-reg.h.
#define PCI_INT_TSINT (1 << 2) |
Definition at line 589 of file cx88-reg.h.
#define PCI_INT_VIDINT (1 << 0) |
Definition at line 587 of file cx88-reg.h.
#define PCI_INT_VIPINT (1 << 3) |
Definition at line 590 of file cx88-reg.h.
#define PCI_VENDOR_ID_CONEXANT 0x14F1 |
Definition at line 32 of file cx88-reg.h.
#define PLL_PRESCALE_BY_2 2 |
Definition at line 805 of file cx88-reg.h.
#define PLL_PRESCALE_BY_3 3 |
Definition at line 806 of file cx88-reg.h.
#define PLL_PRESCALE_BY_4 4 |
Definition at line 807 of file cx88-reg.h.
#define PLL_PRESCALE_BY_5 5 |
Definition at line 808 of file cx88-reg.h.
#define RISC_CNT_INC 0x00010000 |
Definition at line 576 of file cx88-reg.h.
#define RISC_CNT_NONE 0x00000000 |
Definition at line 575 of file cx88-reg.h.
#define RISC_CNT_RESET 0x00030000 |
Definition at line 578 of file cx88-reg.h.
#define RISC_CNT_RSVR 0x00020000 |
Definition at line 577 of file cx88-reg.h.
#define RISC_EOL 0x04000000 |
Definition at line 570 of file cx88-reg.h.
#define RISC_IMM 0x00000001 |
Definition at line 567 of file cx88-reg.h.
#define RISC_IRQ1 0x01000000 |
Definition at line 573 of file cx88-reg.h.
#define RISC_IRQ2 0x02000000 |
Definition at line 572 of file cx88-reg.h.
#define RISC_JMP_SRP 0x01 |
Definition at line 579 of file cx88-reg.h.
#define RISC_JUMP 0x70000000 |
Definition at line 562 of file cx88-reg.h.
#define RISC_READ 0x90000000 |
Definition at line 560 of file cx88-reg.h.
#define RISC_READC 0xA0000000 |
Definition at line 561 of file cx88-reg.h.
#define RISC_RESYNC 0x80008000 |
Definition at line 555 of file cx88-reg.h.
#define RISC_RESYNC_EVEN 0x80008200 |
Definition at line 557 of file cx88-reg.h.
#define RISC_RESYNC_ODD 0x80008000 |
Definition at line 556 of file cx88-reg.h.
#define RISC_SKIP 0x20000000 |
Definition at line 563 of file cx88-reg.h.
#define RISC_SOL 0x08000000 |
Definition at line 569 of file cx88-reg.h.
#define RISC_SYNC 0x80000000 |
Definition at line 552 of file cx88-reg.h.
#define RISC_SYNC_EVEN 0x80000200 |
Definition at line 554 of file cx88-reg.h.
#define RISC_SYNC_ODD 0x80000000 |
Definition at line 553 of file cx88-reg.h.
#define RISC_WRITE 0x10000000 |
Definition at line 558 of file cx88-reg.h.
#define RISC_WRITEC 0x50000000 |
Definition at line 559 of file cx88-reg.h.
#define RISC_WRITECM 0xC0000000 |
Definition at line 565 of file cx88-reg.h.
#define RISC_WRITECR 0xD0000000 |
Definition at line 566 of file cx88-reg.h.
#define RISC_WRITERM 0xB0000000 |
Definition at line 564 of file cx88-reg.h.
#define SEL_A2 0x04 |
Definition at line 609 of file cx88-reg.h.
#define SEL_BTSC 0x01 |
Definition at line 607 of file cx88-reg.h.
#define SEL_EIAJ 0x02 |
Definition at line 608 of file cx88-reg.h.
#define SEL_FMRADIO 0x20 |
Definition at line 612 of file cx88-reg.h.
#define SEL_NICAM 0x10 |
Definition at line 611 of file cx88-reg.h.
#define SEL_SAP 0x08 |
Definition at line 610 of file cx88-reg.h.
#define TGEnableMode 0x1 |
Definition at line 772 of file cx88-reg.h.
#define TGReadWriteMode 0x0 |
Definition at line 771 of file cx88-reg.h.
#define TS_BD_PKT_STAT 0x33C054 |
Definition at line 453 of file cx88-reg.h.
#define TS_FIFO_OVFL_STAT 0x33C05C |
Definition at line 455 of file cx88-reg.h.
#define TS_GEN_CNTRL 0x33C050 |
Definition at line 452 of file cx88-reg.h.
#define TS_HW_SOP_CNTRL 0x33C04C |
Definition at line 451 of file cx88-reg.h.
#define TS_SOP_STAT 0x33C058 |
Definition at line 454 of file cx88-reg.h.
#define TS_VALERR_CNTRL 0x33C060 |
Definition at line 456 of file cx88-reg.h.
#define VFilter2TapInterpolate 0 |
Definition at line 737 of file cx88-reg.h.
#define VFilter2TapNoInterpolate 4 |
Definition at line 741 of file cx88-reg.h.
#define VFilter3TapInterpolate 1 |
Definition at line 738 of file cx88-reg.h.
#define VFilter3TapNoInterpolate 5 |
Definition at line 742 of file cx88-reg.h.
#define VFilter4TapInterpolate 2 |
Definition at line 739 of file cx88-reg.h.
#define VFilter4TapNoInterpolate 6 |
Definition at line 743 of file cx88-reg.h.
#define VFilter5TapInterpolate 3 |
Definition at line 740 of file cx88-reg.h.
#define VFilter5TapNoInterpolate 7 |
Definition at line 744 of file cx88-reg.h.
#define VID_CAPTURE_CONTROL 0x310180 |
Definition at line 671 of file cx88-reg.h.
#define VideoFormatAuto 0x0 |
Definition at line 691 of file cx88-reg.h.
#define VideoFormatAuto27MHz 0x10 |
Definition at line 708 of file cx88-reg.h.
#define VideoFormatNTSC 0x1 |
Definition at line 692 of file cx88-reg.h.
#define VideoFormatNTSC27MHz 0x11 |
Definition at line 709 of file cx88-reg.h.
#define VideoFormatNTSC443 0x3 |
Definition at line 694 of file cx88-reg.h.
#define VideoFormatNTSC44327MHz 0x13 |
Definition at line 711 of file cx88-reg.h.
#define VideoFormatNTSCJapan 0x2 |
Definition at line 693 of file cx88-reg.h.
#define VideoFormatNTSCJapan27MHz 0x12 |
Definition at line 710 of file cx88-reg.h.
#define VideoFormatPAL 0x4 |
Definition at line 695 of file cx88-reg.h.
#define VideoFormatPAL27MHz 0x14 |
Definition at line 712 of file cx88-reg.h.
#define VideoFormatPAL60 0x8 |
Definition at line 705 of file cx88-reg.h.
#define VideoFormatPAL6027MHz 0x18 |
Definition at line 722 of file cx88-reg.h.
#define VideoFormatPALB 0x4 |
Definition at line 696 of file cx88-reg.h.
#define VideoFormatPALB27MHz 0x14 |
Definition at line 713 of file cx88-reg.h.
#define VideoFormatPALBDGHI 0x4 |
Definition at line 701 of file cx88-reg.h.
#define VideoFormatPALBDGHI27MHz 0x14 |
Definition at line 718 of file cx88-reg.h.
#define VideoFormatPALD 0x4 |
Definition at line 697 of file cx88-reg.h.
#define VideoFormatPALD27MHz 0x14 |
Definition at line 714 of file cx88-reg.h.
#define VideoFormatPALG 0x4 |
Definition at line 698 of file cx88-reg.h.
#define VideoFormatPALG27MHz 0x14 |
Definition at line 715 of file cx88-reg.h.
#define VideoFormatPALH 0x4 |
Definition at line 699 of file cx88-reg.h.
#define VideoFormatPALH27MHz 0x14 |
Definition at line 716 of file cx88-reg.h.
#define VideoFormatPALI 0x4 |
Definition at line 700 of file cx88-reg.h.
#define VideoFormatPALI27MHz 0x14 |
Definition at line 717 of file cx88-reg.h.
#define VideoFormatPALM 0x5 |
Definition at line 702 of file cx88-reg.h.
#define VideoFormatPALM27MHz 0x15 |
Definition at line 719 of file cx88-reg.h.
#define VideoFormatPALN 0x6 |
Definition at line 703 of file cx88-reg.h.
#define VideoFormatPALN27MHz 0x16 |
Definition at line 720 of file cx88-reg.h.
#define VideoFormatPALNC 0x7 |
Definition at line 704 of file cx88-reg.h.
#define VideoFormatPALNC27MHz 0x17 |
Definition at line 721 of file cx88-reg.h.
#define VideoFormatSECAM 0x9 |
Definition at line 706 of file cx88-reg.h.
#define VideoFormatSECAM27MHz 0x19 |
Definition at line 723 of file cx88-reg.h.
#define VideoInputComposite 0x1 |
Definition at line 683 of file cx88-reg.h.
#define VideoInputMux0 0x0 |
Definition at line 678 of file cx88-reg.h.
#define VideoInputMux1 0x1 |
Definition at line 679 of file cx88-reg.h.
#define VideoInputMux2 0x2 |
Definition at line 680 of file cx88-reg.h.
#define VideoInputMux3 0x3 |
Definition at line 681 of file cx88-reg.h.
#define VideoInputOther 0x3 |
Definition at line 685 of file cx88-reg.h.
#define VideoInputSVideo 0x2 |
Definition at line 684 of file cx88-reg.h.
#define VideoInputTuner 0x0 |
Definition at line 682 of file cx88-reg.h.
#define Xtal0 0x1 |
Definition at line 687 of file cx88-reg.h.
#define Xtal1 0x2 |
Definition at line 688 of file cx88-reg.h.
#define XtalAuto 0x3 |
Definition at line 689 of file cx88-reg.h.
enum VIDEOSOURCETYPE |
SOURCE_TUNER | |
SOURCE_COMPOSITE | |
SOURCE_SVIDEO | |
SOURCE_OTHER1 | |
SOURCE_OTHER2 | |
SOURCE_COMPVIASVIDEO | |
SOURCE_CCIR656 |
Definition at line 825 of file cx88-reg.h.