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db8500-regs.h File Reference

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Macros

#define U8500_ESRAM_BASE   0x40000000
 
#define U8500_ESRAM_BANK_SIZE   0x00020000
 
#define U8500_ESRAM_BANK0   U8500_ESRAM_BASE
 
#define U8500_ESRAM_BANK1   (U8500_ESRAM_BASE + U8500_ESRAM_BANK_SIZE)
 
#define U8500_ESRAM_BANK2   (U8500_ESRAM_BANK1 + U8500_ESRAM_BANK_SIZE)
 
#define U8500_ESRAM_BANK3   (U8500_ESRAM_BANK2 + U8500_ESRAM_BANK_SIZE)
 
#define U8500_ESRAM_BANK4   (U8500_ESRAM_BANK3 + U8500_ESRAM_BANK_SIZE)
 
#define U8500_ESRAM_DMA_LCPA_OFFSET   0x10000
 
#define U8500_DMA_LCPA_BASE   (U8500_ESRAM_BANK0 + U8500_ESRAM_DMA_LCPA_OFFSET)
 
#define U8500_DMA_LCLA_BASE   U8500_ESRAM_BANK4
 
#define U8500_PER3_BASE   0x80000000
 
#define U8500_STM_BASE   0x80100000
 
#define U8500_STM_REG_BASE   (U8500_STM_BASE + 0xF000)
 
#define U8500_PER2_BASE   0x80110000
 
#define U8500_PER1_BASE   0x80120000
 
#define U8500_B2R2_BASE   0x80130000
 
#define U8500_HSEM_BASE   0x80140000
 
#define U8500_PER4_BASE   0x80150000
 
#define U8500_TPIU_BASE   0x80190000
 
#define U8500_ICN_BASE   0x81000000
 
#define U8500_BOOT_ROM_BASE   0x90000000
 
#define U8500_ASIC_ID_BASE   0x9001D000
 
#define U9540_BOOT_ROM_BASE   0xFFFE0000
 
#define U9540_ASIC_ID_BASE   0xFFFFD000
 
#define U8500_PER6_BASE   0xa03c0000
 
#define U8500_PER7_BASE   0xa03d0000
 
#define U8500_PER5_BASE   0xa03e0000
 
#define U8500_SVA_BASE   0xa0100000
 
#define U8500_SIA_BASE   0xa0200000
 
#define U8500_SGA_BASE   0xa0300000
 
#define U8500_MCDE_BASE   0xa0350000
 
#define U8500_DMA_BASE   0x801C0000 /* v1 */
 
#define U8500_SBAG_BASE   0xa0390000
 
#define U8500_SCU_BASE   0xa0410000
 
#define U8500_GIC_CPU_BASE   0xa0410100
 
#define U8500_TWD_BASE   0xa0410600
 
#define U8500_GIC_DIST_BASE   0xa0411000
 
#define U8500_L2CC_BASE   0xa0412000
 
#define U8500_MODEM_I2C   0xb7e02000
 
#define U8500_GPIO0_BASE   (U8500_PER1_BASE + 0xE000)
 
#define U8500_GPIO1_BASE   (U8500_PER3_BASE + 0xE000)
 
#define U8500_GPIO2_BASE   (U8500_PER2_BASE + 0xE000)
 
#define U8500_GPIO3_BASE   (U8500_PER5_BASE + 0x1E000)
 
#define U8500_UART0_BASE   (U8500_PER1_BASE + 0x0000)
 
#define U8500_UART1_BASE   (U8500_PER1_BASE + 0x1000)
 
#define U8500_RNG_BASE   (U8500_PER6_BASE + 0x0000)
 
#define U8500_HASH0_BASE   (U8500_PER6_BASE + 0x1000)
 
#define U8500_HASH1_BASE   (U8500_PER6_BASE + 0x2000)
 
#define U8500_PKA_BASE   (U8500_PER6_BASE + 0x4000)
 
#define U8500_PKAM_BASE   (U8500_PER6_BASE + 0x5100)
 
#define U8500_MTU0_BASE   (U8500_PER6_BASE + 0x6000) /* v1 */
 
#define U8500_MTU1_BASE   (U8500_PER6_BASE + 0x7000) /* v1 */
 
#define U8500_CR_BASE   (U8500_PER6_BASE + 0x8000) /* v1 */
 
#define U8500_CRYP0_BASE   (U8500_PER6_BASE + 0xa000)
 
#define U8500_CRYP1_BASE   (U8500_PER6_BASE + 0xb000)
 
#define U8500_CLKRST6_BASE   (U8500_PER6_BASE + 0xf000)
 
#define U8500_USBOTG_BASE   (U8500_PER5_BASE + 0x00000)
 
#define U8500_CLKRST5_BASE   (U8500_PER5_BASE + 0x1f000)
 
#define U8500_BACKUPRAM0_BASE   (U8500_PER4_BASE + 0x00000)
 
#define U8500_BACKUPRAM1_BASE   (U8500_PER4_BASE + 0x01000)
 
#define U8500_RTT0_BASE   (U8500_PER4_BASE + 0x02000)
 
#define U8500_RTT1_BASE   (U8500_PER4_BASE + 0x03000)
 
#define U8500_RTC_BASE   (U8500_PER4_BASE + 0x04000)
 
#define U8500_SCR_BASE   (U8500_PER4_BASE + 0x05000)
 
#define U8500_DMC_BASE   (U8500_PER4_BASE + 0x06000)
 
#define U8500_PRCMU_BASE   (U8500_PER4_BASE + 0x07000)
 
#define U9540_DMC1_BASE   (U8500_PER4_BASE + 0x0A000)
 
#define U8500_PRCMU_TCDM_BASE   (U8500_PER4_BASE + 0x68000)
 
#define U9540_PRCMU_TCDM_BASE   (U8500_PER4_BASE + 0x6A000)
 
#define U8500_PRCMU_TCPM_BASE   (U8500_PER4_BASE + 0x60000)
 
#define U8500_PRCMU_TIMER_3_BASE   (U8500_PER4_BASE + 0x07338)
 
#define U8500_PRCMU_TIMER_4_BASE   (U8500_PER4_BASE + 0x07450)
 
#define U8500_FSMC_BASE   (U8500_PER3_BASE + 0x0000)
 
#define U8500_SSP0_BASE   (U8500_PER3_BASE + 0x2000)
 
#define U8500_SSP1_BASE   (U8500_PER3_BASE + 0x3000)
 
#define U8500_I2C0_BASE   (U8500_PER3_BASE + 0x4000)
 
#define U8500_SDI2_BASE   (U8500_PER3_BASE + 0x5000)
 
#define U8500_SKE_BASE   (U8500_PER3_BASE + 0x6000)
 
#define U8500_UART2_BASE   (U8500_PER3_BASE + 0x7000)
 
#define U8500_SDI5_BASE   (U8500_PER3_BASE + 0x8000)
 
#define U8500_CLKRST3_BASE   (U8500_PER3_BASE + 0xf000)
 
#define U8500_I2C3_BASE   (U8500_PER2_BASE + 0x0000)
 
#define U8500_SPI2_BASE   (U8500_PER2_BASE + 0x1000)
 
#define U8500_SPI1_BASE   (U8500_PER2_BASE + 0x2000)
 
#define U8500_PWL_BASE   (U8500_PER2_BASE + 0x3000)
 
#define U8500_SDI4_BASE   (U8500_PER2_BASE + 0x4000)
 
#define U8500_MSP2_BASE   (U8500_PER2_BASE + 0x7000)
 
#define U8500_SDI1_BASE   (U8500_PER2_BASE + 0x8000)
 
#define U8500_SDI3_BASE   (U8500_PER2_BASE + 0x9000)
 
#define U8500_SPI0_BASE   (U8500_PER2_BASE + 0xa000)
 
#define U8500_HSIR_BASE   (U8500_PER2_BASE + 0xb000)
 
#define U8500_HSIT_BASE   (U8500_PER2_BASE + 0xc000)
 
#define U8500_CLKRST2_BASE   (U8500_PER2_BASE + 0xf000)
 
#define U8500_I2C1_BASE   (U8500_PER1_BASE + 0x2000)
 
#define U8500_MSP0_BASE   (U8500_PER1_BASE + 0x3000)
 
#define U8500_MSP1_BASE   (U8500_PER1_BASE + 0x4000)
 
#define U8500_MSP3_BASE   (U8500_PER1_BASE + 0x5000)
 
#define U8500_SDI0_BASE   (U8500_PER1_BASE + 0x6000)
 
#define U8500_I2C2_BASE   (U8500_PER1_BASE + 0x8000)
 
#define U8500_SPI3_BASE   (U8500_PER1_BASE + 0x9000)
 
#define U8500_I2C4_BASE   (U8500_PER1_BASE + 0xa000)
 
#define U8500_SLIM0_BASE   (U8500_PER1_BASE + 0xb000)
 
#define U8500_CLKRST1_BASE   (U8500_PER1_BASE + 0xf000)
 
#define U8500_SHRM_GOP_INTERRUPT_BASE   0xB7C00040
 
#define U8500_GPIOBANK0_BASE   U8500_GPIO0_BASE
 
#define U8500_GPIOBANK1_BASE   (U8500_GPIO0_BASE + 0x80)
 
#define U8500_GPIOBANK2_BASE   U8500_GPIO1_BASE
 
#define U8500_GPIOBANK3_BASE   (U8500_GPIO1_BASE + 0x80)
 
#define U8500_GPIOBANK4_BASE   (U8500_GPIO1_BASE + 0x100)
 
#define U8500_GPIOBANK5_BASE   (U8500_GPIO1_BASE + 0x180)
 
#define U8500_GPIOBANK6_BASE   U8500_GPIO2_BASE
 
#define U8500_GPIOBANK7_BASE   (U8500_GPIO2_BASE + 0x80)
 
#define U8500_GPIOBANK8_BASE   U8500_GPIO3_BASE
 
#define U8500_MCDE_SIZE   0x1000
 
#define U8500_DSI_LINK_SIZE   0x1000
 
#define U8500_DSI_LINK1_BASE   (U8500_MCDE_BASE + U8500_MCDE_SIZE)
 
#define U8500_DSI_LINK2_BASE   (U8500_DSI_LINK1_BASE + U8500_DSI_LINK_SIZE)
 
#define U8500_DSI_LINK3_BASE   (U8500_DSI_LINK2_BASE + U8500_DSI_LINK_SIZE)
 
#define U8500_DSI_LINK_COUNT   0x3
 
#define U8500_MODEM_BASE   0xe000000
 
#define U8500_APE_BASE   0x6000000
 
#define U8500_BB_UID_BASE   (U8500_BACKUPRAM1_BASE + 0xFC0)
 

Macro Definition Documentation

#define U8500_APE_BASE   0x6000000

Definition at line 168 of file db8500-regs.h.

#define U8500_ASIC_ID_BASE   0x9001D000

Definition at line 42 of file db8500-regs.h.

#define U8500_B2R2_BASE   0x80130000

Definition at line 34 of file db8500-regs.h.

#define U8500_BACKUPRAM0_BASE   (U8500_PER4_BASE + 0x00000)

Definition at line 95 of file db8500-regs.h.

#define U8500_BACKUPRAM1_BASE   (U8500_PER4_BASE + 0x01000)

Definition at line 96 of file db8500-regs.h.

#define U8500_BB_UID_BASE   (U8500_BACKUPRAM1_BASE + 0xFC0)

Definition at line 171 of file db8500-regs.h.

#define U8500_BOOT_ROM_BASE   0x90000000

Definition at line 40 of file db8500-regs.h.

#define U8500_CLKRST1_BASE   (U8500_PER1_BASE + 0xf000)

Definition at line 145 of file db8500-regs.h.

#define U8500_CLKRST2_BASE   (U8500_PER2_BASE + 0xf000)

Definition at line 133 of file db8500-regs.h.

#define U8500_CLKRST3_BASE   (U8500_PER3_BASE + 0xf000)

Definition at line 119 of file db8500-regs.h.

#define U8500_CLKRST5_BASE   (U8500_PER5_BASE + 0x1f000)

Definition at line 92 of file db8500-regs.h.

#define U8500_CLKRST6_BASE   (U8500_PER6_BASE + 0xf000)

Definition at line 88 of file db8500-regs.h.

#define U8500_CR_BASE   (U8500_PER6_BASE + 0x8000) /* v1 */

Definition at line 85 of file db8500-regs.h.

#define U8500_CRYP0_BASE   (U8500_PER6_BASE + 0xa000)

Definition at line 86 of file db8500-regs.h.

#define U8500_CRYP1_BASE   (U8500_PER6_BASE + 0xb000)

Definition at line 87 of file db8500-regs.h.

#define U8500_DMA_BASE   0x801C0000 /* v1 */

Definition at line 57 of file db8500-regs.h.

#define U8500_DMA_LCLA_BASE   U8500_ESRAM_BANK4

Definition at line 27 of file db8500-regs.h.

#define U8500_DMA_LCPA_BASE   (U8500_ESRAM_BANK0 + U8500_ESRAM_DMA_LCPA_OFFSET)

Definition at line 24 of file db8500-regs.h.

#define U8500_DMC_BASE   (U8500_PER4_BASE + 0x06000)

Definition at line 101 of file db8500-regs.h.

#define U8500_DSI_LINK1_BASE   (U8500_MCDE_BASE + U8500_MCDE_SIZE)

Definition at line 161 of file db8500-regs.h.

#define U8500_DSI_LINK2_BASE   (U8500_DSI_LINK1_BASE + U8500_DSI_LINK_SIZE)

Definition at line 162 of file db8500-regs.h.

#define U8500_DSI_LINK3_BASE   (U8500_DSI_LINK2_BASE + U8500_DSI_LINK_SIZE)

Definition at line 163 of file db8500-regs.h.

#define U8500_DSI_LINK_COUNT   0x3

Definition at line 164 of file db8500-regs.h.

#define U8500_DSI_LINK_SIZE   0x1000

Definition at line 160 of file db8500-regs.h.

#define U8500_ESRAM_BANK0   U8500_ESRAM_BASE

Definition at line 13 of file db8500-regs.h.

#define U8500_ESRAM_BANK1   (U8500_ESRAM_BASE + U8500_ESRAM_BANK_SIZE)

Definition at line 14 of file db8500-regs.h.

#define U8500_ESRAM_BANK2   (U8500_ESRAM_BANK1 + U8500_ESRAM_BANK_SIZE)

Definition at line 15 of file db8500-regs.h.

#define U8500_ESRAM_BANK3   (U8500_ESRAM_BANK2 + U8500_ESRAM_BANK_SIZE)

Definition at line 16 of file db8500-regs.h.

#define U8500_ESRAM_BANK4   (U8500_ESRAM_BANK3 + U8500_ESRAM_BANK_SIZE)

Definition at line 17 of file db8500-regs.h.

#define U8500_ESRAM_BANK_SIZE   0x00020000

Definition at line 12 of file db8500-regs.h.

#define U8500_ESRAM_BASE   0x40000000

Definition at line 11 of file db8500-regs.h.

#define U8500_ESRAM_DMA_LCPA_OFFSET   0x10000

Definition at line 22 of file db8500-regs.h.

#define U8500_FSMC_BASE   (U8500_PER3_BASE + 0x0000)

Definition at line 111 of file db8500-regs.h.

#define U8500_GIC_CPU_BASE   0xa0410100

Definition at line 62 of file db8500-regs.h.

#define U8500_GIC_DIST_BASE   0xa0411000

Definition at line 64 of file db8500-regs.h.

#define U8500_GPIO0_BASE   (U8500_PER1_BASE + 0xE000)

Definition at line 69 of file db8500-regs.h.

#define U8500_GPIO1_BASE   (U8500_PER3_BASE + 0xE000)

Definition at line 70 of file db8500-regs.h.

#define U8500_GPIO2_BASE   (U8500_PER2_BASE + 0xE000)

Definition at line 71 of file db8500-regs.h.

#define U8500_GPIO3_BASE   (U8500_PER5_BASE + 0x1E000)

Definition at line 72 of file db8500-regs.h.

#define U8500_GPIOBANK0_BASE   U8500_GPIO0_BASE

Definition at line 149 of file db8500-regs.h.

#define U8500_GPIOBANK1_BASE   (U8500_GPIO0_BASE + 0x80)

Definition at line 150 of file db8500-regs.h.

#define U8500_GPIOBANK2_BASE   U8500_GPIO1_BASE

Definition at line 151 of file db8500-regs.h.

#define U8500_GPIOBANK3_BASE   (U8500_GPIO1_BASE + 0x80)

Definition at line 152 of file db8500-regs.h.

#define U8500_GPIOBANK4_BASE   (U8500_GPIO1_BASE + 0x100)

Definition at line 153 of file db8500-regs.h.

#define U8500_GPIOBANK5_BASE   (U8500_GPIO1_BASE + 0x180)

Definition at line 154 of file db8500-regs.h.

#define U8500_GPIOBANK6_BASE   U8500_GPIO2_BASE

Definition at line 155 of file db8500-regs.h.

#define U8500_GPIOBANK7_BASE   (U8500_GPIO2_BASE + 0x80)

Definition at line 156 of file db8500-regs.h.

#define U8500_GPIOBANK8_BASE   U8500_GPIO3_BASE

Definition at line 157 of file db8500-regs.h.

#define U8500_HASH0_BASE   (U8500_PER6_BASE + 0x1000)

Definition at line 79 of file db8500-regs.h.

#define U8500_HASH1_BASE   (U8500_PER6_BASE + 0x2000)

Definition at line 80 of file db8500-regs.h.

#define U8500_HSEM_BASE   0x80140000

Definition at line 35 of file db8500-regs.h.

#define U8500_HSIR_BASE   (U8500_PER2_BASE + 0xb000)

Definition at line 131 of file db8500-regs.h.

#define U8500_HSIT_BASE   (U8500_PER2_BASE + 0xc000)

Definition at line 132 of file db8500-regs.h.

#define U8500_I2C0_BASE   (U8500_PER3_BASE + 0x4000)

Definition at line 114 of file db8500-regs.h.

#define U8500_I2C1_BASE   (U8500_PER1_BASE + 0x2000)

Definition at line 136 of file db8500-regs.h.

#define U8500_I2C2_BASE   (U8500_PER1_BASE + 0x8000)

Definition at line 141 of file db8500-regs.h.

#define U8500_I2C3_BASE   (U8500_PER2_BASE + 0x0000)

Definition at line 122 of file db8500-regs.h.

#define U8500_I2C4_BASE   (U8500_PER1_BASE + 0xa000)

Definition at line 143 of file db8500-regs.h.

#define U8500_ICN_BASE   0x81000000

Definition at line 38 of file db8500-regs.h.

#define U8500_L2CC_BASE   0xa0412000

Definition at line 65 of file db8500-regs.h.

#define U8500_MCDE_BASE   0xa0350000

Definition at line 56 of file db8500-regs.h.

#define U8500_MCDE_SIZE   0x1000

Definition at line 159 of file db8500-regs.h.

#define U8500_MODEM_BASE   0xe000000

Definition at line 167 of file db8500-regs.h.

#define U8500_MODEM_I2C   0xb7e02000

Definition at line 67 of file db8500-regs.h.

#define U8500_MSP0_BASE   (U8500_PER1_BASE + 0x3000)

Definition at line 137 of file db8500-regs.h.

#define U8500_MSP1_BASE   (U8500_PER1_BASE + 0x4000)

Definition at line 138 of file db8500-regs.h.

#define U8500_MSP2_BASE   (U8500_PER2_BASE + 0x7000)

Definition at line 127 of file db8500-regs.h.

#define U8500_MSP3_BASE   (U8500_PER1_BASE + 0x5000)

Definition at line 139 of file db8500-regs.h.

#define U8500_MTU0_BASE   (U8500_PER6_BASE + 0x6000) /* v1 */

Definition at line 83 of file db8500-regs.h.

#define U8500_MTU1_BASE   (U8500_PER6_BASE + 0x7000) /* v1 */

Definition at line 84 of file db8500-regs.h.

#define U8500_PER1_BASE   0x80120000

Definition at line 33 of file db8500-regs.h.

#define U8500_PER2_BASE   0x80110000

Definition at line 32 of file db8500-regs.h.

#define U8500_PER3_BASE   0x80000000

Definition at line 29 of file db8500-regs.h.

#define U8500_PER4_BASE   0x80150000

Definition at line 36 of file db8500-regs.h.

#define U8500_PER5_BASE   0xa03e0000

Definition at line 50 of file db8500-regs.h.

#define U8500_PER6_BASE   0xa03c0000

Definition at line 48 of file db8500-regs.h.

#define U8500_PER7_BASE   0xa03d0000

Definition at line 49 of file db8500-regs.h.

#define U8500_PKA_BASE   (U8500_PER6_BASE + 0x4000)

Definition at line 81 of file db8500-regs.h.

#define U8500_PKAM_BASE   (U8500_PER6_BASE + 0x5100)

Definition at line 82 of file db8500-regs.h.

#define U8500_PRCMU_BASE   (U8500_PER4_BASE + 0x07000)

Definition at line 102 of file db8500-regs.h.

#define U8500_PRCMU_TCDM_BASE   (U8500_PER4_BASE + 0x68000)

Definition at line 104 of file db8500-regs.h.

#define U8500_PRCMU_TCPM_BASE   (U8500_PER4_BASE + 0x60000)

Definition at line 106 of file db8500-regs.h.

#define U8500_PRCMU_TIMER_3_BASE   (U8500_PER4_BASE + 0x07338)

Definition at line 107 of file db8500-regs.h.

#define U8500_PRCMU_TIMER_4_BASE   (U8500_PER4_BASE + 0x07450)

Definition at line 108 of file db8500-regs.h.

#define U8500_PWL_BASE   (U8500_PER2_BASE + 0x3000)

Definition at line 125 of file db8500-regs.h.

#define U8500_RNG_BASE   (U8500_PER6_BASE + 0x0000)

Definition at line 78 of file db8500-regs.h.

#define U8500_RTC_BASE   (U8500_PER4_BASE + 0x04000)

Definition at line 99 of file db8500-regs.h.

#define U8500_RTT0_BASE   (U8500_PER4_BASE + 0x02000)

Definition at line 97 of file db8500-regs.h.

#define U8500_RTT1_BASE   (U8500_PER4_BASE + 0x03000)

Definition at line 98 of file db8500-regs.h.

#define U8500_SBAG_BASE   0xa0390000

Definition at line 59 of file db8500-regs.h.

#define U8500_SCR_BASE   (U8500_PER4_BASE + 0x05000)

Definition at line 100 of file db8500-regs.h.

#define U8500_SCU_BASE   0xa0410000

Definition at line 61 of file db8500-regs.h.

#define U8500_SDI0_BASE   (U8500_PER1_BASE + 0x6000)

Definition at line 140 of file db8500-regs.h.

#define U8500_SDI1_BASE   (U8500_PER2_BASE + 0x8000)

Definition at line 128 of file db8500-regs.h.

#define U8500_SDI2_BASE   (U8500_PER3_BASE + 0x5000)

Definition at line 115 of file db8500-regs.h.

#define U8500_SDI3_BASE   (U8500_PER2_BASE + 0x9000)

Definition at line 129 of file db8500-regs.h.

#define U8500_SDI4_BASE   (U8500_PER2_BASE + 0x4000)

Definition at line 126 of file db8500-regs.h.

#define U8500_SDI5_BASE   (U8500_PER3_BASE + 0x8000)

Definition at line 118 of file db8500-regs.h.

#define U8500_SGA_BASE   0xa0300000

Definition at line 55 of file db8500-regs.h.

#define U8500_SHRM_GOP_INTERRUPT_BASE   0xB7C00040

Definition at line 147 of file db8500-regs.h.

#define U8500_SIA_BASE   0xa0200000

Definition at line 53 of file db8500-regs.h.

#define U8500_SKE_BASE   (U8500_PER3_BASE + 0x6000)

Definition at line 116 of file db8500-regs.h.

#define U8500_SLIM0_BASE   (U8500_PER1_BASE + 0xb000)

Definition at line 144 of file db8500-regs.h.

#define U8500_SPI0_BASE   (U8500_PER2_BASE + 0xa000)

Definition at line 130 of file db8500-regs.h.

#define U8500_SPI1_BASE   (U8500_PER2_BASE + 0x2000)

Definition at line 124 of file db8500-regs.h.

#define U8500_SPI2_BASE   (U8500_PER2_BASE + 0x1000)

Definition at line 123 of file db8500-regs.h.

#define U8500_SPI3_BASE   (U8500_PER1_BASE + 0x9000)

Definition at line 142 of file db8500-regs.h.

#define U8500_SSP0_BASE   (U8500_PER3_BASE + 0x2000)

Definition at line 112 of file db8500-regs.h.

#define U8500_SSP1_BASE   (U8500_PER3_BASE + 0x3000)

Definition at line 113 of file db8500-regs.h.

#define U8500_STM_BASE   0x80100000

Definition at line 30 of file db8500-regs.h.

#define U8500_STM_REG_BASE   (U8500_STM_BASE + 0xF000)

Definition at line 31 of file db8500-regs.h.

#define U8500_SVA_BASE   0xa0100000

Definition at line 52 of file db8500-regs.h.

#define U8500_TPIU_BASE   0x80190000

Definition at line 37 of file db8500-regs.h.

#define U8500_TWD_BASE   0xa0410600

Definition at line 63 of file db8500-regs.h.

#define U8500_UART0_BASE   (U8500_PER1_BASE + 0x0000)

Definition at line 74 of file db8500-regs.h.

#define U8500_UART1_BASE   (U8500_PER1_BASE + 0x1000)

Definition at line 75 of file db8500-regs.h.

#define U8500_UART2_BASE   (U8500_PER3_BASE + 0x7000)

Definition at line 117 of file db8500-regs.h.

#define U8500_USBOTG_BASE   (U8500_PER5_BASE + 0x00000)

Definition at line 91 of file db8500-regs.h.

#define U9540_ASIC_ID_BASE   0xFFFFD000

Definition at line 46 of file db8500-regs.h.

#define U9540_BOOT_ROM_BASE   0xFFFE0000

Definition at line 44 of file db8500-regs.h.

#define U9540_DMC1_BASE   (U8500_PER4_BASE + 0x0A000)

Definition at line 103 of file db8500-regs.h.

#define U9540_PRCMU_TCDM_BASE   (U8500_PER4_BASE + 0x6A000)

Definition at line 105 of file db8500-regs.h.