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Macros
defBF527.h File Reference
#include "defBF525.h"

Go to the source code of this file.

Macros

#define EMAC_OPMODE   0xFFC03000 /* Operating Mode Register */
 
#define EMAC_ADDRLO   0xFFC03004 /* Address Low (32 LSBs) Register */
 
#define EMAC_ADDRHI   0xFFC03008 /* Address High (16 MSBs) Register */
 
#define EMAC_HASHLO   0xFFC0300C /* Multicast Hash Table Low (Bins 31-0) Register */
 
#define EMAC_HASHHI   0xFFC03010 /* Multicast Hash Table High (Bins 63-32) Register */
 
#define EMAC_STAADD   0xFFC03014 /* Station Management Address Register */
 
#define EMAC_STADAT   0xFFC03018 /* Station Management Data Register */
 
#define EMAC_FLC   0xFFC0301C /* Flow Control Register */
 
#define EMAC_VLAN1   0xFFC03020 /* VLAN1 Tag Register */
 
#define EMAC_VLAN2   0xFFC03024 /* VLAN2 Tag Register */
 
#define EMAC_WKUP_CTL   0xFFC0302C /* Wake-Up Control/Status Register */
 
#define EMAC_WKUP_FFMSK0   0xFFC03030 /* Wake-Up Frame Filter 0 Byte Mask Register */
 
#define EMAC_WKUP_FFMSK1   0xFFC03034 /* Wake-Up Frame Filter 1 Byte Mask Register */
 
#define EMAC_WKUP_FFMSK2   0xFFC03038 /* Wake-Up Frame Filter 2 Byte Mask Register */
 
#define EMAC_WKUP_FFMSK3   0xFFC0303C /* Wake-Up Frame Filter 3 Byte Mask Register */
 
#define EMAC_WKUP_FFCMD   0xFFC03040 /* Wake-Up Frame Filter Commands Register */
 
#define EMAC_WKUP_FFOFF   0xFFC03044 /* Wake-Up Frame Filter Offsets Register */
 
#define EMAC_WKUP_FFCRC0   0xFFC03048 /* Wake-Up Frame Filter 0,1 CRC-16 Register */
 
#define EMAC_WKUP_FFCRC1   0xFFC0304C /* Wake-Up Frame Filter 2,3 CRC-16 Register */
 
#define EMAC_SYSCTL   0xFFC03060 /* EMAC System Control Register */
 
#define EMAC_SYSTAT   0xFFC03064 /* EMAC System Status Register */
 
#define EMAC_RX_STAT   0xFFC03068 /* RX Current Frame Status Register */
 
#define EMAC_RX_STKY   0xFFC0306C /* RX Sticky Frame Status Register */
 
#define EMAC_RX_IRQE   0xFFC03070 /* RX Frame Status Interrupt Enables Register */
 
#define EMAC_TX_STAT   0xFFC03074 /* TX Current Frame Status Register */
 
#define EMAC_TX_STKY   0xFFC03078 /* TX Sticky Frame Status Register */
 
#define EMAC_TX_IRQE   0xFFC0307C /* TX Frame Status Interrupt Enables Register */
 
#define EMAC_MMC_CTL   0xFFC03080 /* MMC Counter Control Register */
 
#define EMAC_MMC_RIRQS   0xFFC03084 /* MMC RX Interrupt Status Register */
 
#define EMAC_MMC_RIRQE   0xFFC03088 /* MMC RX Interrupt Enables Register */
 
#define EMAC_MMC_TIRQS   0xFFC0308C /* MMC TX Interrupt Status Register */
 
#define EMAC_MMC_TIRQE   0xFFC03090 /* MMC TX Interrupt Enables Register */
 
#define EMAC_RXC_OK   0xFFC03100 /* RX Frame Successful Count */
 
#define EMAC_RXC_FCS   0xFFC03104 /* RX Frame FCS Failure Count */
 
#define EMAC_RXC_ALIGN   0xFFC03108 /* RX Alignment Error Count */
 
#define EMAC_RXC_OCTET   0xFFC0310C /* RX Octets Successfully Received Count */
 
#define EMAC_RXC_DMAOVF   0xFFC03110 /* Internal MAC Sublayer Error RX Frame Count */
 
#define EMAC_RXC_UNICST   0xFFC03114 /* Unicast RX Frame Count */
 
#define EMAC_RXC_MULTI   0xFFC03118 /* Multicast RX Frame Count */
 
#define EMAC_RXC_BROAD   0xFFC0311C /* Broadcast RX Frame Count */
 
#define EMAC_RXC_LNERRI   0xFFC03120 /* RX Frame In Range Error Count */
 
#define EMAC_RXC_LNERRO   0xFFC03124 /* RX Frame Out Of Range Error Count */
 
#define EMAC_RXC_LONG   0xFFC03128 /* RX Frame Too Long Count */
 
#define EMAC_RXC_MACCTL   0xFFC0312C /* MAC Control RX Frame Count */
 
#define EMAC_RXC_OPCODE   0xFFC03130 /* Unsupported Op-Code RX Frame Count */
 
#define EMAC_RXC_PAUSE   0xFFC03134 /* MAC Control Pause RX Frame Count */
 
#define EMAC_RXC_ALLFRM   0xFFC03138 /* Overall RX Frame Count */
 
#define EMAC_RXC_ALLOCT   0xFFC0313C /* Overall RX Octet Count */
 
#define EMAC_RXC_TYPED   0xFFC03140 /* Type/Length Consistent RX Frame Count */
 
#define EMAC_RXC_SHORT   0xFFC03144 /* RX Frame Fragment Count - Byte Count x < 64 */
 
#define EMAC_RXC_EQ64   0xFFC03148 /* Good RX Frame Count - Byte Count x = 64 */
 
#define EMAC_RXC_LT128   0xFFC0314C /* Good RX Frame Count - Byte Count 64 < x < 128 */
 
#define EMAC_RXC_LT256   0xFFC03150 /* Good RX Frame Count - Byte Count 128 <= x < 256 */
 
#define EMAC_RXC_LT512   0xFFC03154 /* Good RX Frame Count - Byte Count 256 <= x < 512 */
 
#define EMAC_RXC_LT1024   0xFFC03158 /* Good RX Frame Count - Byte Count 512 <= x < 1024 */
 
#define EMAC_RXC_GE1024   0xFFC0315C /* Good RX Frame Count - Byte Count x >= 1024 */
 
#define EMAC_TXC_OK   0xFFC03180 /* TX Frame Successful Count */
 
#define EMAC_TXC_1COL   0xFFC03184 /* TX Frames Successful After Single Collision Count */
 
#define EMAC_TXC_GT1COL   0xFFC03188 /* TX Frames Successful After Multiple Collisions Count */
 
#define EMAC_TXC_OCTET   0xFFC0318C /* TX Octets Successfully Received Count */
 
#define EMAC_TXC_DEFER   0xFFC03190 /* TX Frame Delayed Due To Busy Count */
 
#define EMAC_TXC_LATECL   0xFFC03194 /* Late TX Collisions Count */
 
#define EMAC_TXC_XS_COL   0xFFC03198 /* TX Frame Failed Due To Excessive Collisions Count */
 
#define EMAC_TXC_DMAUND   0xFFC0319C /* Internal MAC Sublayer Error TX Frame Count */
 
#define EMAC_TXC_CRSERR   0xFFC031A0 /* Carrier Sense Deasserted During TX Frame Count */
 
#define EMAC_TXC_UNICST   0xFFC031A4 /* Unicast TX Frame Count */
 
#define EMAC_TXC_MULTI   0xFFC031A8 /* Multicast TX Frame Count */
 
#define EMAC_TXC_BROAD   0xFFC031AC /* Broadcast TX Frame Count */
 
#define EMAC_TXC_XS_DFR   0xFFC031B0 /* TX Frames With Excessive Deferral Count */
 
#define EMAC_TXC_MACCTL   0xFFC031B4 /* MAC Control TX Frame Count */
 
#define EMAC_TXC_ALLFRM   0xFFC031B8 /* Overall TX Frame Count */
 
#define EMAC_TXC_ALLOCT   0xFFC031BC /* Overall TX Octet Count */
 
#define EMAC_TXC_EQ64   0xFFC031C0 /* Good TX Frame Count - Byte Count x = 64 */
 
#define EMAC_TXC_LT128   0xFFC031C4 /* Good TX Frame Count - Byte Count 64 < x < 128 */
 
#define EMAC_TXC_LT256   0xFFC031C8 /* Good TX Frame Count - Byte Count 128 <= x < 256 */
 
#define EMAC_TXC_LT512   0xFFC031CC /* Good TX Frame Count - Byte Count 256 <= x < 512 */
 
#define EMAC_TXC_LT1024   0xFFC031D0 /* Good TX Frame Count - Byte Count 512 <= x < 1024 */
 
#define EMAC_TXC_GE1024   0xFFC031D4 /* Good TX Frame Count - Byte Count x >= 1024 */
 
#define EMAC_TXC_ABORT   0xFFC031D8 /* Total TX Frames Aborted Count */
 
#define FramesReceivedOK   EMAC_RXC_OK /* RX Frame Successful Count */
 
#define FrameCheckSequenceErrors   EMAC_RXC_FCS /* RX Frame FCS Failure Count */
 
#define AlignmentErrors   EMAC_RXC_ALIGN /* RX Alignment Error Count */
 
#define OctetsReceivedOK   EMAC_RXC_OCTET /* RX Octets Successfully Received Count */
 
#define FramesLostDueToIntMACRcvError   EMAC_RXC_DMAOVF /* Internal MAC Sublayer Error RX Frame Count */
 
#define UnicastFramesReceivedOK   EMAC_RXC_UNICST /* Unicast RX Frame Count */
 
#define MulticastFramesReceivedOK   EMAC_RXC_MULTI /* Multicast RX Frame Count */
 
#define BroadcastFramesReceivedOK   EMAC_RXC_BROAD /* Broadcast RX Frame Count */
 
#define InRangeLengthErrors   EMAC_RXC_LNERRI /* RX Frame In Range Error Count */
 
#define OutOfRangeLengthField   EMAC_RXC_LNERRO /* RX Frame Out Of Range Error Count */
 
#define FrameTooLongErrors   EMAC_RXC_LONG /* RX Frame Too Long Count */
 
#define MACControlFramesReceived   EMAC_RXC_MACCTL /* MAC Control RX Frame Count */
 
#define UnsupportedOpcodesReceived   EMAC_RXC_OPCODE /* Unsupported Op-Code RX Frame Count */
 
#define PAUSEMACCtrlFramesReceived   EMAC_RXC_PAUSE /* MAC Control Pause RX Frame Count */
 
#define FramesReceivedAll   EMAC_RXC_ALLFRM /* Overall RX Frame Count */
 
#define OctetsReceivedAll   EMAC_RXC_ALLOCT /* Overall RX Octet Count */
 
#define TypedFramesReceived   EMAC_RXC_TYPED /* Type/Length Consistent RX Frame Count */
 
#define FramesLenLt64Received   EMAC_RXC_SHORT /* RX Frame Fragment Count - Byte Count x < 64 */
 
#define FramesLenEq64Received   EMAC_RXC_EQ64 /* Good RX Frame Count - Byte Count x = 64 */
 
#define FramesLen65_127Received   EMAC_RXC_LT128 /* Good RX Frame Count - Byte Count 64 < x < 128 */
 
#define FramesLen128_255Received   EMAC_RXC_LT256 /* Good RX Frame Count - Byte Count 128 <= x < 256 */
 
#define FramesLen256_511Received   EMAC_RXC_LT512 /* Good RX Frame Count - Byte Count 256 <= x < 512 */
 
#define FramesLen512_1023Received   EMAC_RXC_LT1024 /* Good RX Frame Count - Byte Count 512 <= x < 1024 */
 
#define FramesLen1024_MaxReceived   EMAC_RXC_GE1024 /* Good RX Frame Count - Byte Count x >= 1024 */
 
#define FramesTransmittedOK   EMAC_TXC_OK /* TX Frame Successful Count */
 
#define SingleCollisionFrames   EMAC_TXC_1COL /* TX Frames Successful After Single Collision Count */
 
#define MultipleCollisionFrames   EMAC_TXC_GT1COL /* TX Frames Successful After Multiple Collisions Count */
 
#define OctetsTransmittedOK   EMAC_TXC_OCTET /* TX Octets Successfully Received Count */
 
#define FramesWithDeferredXmissions   EMAC_TXC_DEFER /* TX Frame Delayed Due To Busy Count */
 
#define LateCollisions   EMAC_TXC_LATECL /* Late TX Collisions Count */
 
#define FramesAbortedDueToXSColls   EMAC_TXC_XS_COL /* TX Frame Failed Due To Excessive Collisions Count */
 
#define FramesLostDueToIntMacXmitError   EMAC_TXC_DMAUND /* Internal MAC Sublayer Error TX Frame Count */
 
#define CarrierSenseErrors   EMAC_TXC_CRSERR /* Carrier Sense Deasserted During TX Frame Count */
 
#define UnicastFramesXmittedOK   EMAC_TXC_UNICST /* Unicast TX Frame Count */
 
#define MulticastFramesXmittedOK   EMAC_TXC_MULTI /* Multicast TX Frame Count */
 
#define BroadcastFramesXmittedOK   EMAC_TXC_BROAD /* Broadcast TX Frame Count */
 
#define FramesWithExcessiveDeferral   EMAC_TXC_XS_DFR /* TX Frames With Excessive Deferral Count */
 
#define MACControlFramesTransmitted   EMAC_TXC_MACCTL /* MAC Control TX Frame Count */
 
#define FramesTransmittedAll   EMAC_TXC_ALLFRM /* Overall TX Frame Count */
 
#define OctetsTransmittedAll   EMAC_TXC_ALLOCT /* Overall TX Octet Count */
 
#define FramesLenEq64Transmitted   EMAC_TXC_EQ64 /* Good TX Frame Count - Byte Count x = 64 */
 
#define FramesLen65_127Transmitted   EMAC_TXC_LT128 /* Good TX Frame Count - Byte Count 64 < x < 128 */
 
#define FramesLen128_255Transmitted   EMAC_TXC_LT256 /* Good TX Frame Count - Byte Count 128 <= x < 256 */
 
#define FramesLen256_511Transmitted   EMAC_TXC_LT512 /* Good TX Frame Count - Byte Count 256 <= x < 512 */
 
#define FramesLen512_1023Transmitted   EMAC_TXC_LT1024 /* Good TX Frame Count - Byte Count 512 <= x < 1024 */
 
#define FramesLen1024_MaxTransmitted   EMAC_TXC_GE1024 /* Good TX Frame Count - Byte Count x >= 1024 */
 
#define TxAbortedFrames   EMAC_TXC_ABORT /* Total TX Frames Aborted Count */
 
#define RE   0x00000001 /* Receiver Enable */
 
#define ASTP   0x00000002 /* Enable Automatic Pad Stripping On RX Frames */
 
#define HU   0x00000010 /* Hash Filter Unicast Address */
 
#define HM   0x00000020 /* Hash Filter Multicast Address */
 
#define PAM   0x00000040 /* Pass-All-Multicast Mode Enable */
 
#define PR   0x00000080 /* Promiscuous Mode Enable */
 
#define IFE   0x00000100 /* Inverse Filtering Enable */
 
#define DBF   0x00000200 /* Disable Broadcast Frame Reception */
 
#define PBF   0x00000400 /* Pass Bad Frames Enable */
 
#define PSF   0x00000800 /* Pass Short Frames Enable */
 
#define RAF   0x00001000 /* Receive-All Mode */
 
#define TE   0x00010000 /* Transmitter Enable */
 
#define DTXPAD   0x00020000 /* Disable Automatic TX Padding */
 
#define DTXCRC   0x00040000 /* Disable Automatic TX CRC Generation */
 
#define DC   0x00080000 /* Deferral Check */
 
#define BOLMT   0x00300000 /* Back-Off Limit */
 
#define BOLMT_10   0x00000000 /* 10-bit range */
 
#define BOLMT_8   0x00100000 /* 8-bit range */
 
#define BOLMT_4   0x00200000 /* 4-bit range */
 
#define BOLMT_1   0x00300000 /* 1-bit range */
 
#define DRTY   0x00400000 /* Disable TX Retry On Collision */
 
#define LCTRE   0x00800000 /* Enable TX Retry On Late Collision */
 
#define RMII   0x01000000 /* RMII/MII* Mode */
 
#define RMII_10   0x02000000 /* Speed Select for RMII Port (10MBit/100MBit*) */
 
#define FDMODE   0x04000000 /* Duplex Mode Enable (Full/Half*) */
 
#define LB   0x08000000 /* Internal Loopback Enable */
 
#define DRO   0x10000000 /* Disable Receive Own Frames (Half-Duplex Mode) */
 
#define STABUSY   0x00000001 /* Initiate Station Mgt Reg Access / STA Busy Stat */
 
#define STAOP   0x00000002 /* Station Management Operation Code (Write/Read*) */
 
#define STADISPRE   0x00000004 /* Disable Preamble Generation */
 
#define STAIE   0x00000008 /* Station Mgt. Transfer Done Interrupt Enable */
 
#define REGAD   0x000007C0 /* STA Register Address */
 
#define PHYAD   0x0000F800 /* PHY Device Address */
 
#define SET_REGAD(x)   (((x)&0x1F)<< 6 ) /* Set STA Register Address */
 
#define SET_PHYAD(x)   (((x)&0x1F)<< 11 ) /* Set PHY Device Address */
 
#define STADATA   0x0000FFFF /* Station Management Data */
 
#define FLCBUSY   0x00000001 /* Send Flow Ctrl Frame / Flow Ctrl Busy Status */
 
#define FLCE   0x00000002 /* Flow Control Enable */
 
#define PCF   0x00000004 /* Pass Control Frames */
 
#define BKPRSEN   0x00000008 /* Enable Backpressure */
 
#define FLCPAUSE   0xFFFF0000 /* Pause Time */
 
#define SET_FLCPAUSE(x)   (((x)&0xFFFF)<< 16) /* Set Pause Time */
 
#define CAPWKFRM   0x00000001 /* Capture Wake-Up Frames */
 
#define MPKE   0x00000002 /* Magic Packet Enable */
 
#define RWKE   0x00000004 /* Remote Wake-Up Frame Enable */
 
#define GUWKE   0x00000008 /* Global Unicast Wake Enable */
 
#define MPKS   0x00000020 /* Magic Packet Received Status */
 
#define RWKS   0x00000F00 /* Wake-Up Frame Received Status, Filters 3:0 */
 
#define WF0_E   0x00000001 /* Enable Wake-Up Filter 0 */
 
#define WF0_T   0x00000008 /* Wake-Up Filter 0 Addr Type (Multicast/Unicast*) */
 
#define WF1_E   0x00000100 /* Enable Wake-Up Filter 1 */
 
#define WF1_T   0x00000800 /* Wake-Up Filter 1 Addr Type (Multicast/Unicast*) */
 
#define WF2_E   0x00010000 /* Enable Wake-Up Filter 2 */
 
#define WF2_T   0x00080000 /* Wake-Up Filter 2 Addr Type (Multicast/Unicast*) */
 
#define WF3_E   0x01000000 /* Enable Wake-Up Filter 3 */
 
#define WF3_T   0x08000000 /* Wake-Up Filter 3 Addr Type (Multicast/Unicast*) */
 
#define WF0_OFF   0x000000FF /* Wake-Up Filter 0 Pattern Offset */
 
#define WF1_OFF   0x0000FF00 /* Wake-Up Filter 1 Pattern Offset */
 
#define WF2_OFF   0x00FF0000 /* Wake-Up Filter 2 Pattern Offset */
 
#define WF3_OFF   0xFF000000 /* Wake-Up Filter 3 Pattern Offset */
 
#define SET_WF0_OFF(x)   (((x)&0xFF)<< 0 ) /* Set Wake-Up Filter 0 Byte Offset */
 
#define SET_WF1_OFF(x)   (((x)&0xFF)<< 8 ) /* Set Wake-Up Filter 1 Byte Offset */
 
#define SET_WF2_OFF(x)   (((x)&0xFF)<< 16 ) /* Set Wake-Up Filter 2 Byte Offset */
 
#define SET_WF3_OFF(x)   (((x)&0xFF)<< 24 ) /* Set Wake-Up Filter 3 Byte Offset */
 
#define SET_WF_OFFS(x0, x1, x2, x3)   (SET_WF0_OFF((x0))|SET_WF1_OFF((x1))|SET_WF2_OFF((x2))|SET_WF3_OFF((x3)))
 
#define WF0_CRC   0x0000FFFF /* Wake-Up Filter 0 Pattern CRC */
 
#define WF1_CRC   0xFFFF0000 /* Wake-Up Filter 1 Pattern CRC */
 
#define SET_WF0_CRC(x)   (((x)&0xFFFF)<< 0 ) /* Set Wake-Up Filter 0 Target CRC */
 
#define SET_WF1_CRC(x)   (((x)&0xFFFF)<< 16 ) /* Set Wake-Up Filter 1 Target CRC */
 
#define WF2_CRC   0x0000FFFF /* Wake-Up Filter 2 Pattern CRC */
 
#define WF3_CRC   0xFFFF0000 /* Wake-Up Filter 3 Pattern CRC */
 
#define SET_WF2_CRC(x)   (((x)&0xFFFF)<< 0 ) /* Set Wake-Up Filter 2 Target CRC */
 
#define SET_WF3_CRC(x)   (((x)&0xFFFF)<< 16 ) /* Set Wake-Up Filter 3 Target CRC */
 
#define PHYIE   0x00000001 /* PHY_INT Interrupt Enable */
 
#define RXDWA   0x00000002 /* Receive Frame DMA Word Alignment (Odd/Even*) */
 
#define RXCKS   0x00000004 /* Enable RX Frame TCP/UDP Checksum Computation */
 
#define TXDWA   0x00000010 /* Transmit Frame DMA Word Alignment (Odd/Even*) */
 
#define MDCDIV   0x00003F00 /* SCLK:MDC Clock Divisor [MDC=SCLK/(2*(N+1))] */
 
#define SET_MDCDIV(x)   (((x)&0x3F)<< 8) /* Set MDC Clock Divisor */
 
#define PHYINT   0x00000001 /* PHY_INT Interrupt Status */
 
#define MMCINT   0x00000002 /* MMC Counter Interrupt Status */
 
#define RXFSINT   0x00000004 /* RX Frame-Status Interrupt Status */
 
#define TXFSINT   0x00000008 /* TX Frame-Status Interrupt Status */
 
#define WAKEDET   0x00000010 /* Wake-Up Detected Status */
 
#define RXDMAERR   0x00000020 /* RX DMA Direction Error Status */
 
#define TXDMAERR   0x00000040 /* TX DMA Direction Error Status */
 
#define STMDONE   0x00000080 /* Station Mgt. Transfer Done Interrupt Status */
 
#define RX_FRLEN   0x000007FF /* Frame Length In Bytes */
 
#define RX_COMP   0x00001000 /* RX Frame Complete */
 
#define RX_OK   0x00002000 /* RX Frame Received With No Errors */
 
#define RX_LONG   0x00004000 /* RX Frame Too Long Error */
 
#define RX_ALIGN   0x00008000 /* RX Frame Alignment Error */
 
#define RX_CRC   0x00010000 /* RX Frame CRC Error */
 
#define RX_LEN   0x00020000 /* RX Frame Length Error */
 
#define RX_FRAG   0x00040000 /* RX Frame Fragment Error */
 
#define RX_ADDR   0x00080000 /* RX Frame Address Filter Failed Error */
 
#define RX_DMAO   0x00100000 /* RX Frame DMA Overrun Error */
 
#define RX_PHY   0x00200000 /* RX Frame PHY Error */
 
#define RX_LATE   0x00400000 /* RX Frame Late Collision Error */
 
#define RX_RANGE   0x00800000 /* RX Frame Length Field Out of Range Error */
 
#define RX_MULTI   0x01000000 /* RX Multicast Frame Indicator */
 
#define RX_BROAD   0x02000000 /* RX Broadcast Frame Indicator */
 
#define RX_CTL   0x04000000 /* RX Control Frame Indicator */
 
#define RX_UCTL   0x08000000 /* Unsupported RX Control Frame Indicator */
 
#define RX_TYPE   0x10000000 /* RX Typed Frame Indicator */
 
#define RX_VLAN1   0x20000000 /* RX VLAN1 Frame Indicator */
 
#define RX_VLAN2   0x40000000 /* RX VLAN2 Frame Indicator */
 
#define RX_ACCEPT   0x80000000 /* RX Frame Accepted Indicator */
 
#define TX_COMP   0x00000001 /* TX Frame Complete */
 
#define TX_OK   0x00000002 /* TX Frame Sent With No Errors */
 
#define TX_ECOLL   0x00000004 /* TX Frame Excessive Collision Error */
 
#define TX_LATE   0x00000008 /* TX Frame Late Collision Error */
 
#define TX_DMAU   0x00000010 /* TX Frame DMA Underrun Error (STAT) */
 
#define TX_MACE   0x00000010 /* Internal MAC Error Detected (STKY and IRQE) */
 
#define TX_EDEFER   0x00000020 /* TX Frame Excessive Deferral Error */
 
#define TX_BROAD   0x00000040 /* TX Broadcast Frame Indicator */
 
#define TX_MULTI   0x00000080 /* TX Multicast Frame Indicator */
 
#define TX_CCNT   0x00000F00 /* TX Frame Collision Count */
 
#define TX_DEFER   0x00001000 /* TX Frame Deferred Indicator */
 
#define TX_CRS   0x00002000 /* TX Frame Carrier Sense Not Asserted Error */
 
#define TX_LOSS   0x00004000 /* TX Frame Carrier Lost During TX Error */
 
#define TX_RETRY   0x00008000 /* TX Frame Successful After Retry */
 
#define TX_FRLEN   0x07FF0000 /* TX Frame Length (Bytes) */
 
#define RSTC   0x00000001 /* Reset All Counters */
 
#define CROLL   0x00000002 /* Counter Roll-Over Enable */
 
#define CCOR   0x00000004 /* Counter Clear-On-Read Mode Enable */
 
#define MMCE   0x00000008 /* Enable MMC Counter Operation */
 
#define RX_OK_CNT   0x00000001 /* RX Frames Received With No Errors */
 
#define RX_FCS_CNT   0x00000002 /* RX Frames W/Frame Check Sequence Errors */
 
#define RX_ALIGN_CNT   0x00000004 /* RX Frames With Alignment Errors */
 
#define RX_OCTET_CNT   0x00000008 /* RX Octets Received OK */
 
#define RX_LOST_CNT   0x00000010 /* RX Frames Lost Due To Internal MAC RX Error */
 
#define RX_UNI_CNT   0x00000020 /* Unicast RX Frames Received OK */
 
#define RX_MULTI_CNT   0x00000040 /* Multicast RX Frames Received OK */
 
#define RX_BROAD_CNT   0x00000080 /* Broadcast RX Frames Received OK */
 
#define RX_IRL_CNT   0x00000100 /* RX Frames With In-Range Length Errors */
 
#define RX_ORL_CNT   0x00000200 /* RX Frames With Out-Of-Range Length Errors */
 
#define RX_LONG_CNT   0x00000400 /* RX Frames With Frame Too Long Errors */
 
#define RX_MACCTL_CNT   0x00000800 /* MAC Control RX Frames Received */
 
#define RX_OPCODE_CTL   0x00001000 /* Unsupported Op-Code RX Frames Received */
 
#define RX_PAUSE_CNT   0x00002000 /* PAUSEMAC Control RX Frames Received */
 
#define RX_ALLF_CNT   0x00004000 /* All RX Frames Received */
 
#define RX_ALLO_CNT   0x00008000 /* All RX Octets Received */
 
#define RX_TYPED_CNT   0x00010000 /* Typed RX Frames Received */
 
#define RX_SHORT_CNT   0x00020000 /* RX Frame Fragments (< 64 Bytes) Received */
 
#define RX_EQ64_CNT   0x00040000 /* 64-Byte RX Frames Received */
 
#define RX_LT128_CNT   0x00080000 /* 65-127-Byte RX Frames Received */
 
#define RX_LT256_CNT   0x00100000 /* 128-255-Byte RX Frames Received */
 
#define RX_LT512_CNT   0x00200000 /* 256-511-Byte RX Frames Received */
 
#define RX_LT1024_CNT   0x00400000 /* 512-1023-Byte RX Frames Received */
 
#define RX_GE1024_CNT   0x00800000 /* 1024-Max-Byte RX Frames Received */
 
#define TX_OK_CNT   0x00000001 /* TX Frames Sent OK */
 
#define TX_SCOLL_CNT   0x00000002 /* TX Frames With Single Collisions */
 
#define TX_MCOLL_CNT   0x00000004 /* TX Frames With Multiple Collisions */
 
#define TX_OCTET_CNT   0x00000008 /* TX Octets Sent OK */
 
#define TX_DEFER_CNT   0x00000010 /* TX Frames With Deferred Transmission */
 
#define TX_LATE_CNT   0x00000020 /* TX Frames With Late Collisions */
 
#define TX_ABORTC_CNT   0x00000040 /* TX Frames Aborted Due To Excess Collisions */
 
#define TX_LOST_CNT   0x00000080 /* TX Frames Lost Due To Internal MAC TX Error */
 
#define TX_CRS_CNT   0x00000100 /* TX Frames With Carrier Sense Errors */
 
#define TX_UNI_CNT   0x00000200 /* Unicast TX Frames Sent */
 
#define TX_MULTI_CNT   0x00000400 /* Multicast TX Frames Sent */
 
#define TX_BROAD_CNT   0x00000800 /* Broadcast TX Frames Sent */
 
#define TX_EXDEF_CTL   0x00001000 /* TX Frames With Excessive Deferral */
 
#define TX_MACCTL_CNT   0x00002000 /* MAC Control TX Frames Sent */
 
#define TX_ALLF_CNT   0x00004000 /* All TX Frames Sent */
 
#define TX_ALLO_CNT   0x00008000 /* All TX Octets Sent */
 
#define TX_EQ64_CNT   0x00010000 /* 64-Byte TX Frames Sent */
 
#define TX_LT128_CNT   0x00020000 /* 65-127-Byte TX Frames Sent */
 
#define TX_LT256_CNT   0x00040000 /* 128-255-Byte TX Frames Sent */
 
#define TX_LT512_CNT   0x00080000 /* 256-511-Byte TX Frames Sent */
 
#define TX_LT1024_CNT   0x00100000 /* 512-1023-Byte TX Frames Sent */
 
#define TX_GE1024_CNT   0x00200000 /* 1024-Max-Byte TX Frames Sent */
 
#define TX_ABORT_CNT   0x00400000 /* TX Frames Aborted */
 

Macro Definition Documentation

#define AlignmentErrors   EMAC_RXC_ALIGN /* RX Alignment Error Count */

Definition at line 103 of file defBF527.h.

#define ASTP   0x00000002 /* Enable Automatic Pad Stripping On RX Frames */

Definition at line 167 of file defBF527.h.

#define BKPRSEN   0x00000008 /* Enable Backpressure */

Definition at line 215 of file defBF527.h.

#define BOLMT   0x00300000 /* Back-Off Limit */

Definition at line 181 of file defBF527.h.

#define BOLMT_1   0x00300000 /* 1-bit range */

Definition at line 185 of file defBF527.h.

#define BOLMT_10   0x00000000 /* 10-bit range */

Definition at line 182 of file defBF527.h.

#define BOLMT_4   0x00200000 /* 4-bit range */

Definition at line 184 of file defBF527.h.

#define BOLMT_8   0x00100000 /* 8-bit range */

Definition at line 183 of file defBF527.h.

#define BroadcastFramesReceivedOK   EMAC_RXC_BROAD /* Broadcast RX Frame Count */

Definition at line 108 of file defBF527.h.

#define BroadcastFramesXmittedOK   EMAC_TXC_BROAD /* Broadcast TX Frame Count */

Definition at line 137 of file defBF527.h.

#define CAPWKFRM   0x00000001 /* Capture Wake-Up Frames */

Definition at line 222 of file defBF527.h.

#define CarrierSenseErrors   EMAC_TXC_CRSERR /* Carrier Sense Deasserted During TX Frame Count */

Definition at line 134 of file defBF527.h.

#define CCOR   0x00000004 /* Counter Clear-On-Read Mode Enable */

Definition at line 336 of file defBF527.h.

#define CROLL   0x00000002 /* Counter Roll-Over Enable */

Definition at line 335 of file defBF527.h.

#define DBF   0x00000200 /* Disable Broadcast Frame Reception */

Definition at line 173 of file defBF527.h.

#define DC   0x00080000 /* Deferral Check */

Definition at line 180 of file defBF527.h.

#define DRO   0x10000000 /* Disable Receive Own Frames (Half-Duplex Mode) */

Definition at line 192 of file defBF527.h.

#define DRTY   0x00400000 /* Disable TX Retry On Collision */

Definition at line 186 of file defBF527.h.

#define DTXCRC   0x00040000 /* Disable Automatic TX CRC Generation */

Definition at line 179 of file defBF527.h.

#define DTXPAD   0x00020000 /* Disable Automatic TX Padding */

Definition at line 178 of file defBF527.h.

#define EMAC_ADDRHI   0xFFC03008 /* Address High (16 MSBs) Register */

Definition at line 17 of file defBF527.h.

#define EMAC_ADDRLO   0xFFC03004 /* Address Low (32 LSBs) Register */

Definition at line 16 of file defBF527.h.

#define EMAC_FLC   0xFFC0301C /* Flow Control Register */

Definition at line 22 of file defBF527.h.

#define EMAC_HASHHI   0xFFC03010 /* Multicast Hash Table High (Bins 63-32) Register */

Definition at line 19 of file defBF527.h.

#define EMAC_HASHLO   0xFFC0300C /* Multicast Hash Table Low (Bins 31-0) Register */

Definition at line 18 of file defBF527.h.

#define EMAC_MMC_CTL   0xFFC03080 /* MMC Counter Control Register */

Definition at line 44 of file defBF527.h.

#define EMAC_MMC_RIRQE   0xFFC03088 /* MMC RX Interrupt Enables Register */

Definition at line 46 of file defBF527.h.

#define EMAC_MMC_RIRQS   0xFFC03084 /* MMC RX Interrupt Status Register */

Definition at line 45 of file defBF527.h.

#define EMAC_MMC_TIRQE   0xFFC03090 /* MMC TX Interrupt Enables Register */

Definition at line 48 of file defBF527.h.

#define EMAC_MMC_TIRQS   0xFFC0308C /* MMC TX Interrupt Status Register */

Definition at line 47 of file defBF527.h.

#define EMAC_OPMODE   0xFFC03000 /* Operating Mode Register */

Definition at line 15 of file defBF527.h.

#define EMAC_RX_IRQE   0xFFC03070 /* RX Frame Status Interrupt Enables Register */

Definition at line 39 of file defBF527.h.

#define EMAC_RX_STAT   0xFFC03068 /* RX Current Frame Status Register */

Definition at line 37 of file defBF527.h.

#define EMAC_RX_STKY   0xFFC0306C /* RX Sticky Frame Status Register */

Definition at line 38 of file defBF527.h.

#define EMAC_RXC_ALIGN   0xFFC03108 /* RX Alignment Error Count */

Definition at line 52 of file defBF527.h.

#define EMAC_RXC_ALLFRM   0xFFC03138 /* Overall RX Frame Count */

Definition at line 64 of file defBF527.h.

#define EMAC_RXC_ALLOCT   0xFFC0313C /* Overall RX Octet Count */

Definition at line 65 of file defBF527.h.

#define EMAC_RXC_BROAD   0xFFC0311C /* Broadcast RX Frame Count */

Definition at line 57 of file defBF527.h.

#define EMAC_RXC_DMAOVF   0xFFC03110 /* Internal MAC Sublayer Error RX Frame Count */

Definition at line 54 of file defBF527.h.

#define EMAC_RXC_EQ64   0xFFC03148 /* Good RX Frame Count - Byte Count x = 64 */

Definition at line 68 of file defBF527.h.

#define EMAC_RXC_FCS   0xFFC03104 /* RX Frame FCS Failure Count */

Definition at line 51 of file defBF527.h.

#define EMAC_RXC_GE1024   0xFFC0315C /* Good RX Frame Count - Byte Count x >= 1024 */

Definition at line 73 of file defBF527.h.

#define EMAC_RXC_LNERRI   0xFFC03120 /* RX Frame In Range Error Count */

Definition at line 58 of file defBF527.h.

#define EMAC_RXC_LNERRO   0xFFC03124 /* RX Frame Out Of Range Error Count */

Definition at line 59 of file defBF527.h.

#define EMAC_RXC_LONG   0xFFC03128 /* RX Frame Too Long Count */

Definition at line 60 of file defBF527.h.

#define EMAC_RXC_LT1024   0xFFC03158 /* Good RX Frame Count - Byte Count 512 <= x < 1024 */

Definition at line 72 of file defBF527.h.

#define EMAC_RXC_LT128   0xFFC0314C /* Good RX Frame Count - Byte Count 64 < x < 128 */

Definition at line 69 of file defBF527.h.

#define EMAC_RXC_LT256   0xFFC03150 /* Good RX Frame Count - Byte Count 128 <= x < 256 */

Definition at line 70 of file defBF527.h.

#define EMAC_RXC_LT512   0xFFC03154 /* Good RX Frame Count - Byte Count 256 <= x < 512 */

Definition at line 71 of file defBF527.h.

#define EMAC_RXC_MACCTL   0xFFC0312C /* MAC Control RX Frame Count */

Definition at line 61 of file defBF527.h.

#define EMAC_RXC_MULTI   0xFFC03118 /* Multicast RX Frame Count */

Definition at line 56 of file defBF527.h.

#define EMAC_RXC_OCTET   0xFFC0310C /* RX Octets Successfully Received Count */

Definition at line 53 of file defBF527.h.

#define EMAC_RXC_OK   0xFFC03100 /* RX Frame Successful Count */

Definition at line 50 of file defBF527.h.

#define EMAC_RXC_OPCODE   0xFFC03130 /* Unsupported Op-Code RX Frame Count */

Definition at line 62 of file defBF527.h.

#define EMAC_RXC_PAUSE   0xFFC03134 /* MAC Control Pause RX Frame Count */

Definition at line 63 of file defBF527.h.

#define EMAC_RXC_SHORT   0xFFC03144 /* RX Frame Fragment Count - Byte Count x < 64 */

Definition at line 67 of file defBF527.h.

#define EMAC_RXC_TYPED   0xFFC03140 /* Type/Length Consistent RX Frame Count */

Definition at line 66 of file defBF527.h.

#define EMAC_RXC_UNICST   0xFFC03114 /* Unicast RX Frame Count */

Definition at line 55 of file defBF527.h.

#define EMAC_STAADD   0xFFC03014 /* Station Management Address Register */

Definition at line 20 of file defBF527.h.

#define EMAC_STADAT   0xFFC03018 /* Station Management Data Register */

Definition at line 21 of file defBF527.h.

#define EMAC_SYSCTL   0xFFC03060 /* EMAC System Control Register */

Definition at line 35 of file defBF527.h.

#define EMAC_SYSTAT   0xFFC03064 /* EMAC System Status Register */

Definition at line 36 of file defBF527.h.

#define EMAC_TX_IRQE   0xFFC0307C /* TX Frame Status Interrupt Enables Register */

Definition at line 42 of file defBF527.h.

#define EMAC_TX_STAT   0xFFC03074 /* TX Current Frame Status Register */

Definition at line 40 of file defBF527.h.

#define EMAC_TX_STKY   0xFFC03078 /* TX Sticky Frame Status Register */

Definition at line 41 of file defBF527.h.

#define EMAC_TXC_1COL   0xFFC03184 /* TX Frames Successful After Single Collision Count */

Definition at line 76 of file defBF527.h.

#define EMAC_TXC_ABORT   0xFFC031D8 /* Total TX Frames Aborted Count */

Definition at line 97 of file defBF527.h.

#define EMAC_TXC_ALLFRM   0xFFC031B8 /* Overall TX Frame Count */

Definition at line 89 of file defBF527.h.

#define EMAC_TXC_ALLOCT   0xFFC031BC /* Overall TX Octet Count */

Definition at line 90 of file defBF527.h.

#define EMAC_TXC_BROAD   0xFFC031AC /* Broadcast TX Frame Count */

Definition at line 86 of file defBF527.h.

#define EMAC_TXC_CRSERR   0xFFC031A0 /* Carrier Sense Deasserted During TX Frame Count */

Definition at line 83 of file defBF527.h.

#define EMAC_TXC_DEFER   0xFFC03190 /* TX Frame Delayed Due To Busy Count */

Definition at line 79 of file defBF527.h.

#define EMAC_TXC_DMAUND   0xFFC0319C /* Internal MAC Sublayer Error TX Frame Count */

Definition at line 82 of file defBF527.h.

#define EMAC_TXC_EQ64   0xFFC031C0 /* Good TX Frame Count - Byte Count x = 64 */

Definition at line 91 of file defBF527.h.

#define EMAC_TXC_GE1024   0xFFC031D4 /* Good TX Frame Count - Byte Count x >= 1024 */

Definition at line 96 of file defBF527.h.

#define EMAC_TXC_GT1COL   0xFFC03188 /* TX Frames Successful After Multiple Collisions Count */

Definition at line 77 of file defBF527.h.

#define EMAC_TXC_LATECL   0xFFC03194 /* Late TX Collisions Count */

Definition at line 80 of file defBF527.h.

#define EMAC_TXC_LT1024   0xFFC031D0 /* Good TX Frame Count - Byte Count 512 <= x < 1024 */

Definition at line 95 of file defBF527.h.

#define EMAC_TXC_LT128   0xFFC031C4 /* Good TX Frame Count - Byte Count 64 < x < 128 */

Definition at line 92 of file defBF527.h.

#define EMAC_TXC_LT256   0xFFC031C8 /* Good TX Frame Count - Byte Count 128 <= x < 256 */

Definition at line 93 of file defBF527.h.

#define EMAC_TXC_LT512   0xFFC031CC /* Good TX Frame Count - Byte Count 256 <= x < 512 */

Definition at line 94 of file defBF527.h.

#define EMAC_TXC_MACCTL   0xFFC031B4 /* MAC Control TX Frame Count */

Definition at line 88 of file defBF527.h.

#define EMAC_TXC_MULTI   0xFFC031A8 /* Multicast TX Frame Count */

Definition at line 85 of file defBF527.h.

#define EMAC_TXC_OCTET   0xFFC0318C /* TX Octets Successfully Received Count */

Definition at line 78 of file defBF527.h.

#define EMAC_TXC_OK   0xFFC03180 /* TX Frame Successful Count */

Definition at line 75 of file defBF527.h.

#define EMAC_TXC_UNICST   0xFFC031A4 /* Unicast TX Frame Count */

Definition at line 84 of file defBF527.h.

#define EMAC_TXC_XS_COL   0xFFC03198 /* TX Frame Failed Due To Excessive Collisions Count */

Definition at line 81 of file defBF527.h.

#define EMAC_TXC_XS_DFR   0xFFC031B0 /* TX Frames With Excessive Deferral Count */

Definition at line 87 of file defBF527.h.

#define EMAC_VLAN1   0xFFC03020 /* VLAN1 Tag Register */

Definition at line 23 of file defBF527.h.

#define EMAC_VLAN2   0xFFC03024 /* VLAN2 Tag Register */

Definition at line 24 of file defBF527.h.

#define EMAC_WKUP_CTL   0xFFC0302C /* Wake-Up Control/Status Register */

Definition at line 25 of file defBF527.h.

#define EMAC_WKUP_FFCMD   0xFFC03040 /* Wake-Up Frame Filter Commands Register */

Definition at line 30 of file defBF527.h.

#define EMAC_WKUP_FFCRC0   0xFFC03048 /* Wake-Up Frame Filter 0,1 CRC-16 Register */

Definition at line 32 of file defBF527.h.

#define EMAC_WKUP_FFCRC1   0xFFC0304C /* Wake-Up Frame Filter 2,3 CRC-16 Register */

Definition at line 33 of file defBF527.h.

#define EMAC_WKUP_FFMSK0   0xFFC03030 /* Wake-Up Frame Filter 0 Byte Mask Register */

Definition at line 26 of file defBF527.h.

#define EMAC_WKUP_FFMSK1   0xFFC03034 /* Wake-Up Frame Filter 1 Byte Mask Register */

Definition at line 27 of file defBF527.h.

#define EMAC_WKUP_FFMSK2   0xFFC03038 /* Wake-Up Frame Filter 2 Byte Mask Register */

Definition at line 28 of file defBF527.h.

#define EMAC_WKUP_FFMSK3   0xFFC0303C /* Wake-Up Frame Filter 3 Byte Mask Register */

Definition at line 29 of file defBF527.h.

#define EMAC_WKUP_FFOFF   0xFFC03044 /* Wake-Up Frame Filter Offsets Register */

Definition at line 31 of file defBF527.h.

#define FDMODE   0x04000000 /* Duplex Mode Enable (Full/Half*) */

Definition at line 190 of file defBF527.h.

#define FLCBUSY   0x00000001 /* Send Flow Ctrl Frame / Flow Ctrl Busy Status */

Definition at line 212 of file defBF527.h.

#define FLCE   0x00000002 /* Flow Control Enable */

Definition at line 213 of file defBF527.h.

#define FLCPAUSE   0xFFFF0000 /* Pause Time */

Definition at line 216 of file defBF527.h.

#define FrameCheckSequenceErrors   EMAC_RXC_FCS /* RX Frame FCS Failure Count */

Definition at line 102 of file defBF527.h.

#define FramesAbortedDueToXSColls   EMAC_TXC_XS_COL /* TX Frame Failed Due To Excessive Collisions Count */

Definition at line 132 of file defBF527.h.

#define FramesLen1024_MaxReceived   EMAC_RXC_GE1024 /* Good RX Frame Count - Byte Count x >= 1024 */

Definition at line 124 of file defBF527.h.

#define FramesLen1024_MaxTransmitted   EMAC_TXC_GE1024 /* Good TX Frame Count - Byte Count x >= 1024 */

Definition at line 147 of file defBF527.h.

#define FramesLen128_255Received   EMAC_RXC_LT256 /* Good RX Frame Count - Byte Count 128 <= x < 256 */

Definition at line 121 of file defBF527.h.

#define FramesLen128_255Transmitted   EMAC_TXC_LT256 /* Good TX Frame Count - Byte Count 128 <= x < 256 */

Definition at line 144 of file defBF527.h.

#define FramesLen256_511Received   EMAC_RXC_LT512 /* Good RX Frame Count - Byte Count 256 <= x < 512 */

Definition at line 122 of file defBF527.h.

#define FramesLen256_511Transmitted   EMAC_TXC_LT512 /* Good TX Frame Count - Byte Count 256 <= x < 512 */

Definition at line 145 of file defBF527.h.

#define FramesLen512_1023Received   EMAC_RXC_LT1024 /* Good RX Frame Count - Byte Count 512 <= x < 1024 */

Definition at line 123 of file defBF527.h.

#define FramesLen512_1023Transmitted   EMAC_TXC_LT1024 /* Good TX Frame Count - Byte Count 512 <= x < 1024 */

Definition at line 146 of file defBF527.h.

#define FramesLen65_127Received   EMAC_RXC_LT128 /* Good RX Frame Count - Byte Count 64 < x < 128 */

Definition at line 120 of file defBF527.h.

#define FramesLen65_127Transmitted   EMAC_TXC_LT128 /* Good TX Frame Count - Byte Count 64 < x < 128 */

Definition at line 143 of file defBF527.h.

#define FramesLenEq64Received   EMAC_RXC_EQ64 /* Good RX Frame Count - Byte Count x = 64 */

Definition at line 119 of file defBF527.h.

#define FramesLenEq64Transmitted   EMAC_TXC_EQ64 /* Good TX Frame Count - Byte Count x = 64 */

Definition at line 142 of file defBF527.h.

#define FramesLenLt64Received   EMAC_RXC_SHORT /* RX Frame Fragment Count - Byte Count x < 64 */

Definition at line 118 of file defBF527.h.

#define FramesLostDueToIntMACRcvError   EMAC_RXC_DMAOVF /* Internal MAC Sublayer Error RX Frame Count */

Definition at line 105 of file defBF527.h.

#define FramesLostDueToIntMacXmitError   EMAC_TXC_DMAUND /* Internal MAC Sublayer Error TX Frame Count */

Definition at line 133 of file defBF527.h.

#define FramesReceivedAll   EMAC_RXC_ALLFRM /* Overall RX Frame Count */

Definition at line 115 of file defBF527.h.

#define FramesReceivedOK   EMAC_RXC_OK /* RX Frame Successful Count */

Definition at line 101 of file defBF527.h.

#define FramesTransmittedAll   EMAC_TXC_ALLFRM /* Overall TX Frame Count */

Definition at line 140 of file defBF527.h.

#define FramesTransmittedOK   EMAC_TXC_OK /* TX Frame Successful Count */

Definition at line 126 of file defBF527.h.

#define FramesWithDeferredXmissions   EMAC_TXC_DEFER /* TX Frame Delayed Due To Busy Count */

Definition at line 130 of file defBF527.h.

#define FramesWithExcessiveDeferral   EMAC_TXC_XS_DFR /* TX Frames With Excessive Deferral Count */

Definition at line 138 of file defBF527.h.

#define FrameTooLongErrors   EMAC_RXC_LONG /* RX Frame Too Long Count */

Definition at line 111 of file defBF527.h.

#define GUWKE   0x00000008 /* Global Unicast Wake Enable */

Definition at line 225 of file defBF527.h.

#define HM   0x00000020 /* Hash Filter Multicast Address */

Definition at line 169 of file defBF527.h.

#define HU   0x00000010 /* Hash Filter Unicast Address */

Definition at line 168 of file defBF527.h.

#define IFE   0x00000100 /* Inverse Filtering Enable */

Definition at line 172 of file defBF527.h.

#define InRangeLengthErrors   EMAC_RXC_LNERRI /* RX Frame In Range Error Count */

Definition at line 109 of file defBF527.h.

#define LateCollisions   EMAC_TXC_LATECL /* Late TX Collisions Count */

Definition at line 131 of file defBF527.h.

#define LB   0x08000000 /* Internal Loopback Enable */

Definition at line 191 of file defBF527.h.

#define LCTRE   0x00800000 /* Enable TX Retry On Late Collision */

Definition at line 187 of file defBF527.h.

#define MACControlFramesReceived   EMAC_RXC_MACCTL /* MAC Control RX Frame Count */

Definition at line 112 of file defBF527.h.

#define MACControlFramesTransmitted   EMAC_TXC_MACCTL /* MAC Control TX Frame Count */

Definition at line 139 of file defBF527.h.

#define MDCDIV   0x00003F00 /* SCLK:MDC Clock Divisor [MDC=SCLK/(2*(N+1))] */

Definition at line 276 of file defBF527.h.

#define MMCE   0x00000008 /* Enable MMC Counter Operation */

Definition at line 337 of file defBF527.h.

#define MMCINT   0x00000002 /* MMC Counter Interrupt Status */

Definition at line 283 of file defBF527.h.

#define MPKE   0x00000002 /* Magic Packet Enable */

Definition at line 223 of file defBF527.h.

#define MPKS   0x00000020 /* Magic Packet Received Status */

Definition at line 226 of file defBF527.h.

#define MulticastFramesReceivedOK   EMAC_RXC_MULTI /* Multicast RX Frame Count */

Definition at line 107 of file defBF527.h.

#define MulticastFramesXmittedOK   EMAC_TXC_MULTI /* Multicast TX Frame Count */

Definition at line 136 of file defBF527.h.

#define MultipleCollisionFrames   EMAC_TXC_GT1COL /* TX Frames Successful After Multiple Collisions Count */

Definition at line 128 of file defBF527.h.

#define OctetsReceivedAll   EMAC_RXC_ALLOCT /* Overall RX Octet Count */

Definition at line 116 of file defBF527.h.

#define OctetsReceivedOK   EMAC_RXC_OCTET /* RX Octets Successfully Received Count */

Definition at line 104 of file defBF527.h.

#define OctetsTransmittedAll   EMAC_TXC_ALLOCT /* Overall TX Octet Count */

Definition at line 141 of file defBF527.h.

#define OctetsTransmittedOK   EMAC_TXC_OCTET /* TX Octets Successfully Received Count */

Definition at line 129 of file defBF527.h.

#define OutOfRangeLengthField   EMAC_RXC_LNERRO /* RX Frame Out Of Range Error Count */

Definition at line 110 of file defBF527.h.

#define PAM   0x00000040 /* Pass-All-Multicast Mode Enable */

Definition at line 170 of file defBF527.h.

#define PAUSEMACCtrlFramesReceived   EMAC_RXC_PAUSE /* MAC Control Pause RX Frame Count */

Definition at line 114 of file defBF527.h.

#define PBF   0x00000400 /* Pass Bad Frames Enable */

Definition at line 174 of file defBF527.h.

#define PCF   0x00000004 /* Pass Control Frames */

Definition at line 214 of file defBF527.h.

#define PHYAD   0x0000F800 /* PHY Device Address */

Definition at line 201 of file defBF527.h.

#define PHYIE   0x00000001 /* PHY_INT Interrupt Enable */

Definition at line 272 of file defBF527.h.

#define PHYINT   0x00000001 /* PHY_INT Interrupt Status */

Definition at line 282 of file defBF527.h.

#define PR   0x00000080 /* Promiscuous Mode Enable */

Definition at line 171 of file defBF527.h.

#define PSF   0x00000800 /* Pass Short Frames Enable */

Definition at line 175 of file defBF527.h.

#define RAF   0x00001000 /* Receive-All Mode */

Definition at line 176 of file defBF527.h.

#define RE   0x00000001 /* Receiver Enable */

Definition at line 166 of file defBF527.h.

#define REGAD   0x000007C0 /* STA Register Address */

Definition at line 200 of file defBF527.h.

#define RMII   0x01000000 /* RMII/MII* Mode */

Definition at line 188 of file defBF527.h.

#define RMII_10   0x02000000 /* Speed Select for RMII Port (10MBit/100MBit*) */

Definition at line 189 of file defBF527.h.

#define RSTC   0x00000001 /* Reset All Counters */

Definition at line 334 of file defBF527.h.

#define RWKE   0x00000004 /* Remote Wake-Up Frame Enable */

Definition at line 224 of file defBF527.h.

#define RWKS   0x00000F00 /* Wake-Up Frame Received Status, Filters 3:0 */

Definition at line 227 of file defBF527.h.

#define RX_ACCEPT   0x80000000 /* RX Frame Accepted Indicator */

Definition at line 313 of file defBF527.h.

#define RX_ADDR   0x00080000 /* RX Frame Address Filter Failed Error */

Definition at line 301 of file defBF527.h.

#define RX_ALIGN   0x00008000 /* RX Frame Alignment Error */

Definition at line 297 of file defBF527.h.

#define RX_ALIGN_CNT   0x00000004 /* RX Frames With Alignment Errors */

Definition at line 342 of file defBF527.h.

#define RX_ALLF_CNT   0x00004000 /* All RX Frames Received */

Definition at line 354 of file defBF527.h.

#define RX_ALLO_CNT   0x00008000 /* All RX Octets Received */

Definition at line 355 of file defBF527.h.

#define RX_BROAD   0x02000000 /* RX Broadcast Frame Indicator */

Definition at line 307 of file defBF527.h.

#define RX_BROAD_CNT   0x00000080 /* Broadcast RX Frames Received OK */

Definition at line 347 of file defBF527.h.

#define RX_COMP   0x00001000 /* RX Frame Complete */

Definition at line 294 of file defBF527.h.

#define RX_CRC   0x00010000 /* RX Frame CRC Error */

Definition at line 298 of file defBF527.h.

#define RX_CTL   0x04000000 /* RX Control Frame Indicator */

Definition at line 308 of file defBF527.h.

#define RX_DMAO   0x00100000 /* RX Frame DMA Overrun Error */

Definition at line 302 of file defBF527.h.

#define RX_EQ64_CNT   0x00040000 /* 64-Byte RX Frames Received */

Definition at line 358 of file defBF527.h.

#define RX_FCS_CNT   0x00000002 /* RX Frames W/Frame Check Sequence Errors */

Definition at line 341 of file defBF527.h.

#define RX_FRAG   0x00040000 /* RX Frame Fragment Error */

Definition at line 300 of file defBF527.h.

#define RX_FRLEN   0x000007FF /* Frame Length In Bytes */

Definition at line 293 of file defBF527.h.

#define RX_GE1024_CNT   0x00800000 /* 1024-Max-Byte RX Frames Received */

Definition at line 363 of file defBF527.h.

#define RX_IRL_CNT   0x00000100 /* RX Frames With In-Range Length Errors */

Definition at line 348 of file defBF527.h.

#define RX_LATE   0x00400000 /* RX Frame Late Collision Error */

Definition at line 304 of file defBF527.h.

#define RX_LEN   0x00020000 /* RX Frame Length Error */

Definition at line 299 of file defBF527.h.

#define RX_LONG   0x00004000 /* RX Frame Too Long Error */

Definition at line 296 of file defBF527.h.

#define RX_LONG_CNT   0x00000400 /* RX Frames With Frame Too Long Errors */

Definition at line 350 of file defBF527.h.

#define RX_LOST_CNT   0x00000010 /* RX Frames Lost Due To Internal MAC RX Error */

Definition at line 344 of file defBF527.h.

#define RX_LT1024_CNT   0x00400000 /* 512-1023-Byte RX Frames Received */

Definition at line 362 of file defBF527.h.

#define RX_LT128_CNT   0x00080000 /* 65-127-Byte RX Frames Received */

Definition at line 359 of file defBF527.h.

#define RX_LT256_CNT   0x00100000 /* 128-255-Byte RX Frames Received */

Definition at line 360 of file defBF527.h.

#define RX_LT512_CNT   0x00200000 /* 256-511-Byte RX Frames Received */

Definition at line 361 of file defBF527.h.

#define RX_MACCTL_CNT   0x00000800 /* MAC Control RX Frames Received */

Definition at line 351 of file defBF527.h.

#define RX_MULTI   0x01000000 /* RX Multicast Frame Indicator */

Definition at line 306 of file defBF527.h.

#define RX_MULTI_CNT   0x00000040 /* Multicast RX Frames Received OK */

Definition at line 346 of file defBF527.h.

#define RX_OCTET_CNT   0x00000008 /* RX Octets Received OK */

Definition at line 343 of file defBF527.h.

#define RX_OK   0x00002000 /* RX Frame Received With No Errors */

Definition at line 295 of file defBF527.h.

#define RX_OK_CNT   0x00000001 /* RX Frames Received With No Errors */

Definition at line 340 of file defBF527.h.

#define RX_OPCODE_CTL   0x00001000 /* Unsupported Op-Code RX Frames Received */

Definition at line 352 of file defBF527.h.

#define RX_ORL_CNT   0x00000200 /* RX Frames With Out-Of-Range Length Errors */

Definition at line 349 of file defBF527.h.

#define RX_PAUSE_CNT   0x00002000 /* PAUSEMAC Control RX Frames Received */

Definition at line 353 of file defBF527.h.

#define RX_PHY   0x00200000 /* RX Frame PHY Error */

Definition at line 303 of file defBF527.h.

#define RX_RANGE   0x00800000 /* RX Frame Length Field Out of Range Error */

Definition at line 305 of file defBF527.h.

#define RX_SHORT_CNT   0x00020000 /* RX Frame Fragments (< 64 Bytes) Received */

Definition at line 357 of file defBF527.h.

#define RX_TYPE   0x10000000 /* RX Typed Frame Indicator */

Definition at line 310 of file defBF527.h.

#define RX_TYPED_CNT   0x00010000 /* Typed RX Frames Received */

Definition at line 356 of file defBF527.h.

#define RX_UCTL   0x08000000 /* Unsupported RX Control Frame Indicator */

Definition at line 309 of file defBF527.h.

#define RX_UNI_CNT   0x00000020 /* Unicast RX Frames Received OK */

Definition at line 345 of file defBF527.h.

#define RX_VLAN1   0x20000000 /* RX VLAN1 Frame Indicator */

Definition at line 311 of file defBF527.h.

#define RX_VLAN2   0x40000000 /* RX VLAN2 Frame Indicator */

Definition at line 312 of file defBF527.h.

#define RXCKS   0x00000004 /* Enable RX Frame TCP/UDP Checksum Computation */

Definition at line 274 of file defBF527.h.

#define RXDMAERR   0x00000020 /* RX DMA Direction Error Status */

Definition at line 287 of file defBF527.h.

#define RXDWA   0x00000002 /* Receive Frame DMA Word Alignment (Odd/Even*) */

Definition at line 273 of file defBF527.h.

#define RXFSINT   0x00000004 /* RX Frame-Status Interrupt Status */

Definition at line 284 of file defBF527.h.

#define SET_FLCPAUSE (   x)    (((x)&0xFFFF)<< 16) /* Set Pause Time */

Definition at line 218 of file defBF527.h.

#define SET_MDCDIV (   x)    (((x)&0x3F)<< 8) /* Set MDC Clock Divisor */

Definition at line 278 of file defBF527.h.

#define SET_PHYAD (   x)    (((x)&0x1F)<< 11 ) /* Set PHY Device Address */

Definition at line 204 of file defBF527.h.

#define SET_REGAD (   x)    (((x)&0x1F)<< 6 ) /* Set STA Register Address */

Definition at line 203 of file defBF527.h.

#define SET_WF0_CRC (   x)    (((x)&0xFFFF)<< 0 ) /* Set Wake-Up Filter 0 Target CRC */

Definition at line 259 of file defBF527.h.

#define SET_WF0_OFF (   x)    (((x)&0xFF)<< 0 ) /* Set Wake-Up Filter 0 Byte Offset */

Definition at line 247 of file defBF527.h.

#define SET_WF1_CRC (   x)    (((x)&0xFFFF)<< 16 ) /* Set Wake-Up Filter 1 Target CRC */

Definition at line 260 of file defBF527.h.

#define SET_WF1_OFF (   x)    (((x)&0xFF)<< 8 ) /* Set Wake-Up Filter 1 Byte Offset */

Definition at line 248 of file defBF527.h.

#define SET_WF2_CRC (   x)    (((x)&0xFFFF)<< 0 ) /* Set Wake-Up Filter 2 Target CRC */

Definition at line 267 of file defBF527.h.

#define SET_WF2_OFF (   x)    (((x)&0xFF)<< 16 ) /* Set Wake-Up Filter 2 Byte Offset */

Definition at line 249 of file defBF527.h.

#define SET_WF3_CRC (   x)    (((x)&0xFFFF)<< 16 ) /* Set Wake-Up Filter 3 Target CRC */

Definition at line 268 of file defBF527.h.

#define SET_WF3_OFF (   x)    (((x)&0xFF)<< 24 ) /* Set Wake-Up Filter 3 Byte Offset */

Definition at line 250 of file defBF527.h.

#define SET_WF_OFFS (   x0,
  x1,
  x2,
  x3 
)    (SET_WF0_OFF((x0))|SET_WF1_OFF((x1))|SET_WF2_OFF((x2))|SET_WF3_OFF((x3)))

Definition at line 252 of file defBF527.h.

#define SingleCollisionFrames   EMAC_TXC_1COL /* TX Frames Successful After Single Collision Count */

Definition at line 127 of file defBF527.h.

#define STABUSY   0x00000001 /* Initiate Station Mgt Reg Access / STA Busy Stat */

Definition at line 196 of file defBF527.h.

#define STADATA   0x0000FFFF /* Station Management Data */

Definition at line 208 of file defBF527.h.

#define STADISPRE   0x00000004 /* Disable Preamble Generation */

Definition at line 198 of file defBF527.h.

#define STAIE   0x00000008 /* Station Mgt. Transfer Done Interrupt Enable */

Definition at line 199 of file defBF527.h.

#define STAOP   0x00000002 /* Station Management Operation Code (Write/Read*) */

Definition at line 197 of file defBF527.h.

#define STMDONE   0x00000080 /* Station Mgt. Transfer Done Interrupt Status */

Definition at line 289 of file defBF527.h.

#define TE   0x00010000 /* Transmitter Enable */

Definition at line 177 of file defBF527.h.

#define TX_ABORT_CNT   0x00400000 /* TX Frames Aborted */

Definition at line 389 of file defBF527.h.

#define TX_ABORTC_CNT   0x00000040 /* TX Frames Aborted Due To Excess Collisions */

Definition at line 373 of file defBF527.h.

#define TX_ALLF_CNT   0x00004000 /* All TX Frames Sent */

Definition at line 381 of file defBF527.h.

#define TX_ALLO_CNT   0x00008000 /* All TX Octets Sent */

Definition at line 382 of file defBF527.h.

#define TX_BROAD   0x00000040 /* TX Broadcast Frame Indicator */

Definition at line 324 of file defBF527.h.

#define TX_BROAD_CNT   0x00000800 /* Broadcast TX Frames Sent */

Definition at line 378 of file defBF527.h.

#define TX_CCNT   0x00000F00 /* TX Frame Collision Count */

Definition at line 326 of file defBF527.h.

#define TX_COMP   0x00000001 /* TX Frame Complete */

Definition at line 317 of file defBF527.h.

#define TX_CRS   0x00002000 /* TX Frame Carrier Sense Not Asserted Error */

Definition at line 328 of file defBF527.h.

#define TX_CRS_CNT   0x00000100 /* TX Frames With Carrier Sense Errors */

Definition at line 375 of file defBF527.h.

#define TX_DEFER   0x00001000 /* TX Frame Deferred Indicator */

Definition at line 327 of file defBF527.h.

#define TX_DEFER_CNT   0x00000010 /* TX Frames With Deferred Transmission */

Definition at line 371 of file defBF527.h.

#define TX_DMAU   0x00000010 /* TX Frame DMA Underrun Error (STAT) */

Definition at line 321 of file defBF527.h.

#define TX_ECOLL   0x00000004 /* TX Frame Excessive Collision Error */

Definition at line 319 of file defBF527.h.

#define TX_EDEFER   0x00000020 /* TX Frame Excessive Deferral Error */

Definition at line 323 of file defBF527.h.

#define TX_EQ64_CNT   0x00010000 /* 64-Byte TX Frames Sent */

Definition at line 383 of file defBF527.h.

#define TX_EXDEF_CTL   0x00001000 /* TX Frames With Excessive Deferral */

Definition at line 379 of file defBF527.h.

#define TX_FRLEN   0x07FF0000 /* TX Frame Length (Bytes) */

Definition at line 331 of file defBF527.h.

#define TX_GE1024_CNT   0x00200000 /* 1024-Max-Byte TX Frames Sent */

Definition at line 388 of file defBF527.h.

#define TX_LATE   0x00000008 /* TX Frame Late Collision Error */

Definition at line 320 of file defBF527.h.

#define TX_LATE_CNT   0x00000020 /* TX Frames With Late Collisions */

Definition at line 372 of file defBF527.h.

#define TX_LOSS   0x00004000 /* TX Frame Carrier Lost During TX Error */

Definition at line 329 of file defBF527.h.

#define TX_LOST_CNT   0x00000080 /* TX Frames Lost Due To Internal MAC TX Error */

Definition at line 374 of file defBF527.h.

#define TX_LT1024_CNT   0x00100000 /* 512-1023-Byte TX Frames Sent */

Definition at line 387 of file defBF527.h.

#define TX_LT128_CNT   0x00020000 /* 65-127-Byte TX Frames Sent */

Definition at line 384 of file defBF527.h.

#define TX_LT256_CNT   0x00040000 /* 128-255-Byte TX Frames Sent */

Definition at line 385 of file defBF527.h.

#define TX_LT512_CNT   0x00080000 /* 256-511-Byte TX Frames Sent */

Definition at line 386 of file defBF527.h.

#define TX_MACCTL_CNT   0x00002000 /* MAC Control TX Frames Sent */

Definition at line 380 of file defBF527.h.

#define TX_MACE   0x00000010 /* Internal MAC Error Detected (STKY and IRQE) */

Definition at line 322 of file defBF527.h.

#define TX_MCOLL_CNT   0x00000004 /* TX Frames With Multiple Collisions */

Definition at line 369 of file defBF527.h.

#define TX_MULTI   0x00000080 /* TX Multicast Frame Indicator */

Definition at line 325 of file defBF527.h.

#define TX_MULTI_CNT   0x00000400 /* Multicast TX Frames Sent */

Definition at line 377 of file defBF527.h.

#define TX_OCTET_CNT   0x00000008 /* TX Octets Sent OK */

Definition at line 370 of file defBF527.h.

#define TX_OK   0x00000002 /* TX Frame Sent With No Errors */

Definition at line 318 of file defBF527.h.

#define TX_OK_CNT   0x00000001 /* TX Frames Sent OK */

Definition at line 367 of file defBF527.h.

#define TX_RETRY   0x00008000 /* TX Frame Successful After Retry */

Definition at line 330 of file defBF527.h.

#define TX_SCOLL_CNT   0x00000002 /* TX Frames With Single Collisions */

Definition at line 368 of file defBF527.h.

#define TX_UNI_CNT   0x00000200 /* Unicast TX Frames Sent */

Definition at line 376 of file defBF527.h.

#define TxAbortedFrames   EMAC_TXC_ABORT /* Total TX Frames Aborted Count */

Definition at line 148 of file defBF527.h.

#define TXDMAERR   0x00000040 /* TX DMA Direction Error Status */

Definition at line 288 of file defBF527.h.

#define TXDWA   0x00000010 /* Transmit Frame DMA Word Alignment (Odd/Even*) */

Definition at line 275 of file defBF527.h.

#define TXFSINT   0x00000008 /* TX Frame-Status Interrupt Status */

Definition at line 285 of file defBF527.h.

#define TypedFramesReceived   EMAC_RXC_TYPED /* Type/Length Consistent RX Frame Count */

Definition at line 117 of file defBF527.h.

#define UnicastFramesReceivedOK   EMAC_RXC_UNICST /* Unicast RX Frame Count */

Definition at line 106 of file defBF527.h.

#define UnicastFramesXmittedOK   EMAC_TXC_UNICST /* Unicast TX Frame Count */

Definition at line 135 of file defBF527.h.

#define UnsupportedOpcodesReceived   EMAC_RXC_OPCODE /* Unsupported Op-Code RX Frame Count */

Definition at line 113 of file defBF527.h.

#define WAKEDET   0x00000010 /* Wake-Up Detected Status */

Definition at line 286 of file defBF527.h.

#define WF0_CRC   0x0000FFFF /* Wake-Up Filter 0 Pattern CRC */

Definition at line 256 of file defBF527.h.

#define WF0_E   0x00000001 /* Enable Wake-Up Filter 0 */

Definition at line 231 of file defBF527.h.

#define WF0_OFF   0x000000FF /* Wake-Up Filter 0 Pattern Offset */

Definition at line 242 of file defBF527.h.

#define WF0_T   0x00000008 /* Wake-Up Filter 0 Addr Type (Multicast/Unicast*) */

Definition at line 232 of file defBF527.h.

#define WF1_CRC   0xFFFF0000 /* Wake-Up Filter 1 Pattern CRC */

Definition at line 257 of file defBF527.h.

#define WF1_E   0x00000100 /* Enable Wake-Up Filter 1 */

Definition at line 233 of file defBF527.h.

#define WF1_OFF   0x0000FF00 /* Wake-Up Filter 1 Pattern Offset */

Definition at line 243 of file defBF527.h.

#define WF1_T   0x00000800 /* Wake-Up Filter 1 Addr Type (Multicast/Unicast*) */

Definition at line 234 of file defBF527.h.

#define WF2_CRC   0x0000FFFF /* Wake-Up Filter 2 Pattern CRC */

Definition at line 264 of file defBF527.h.

#define WF2_E   0x00010000 /* Enable Wake-Up Filter 2 */

Definition at line 235 of file defBF527.h.

#define WF2_OFF   0x00FF0000 /* Wake-Up Filter 2 Pattern Offset */

Definition at line 244 of file defBF527.h.

#define WF2_T   0x00080000 /* Wake-Up Filter 2 Addr Type (Multicast/Unicast*) */

Definition at line 236 of file defBF527.h.

#define WF3_CRC   0xFFFF0000 /* Wake-Up Filter 3 Pattern CRC */

Definition at line 265 of file defBF527.h.

#define WF3_E   0x01000000 /* Enable Wake-Up Filter 3 */

Definition at line 237 of file defBF527.h.

#define WF3_OFF   0xFF000000 /* Wake-Up Filter 3 Pattern Offset */

Definition at line 245 of file defBF527.h.

#define WF3_T   0x08000000 /* Wake-Up Filter 3 Addr Type (Multicast/Unicast*) */

Definition at line 238 of file defBF527.h.