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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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| #define BLKCMP0 0x50 |
Definition at line 44 of file dm355_ccdc_regs.h.
| #define BLKCMP1 0x54 |
Definition at line 45 of file dm355_ccdc_regs.h.
| #define BMGGAIN 0x68 |
Definition at line 50 of file dm355_ccdc_regs.h.
| #define CCDC_ADP_INIT_MASK 0x1FFF |
Definition at line 251 of file dm355_ccdc_regs.h.
| #define CCDC_ADP_LINE_MASK 3 |
Definition at line 253 of file dm355_ccdc_regs.h.
| #define CCDC_ADP_LINE_SHIFT 13 |
Definition at line 252 of file dm355_ccdc_regs.h.
| #define CCDC_ALAW_ENABLE 1 |
Definition at line 155 of file dm355_ccdc_regs.h.
| #define CCDC_ALAW_GAMA_WD_MASK 7 |
Definition at line 156 of file dm355_ccdc_regs.h.
| #define CCDC_BLK_CLAMP_ENABLE (1 << 15) |
Definition at line 186 of file dm355_ccdc_regs.h.
| #define CCDC_BLK_COMP_GB_COMP_SHIFT 8 |
Definition at line 197 of file dm355_ccdc_regs.h.
| #define CCDC_BLK_COMP_GR_COMP_SHIFT 0 |
Definition at line 198 of file dm355_ccdc_regs.h.
| #define CCDC_BLK_COMP_MASK 0xFF |
Definition at line 196 of file dm355_ccdc_regs.h.
| #define CCDC_BLK_COMP_R_COMP_SHIFT 8 |
Definition at line 199 of file dm355_ccdc_regs.h.
| #define CCDC_BLK_DC_SUB_MASK 0x3FFF |
Definition at line 195 of file dm355_ccdc_regs.h.
| #define CCDC_BLK_SAMPLE_LN_MASK 3 |
Definition at line 189 of file dm355_ccdc_regs.h.
| #define CCDC_BLK_SAMPLE_LN_SHIFT 13 |
Definition at line 190 of file dm355_ccdc_regs.h.
| #define CCDC_BLK_SGAIN_MASK 0x1F |
Definition at line 187 of file dm355_ccdc_regs.h.
| #define CCDC_BLK_ST_PXL_MASK 0x1FFF |
Definition at line 188 of file dm355_ccdc_regs.h.
| #define CCDC_CCDCFG_EXTRG_DISABLE 0 |
Definition at line 120 of file dm355_ccdc_regs.h.
| #define CCDC_CCDCFG_EXTRG_SHIFT 10 |
Definition at line 169 of file dm355_ccdc_regs.h.
| #define CCDC_CCDCFG_FIDMD_LATCH_VSYNC 0 |
Definition at line 116 of file dm355_ccdc_regs.h.
| #define CCDC_CCDCFG_FIDMD_NO_LATCH_VSYNC (1 << 6) |
Definition at line 117 of file dm355_ccdc_regs.h.
| #define CCDC_CCDCFG_FIDMD_SHIFT 6 |
Definition at line 166 of file dm355_ccdc_regs.h.
| #define CCDC_CCDCFG_MSBINVI_SHIFT 13 |
Definition at line 170 of file dm355_ccdc_regs.h.
| #define CCDC_CCDCFG_TRGSEL_SHIFT 9 |
Definition at line 168 of file dm355_ccdc_regs.h.
| #define CCDC_CCDCFG_TRGSEL_WEN 0 |
Definition at line 119 of file dm355_ccdc_regs.h.
| #define CCDC_CCDCFG_WENLOG_AND 0 |
Definition at line 118 of file dm355_ccdc_regs.h.
| #define CCDC_CCDCFG_WENLOG_SHIFT 8 |
Definition at line 167 of file dm355_ccdc_regs.h.
| #define CCDC_CFA_MOSAIC 0 |
Definition at line 121 of file dm355_ccdc_regs.h.
| #define CCDC_CSC_COEF_DECIMAL_MASK 0x1f |
Definition at line 218 of file dm355_ccdc_regs.h.
| #define CCDC_CSC_COEF_INTEG_MASK 7 |
Definition at line 217 of file dm355_ccdc_regs.h.
| #define CCDC_CSC_COEF_INTEG_SHIFT 5 |
Definition at line 219 of file dm355_ccdc_regs.h.
| #define CCDC_CSC_DEC_MAX 32 |
Definition at line 222 of file dm355_ccdc_regs.h.
| #define CCDC_CSC_ENABLE 1 |
Definition at line 221 of file dm355_ccdc_regs.h.
| #define CCDC_CSCM_MSB_SHIFT 8 |
Definition at line 220 of file dm355_ccdc_regs.h.
| #define CCDC_DATA_PACK_ENABLE (1 << 11) |
Definition at line 204 of file dm355_ccdc_regs.h.
| #define CCDC_DATA_SZ_MASK 7 |
Definition at line 140 of file dm355_ccdc_regs.h.
| #define CCDC_DATA_SZ_SHIFT 8 |
Definition at line 141 of file dm355_ccdc_regs.h.
| #define CCDC_DATAOFST_H_SHIFT 0 |
Definition at line 126 of file dm355_ccdc_regs.h.
| #define CCDC_DATAOFST_MASK 0x0ff |
Definition at line 125 of file dm355_ccdc_regs.h.
| #define CCDC_DATAOFST_V_SHIFT 8 |
Definition at line 127 of file dm355_ccdc_regs.h.
| #define CCDC_DATAPOL_MASK 1 |
Definition at line 150 of file dm355_ccdc_regs.h.
| #define CCDC_DATAPOL_NORMAL 0 |
Definition at line 115 of file dm355_ccdc_regs.h.
| #define CCDC_DATAPOL_SHIFT 6 |
Definition at line 151 of file dm355_ccdc_regs.h.
| #define CCDC_DATASFT_MASK 7 |
Definition at line 230 of file dm355_ccdc_regs.h.
| #define CCDC_DATASFT_SHIFT 8 |
Definition at line 231 of file dm355_ccdc_regs.h.
| #define CCDC_DF_ENABLE 1 |
Definition at line 233 of file dm355_ccdc_regs.h.
| #define CCDC_DFCCTL_GDFCEN_MASK 1 |
Definition at line 256 of file dm355_ccdc_regs.h.
| #define CCDC_DFCCTL_VDFC_DISABLE (0 << 4) |
Definition at line 258 of file dm355_ccdc_regs.h.
| #define CCDC_DFCCTL_VDFCEN_MASK 1 |
Definition at line 257 of file dm355_ccdc_regs.h.
| #define CCDC_DFCCTL_VDFCEN_SHIFT 4 |
Definition at line 259 of file dm355_ccdc_regs.h.
| #define CCDC_DFCCTL_VDFCSL_MASK 3 |
Definition at line 260 of file dm355_ccdc_regs.h.
| #define CCDC_DFCCTL_VDFCSL_SHIFT 5 |
Definition at line 261 of file dm355_ccdc_regs.h.
| #define CCDC_DFCCTL_VDFCUDA_MASK 1 |
Definition at line 262 of file dm355_ccdc_regs.h.
| #define CCDC_DFCCTL_VDFCUDA_SHIFT 7 |
Definition at line 263 of file dm355_ccdc_regs.h.
| #define CCDC_DFCCTL_VDFLSFT_MASK 3 |
Definition at line 264 of file dm355_ccdc_regs.h.
| #define CCDC_DFCCTL_VDFLSFT_SHIFT 8 |
Definition at line 265 of file dm355_ccdc_regs.h.
| #define CCDC_DFCMEMCTL_DFCMARST_MASK 1 |
Definition at line 266 of file dm355_ccdc_regs.h.
| #define CCDC_DFCMEMCTL_DFCMARST_SHIFT 2 |
Definition at line 267 of file dm355_ccdc_regs.h.
| #define CCDC_DFCMEMCTL_DFCMWR_MASK 1 |
Definition at line 268 of file dm355_ccdc_regs.h.
| #define CCDC_DFCMEMCTL_DFCMWR_SHIFT 0 |
Definition at line 269 of file dm355_ccdc_regs.h.
| #define CCDC_DFCMEMCTL_INC_ADDR (0 << 2) |
Definition at line 270 of file dm355_ccdc_regs.h.
| #define CCDC_EXWEN_DISABLE 0 |
Definition at line 114 of file dm355_ccdc_regs.h.
| #define CCDC_EXWEN_MASK 1 |
Definition at line 144 of file dm355_ccdc_regs.h.
| #define CCDC_EXWEN_SHIFT 5 |
Definition at line 145 of file dm355_ccdc_regs.h.
| #define CCDC_FID_POL_MASK 1 |
Definition at line 131 of file dm355_ccdc_regs.h.
| #define CCDC_FID_POL_SHIFT 4 |
Definition at line 132 of file dm355_ccdc_regs.h.
| #define CCDC_FMT_HORZ_FMTLNH_MASK 0x1FFF |
Definition at line 205 of file dm355_ccdc_regs.h.
| #define CCDC_FMT_HORZ_FMTSPH_MASK 0x1FFF |
Definition at line 206 of file dm355_ccdc_regs.h.
| #define CCDC_FMT_HORZ_FMTSPH_SHIFT 16 |
Definition at line 207 of file dm355_ccdc_regs.h.
| #define CCDC_FMT_VERT_FMTLNV_MASK 0x1FFF |
Definition at line 208 of file dm355_ccdc_regs.h.
| #define CCDC_FMT_VERT_FMTSLV_MASK 0x1FFF |
Definition at line 209 of file dm355_ccdc_regs.h.
| #define CCDC_FMT_VERT_FMTSLV_SHIFT 16 |
Definition at line 210 of file dm355_ccdc_regs.h.
| #define CCDC_FMTCFG_ADDRINC_MASK 7 |
Definition at line 163 of file dm355_ccdc_regs.h.
| #define CCDC_FMTCFG_ADDRINC_SHIFT 8 |
Definition at line 164 of file dm355_ccdc_regs.h.
| #define CCDC_FMTCFG_FMTMODE_MASK 3 |
Definition at line 159 of file dm355_ccdc_regs.h.
| #define CCDC_FMTCFG_FMTMODE_SHIFT 1 |
Definition at line 160 of file dm355_ccdc_regs.h.
| #define CCDC_FMTCFG_LNUM_MASK 3 |
Definition at line 161 of file dm355_ccdc_regs.h.
| #define CCDC_FMTCFG_LNUM_SHIFT 4 |
Definition at line 162 of file dm355_ccdc_regs.h.
| #define CCDC_FMTHCNT_MASK 0x1FFF |
Definition at line 249 of file dm355_ccdc_regs.h.
| #define CCDC_FMTLNH_MASK 0x1FFF |
Definition at line 245 of file dm355_ccdc_regs.h.
| #define CCDC_FMTLNV_MASK 0x7FFF |
Definition at line 247 of file dm355_ccdc_regs.h.
| #define CCDC_FMTPGN_APTR_MASK 7 |
Definition at line 254 of file dm355_ccdc_regs.h.
| #define CCDC_FMTPLEN_P0_MASK 0xF |
Definition at line 235 of file dm355_ccdc_regs.h.
| #define CCDC_FMTPLEN_P0_SHIFT 0 |
Definition at line 239 of file dm355_ccdc_regs.h.
| #define CCDC_FMTPLEN_P1_MASK 0xF |
Definition at line 236 of file dm355_ccdc_regs.h.
| #define CCDC_FMTPLEN_P1_SHIFT 4 |
Definition at line 240 of file dm355_ccdc_regs.h.
| #define CCDC_FMTPLEN_P2_MASK 7 |
Definition at line 237 of file dm355_ccdc_regs.h.
| #define CCDC_FMTPLEN_P2_SHIFT 8 |
Definition at line 241 of file dm355_ccdc_regs.h.
| #define CCDC_FMTPLEN_P3_MASK 7 |
Definition at line 238 of file dm355_ccdc_regs.h.
| #define CCDC_FMTPLEN_P3_SHIFT 12 |
Definition at line 242 of file dm355_ccdc_regs.h.
| #define CCDC_FMTRLEN_MASK 0x1FFF |
Definition at line 248 of file dm355_ccdc_regs.h.
| #define CCDC_FMTSLV_MASK 0x1FFF |
Definition at line 246 of file dm355_ccdc_regs.h.
| #define CCDC_FMTSPH_MASK 0x1FFF |
Definition at line 244 of file dm355_ccdc_regs.h.
| #define CCDC_FPC_ENABLE (1 << 15) |
Definition at line 202 of file dm355_ccdc_regs.h.
| #define CCDC_FPC_FPC_NUM_MASK 0x7FFF |
Definition at line 203 of file dm355_ccdc_regs.h.
| #define CCDC_FRM_FMT_MASK 1 |
Definition at line 138 of file dm355_ccdc_regs.h.
| #define CCDC_FRM_FMT_SHIFT 7 |
Definition at line 139 of file dm355_ccdc_regs.h.
| #define CCDC_GAIN_MASK 0x7FF |
Definition at line 297 of file dm355_ccdc_regs.h.
| #define CCDC_GAMMAWD_CFA_MASK 1 |
Definition at line 128 of file dm355_ccdc_regs.h.
| #define CCDC_GAMMAWD_CFA_SHIFT 5 |
Definition at line 129 of file dm355_ccdc_regs.h.
| #define CCDC_GAMMAWD_INPUT_SHIFT 2 |
Definition at line 130 of file dm355_ccdc_regs.h.
| #define CCDC_HD_POL_MASK 1 |
Definition at line 133 of file dm355_ccdc_regs.h.
| #define CCDC_HD_POL_SHIFT 3 |
Definition at line 134 of file dm355_ccdc_regs.h.
| #define CCDC_HSIZE_FLIP_MASK 1 |
Definition at line 173 of file dm355_ccdc_regs.h.
| #define CCDC_HSIZE_FLIP_SHIFT 12 |
Definition at line 172 of file dm355_ccdc_regs.h.
| #define CCDC_HSIZE_VAL_MASK 0xFFF |
Definition at line 174 of file dm355_ccdc_regs.h.
| #define CCDC_INPUT_MODE_MASK 3 |
Definition at line 146 of file dm355_ccdc_regs.h.
| #define CCDC_INPUT_MODE_SHIFT 12 |
Definition at line 147 of file dm355_ccdc_regs.h.
| #define CCDC_LATCH_ON_VSYNC_DISABLE (1 << 15) |
Definition at line 200 of file dm355_ccdc_regs.h.
| #define CCDC_LATCH_ON_VSYNC_ENABLE (0 << 15) |
Definition at line 201 of file dm355_ccdc_regs.h.
| #define CCDC_LPF_ENABLE (1 << 14) |
Definition at line 154 of file dm355_ccdc_regs.h.
| #define CCDC_LPF_MASK 1 |
Definition at line 227 of file dm355_ccdc_regs.h.
| #define CCDC_LPF_SHIFT 14 |
Definition at line 228 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_CENTRE_MASK 0x3FFF |
Definition at line 293 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_COEF_MASK 0xff |
Definition at line 294 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_COEFL_SHIFT 0 |
Definition at line 295 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_COEFU_SHIFT 8 |
Definition at line 296 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_DISABLE 0 |
Definition at line 283 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_ENABLE 1 |
Definition at line 284 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_FRAC_MASK 0x3FFF |
Definition at line 292 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_FRAC_MASK_T1 0xFF |
Definition at line 290 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_GFMODE_MASK 3 |
Definition at line 281 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_GFMODE_SHIFT 4 |
Definition at line 282 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_GFTABLE_EPEL_SHIFT 8 |
Definition at line 277 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_GFTABLE_EPOL_SHIFT 12 |
Definition at line 279 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_GFTABLE_OPEL_SHIFT 10 |
Definition at line 278 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_GFTABLE_OPOL_SHIFT 14 |
Definition at line 280 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_GFTABLE_SEL_MASK 3 |
Definition at line 276 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_INT_MASK 3 |
Definition at line 291 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_MEMADDR_INCR (0 << 2) |
Definition at line 289 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_MEMADDR_RESET (1 << 2) |
Definition at line 288 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_TABLE1_SLC 0 |
Definition at line 285 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_TABLE2_SLC 1 |
Definition at line 286 of file dm355_ccdc_regs.h.
| #define CCDC_LSC_TABLE3_SLC 2 |
Definition at line 287 of file dm355_ccdc_regs.h.
| #define CCDC_LSCCFG_GFTINV_MASK 0xf |
Definition at line 274 of file dm355_ccdc_regs.h.
| #define CCDC_LSCCFG_GFTINV_SHIFT 4 |
Definition at line 275 of file dm355_ccdc_regs.h.
| #define CCDC_LSCCFG_GFTSF_MASK 7 |
Definition at line 272 of file dm355_ccdc_regs.h.
| #define CCDC_LSCCFG_GFTSF_SHIFT 1 |
Definition at line 273 of file dm355_ccdc_regs.h.
| #define CCDC_MED_FILT_THRESH 0x3FFF |
Definition at line 226 of file dm355_ccdc_regs.h.
| #define CCDC_MFILT1_SHIFT 10 |
Definition at line 224 of file dm355_ccdc_regs.h.
| #define CCDC_MFILT2_SHIFT 8 |
Definition at line 225 of file dm355_ccdc_regs.h.
| #define CCDC_NUM_LINE_CALC_MASK 3 |
Definition at line 192 of file dm355_ccdc_regs.h.
| #define CCDC_NUM_LINE_CALC_SHIFT 14 |
Definition at line 193 of file dm355_ccdc_regs.h.
| #define CCDC_NUM_LINES_VER 0x7FFF |
Definition at line 184 of file dm355_ccdc_regs.h.
| #define CCDC_NUM_PX_HOR_MASK 0x7FFF |
Definition at line 181 of file dm355_ccdc_regs.h.
| #define CCDC_OFFSET_MASK 0x3FF |
Definition at line 229 of file dm355_ccdc_regs.h.
| #define CCDC_PIX_FMT_MASK 3 |
Definition at line 148 of file dm355_ccdc_regs.h.
| #define CCDC_PIX_FMT_SHIFT 12 |
Definition at line 149 of file dm355_ccdc_regs.h.
| #define CCDC_RAW_IP_MODE 0 |
Definition at line 111 of file dm355_ccdc_regs.h.
| #define CCDC_REC656IF_BT656_EN 3 |
Definition at line 157 of file dm355_ccdc_regs.h.
| #define CCDC_REG_LAST DATAOFST |
Definition at line 106 of file dm355_ccdc_regs.h.
| #define CCDC_SDOFST_FIELD_INTERLEAVED 0x249 |
Definition at line 175 of file dm355_ccdc_regs.h.
| #define CCDC_SDOFST_INTERLACE_INVERSE 0x4B6D |
Definition at line 176 of file dm355_ccdc_regs.h.
| #define CCDC_SDOFST_INTERLACE_NORMAL 0x0B6D |
Definition at line 177 of file dm355_ccdc_regs.h.
| #define CCDC_SDOFST_PROGRESSIVE_INVERSE 0x4000 |
Definition at line 178 of file dm355_ccdc_regs.h.
| #define CCDC_SDOFST_PROGRESSIVE_NORMAL 0 |
Definition at line 179 of file dm355_ccdc_regs.h.
| #define CCDC_START_PX_HOR_MASK 0x7FFF |
Definition at line 180 of file dm355_ccdc_regs.h.
| #define CCDC_START_VER_ONE_MASK 0x7FFF |
Definition at line 182 of file dm355_ccdc_regs.h.
| #define CCDC_START_VER_TWO_MASK 0x7FFF |
Definition at line 183 of file dm355_ccdc_regs.h.
| #define CCDC_SYNCEN_VDHDEN_MASK (1 << 0) |
Definition at line 298 of file dm355_ccdc_regs.h.
| #define CCDC_SYNCEN_WEN_MASK (1 << 1) |
Definition at line 299 of file dm355_ccdc_regs.h.
| #define CCDC_SYNCEN_WEN_SHIFT 1 |
Definition at line 300 of file dm355_ccdc_regs.h.
| #define CCDC_VD_POL_MASK 1 |
Definition at line 135 of file dm355_ccdc_regs.h.
| #define CCDC_VD_POL_NEGATIVE (1 << 2) |
Definition at line 137 of file dm355_ccdc_regs.h.
| #define CCDC_VD_POL_SHIFT 2 |
Definition at line 136 of file dm355_ccdc_regs.h.
| #define CCDC_VDC_DFCVSAT_MASK 0x3fff |
Definition at line 124 of file dm355_ccdc_regs.h.
| #define CCDC_VDHDEN_ENABLE (1 << 16) |
Definition at line 153 of file dm355_ccdc_regs.h.
| #define CCDC_VDHDOUT_INPUT 0 |
Definition at line 112 of file dm355_ccdc_regs.h.
| #define CCDC_VDHDOUT_MASK 1 |
Definition at line 142 of file dm355_ccdc_regs.h.
| #define CCDC_VDHDOUT_SHIFT 0 |
Definition at line 143 of file dm355_ccdc_regs.h.
| #define CCDC_VP_OUT_HORZ_NUM_MASK 0x1FFF |
Definition at line 213 of file dm355_ccdc_regs.h.
| #define CCDC_VP_OUT_HORZ_NUM_SHIFT 4 |
Definition at line 214 of file dm355_ccdc_regs.h.
| #define CCDC_VP_OUT_HORZ_ST_MASK 0xF |
Definition at line 215 of file dm355_ccdc_regs.h.
| #define CCDC_VP_OUT_VERT_NUM_MASK 0x3FFF |
Definition at line 211 of file dm355_ccdc_regs.h.
| #define CCDC_VP_OUT_VERT_NUM_SHIFT 17 |
Definition at line 212 of file dm355_ccdc_regs.h.
| #define CCDC_WEN_ENABLE (1 << 1) |
Definition at line 152 of file dm355_ccdc_regs.h.
| #define CCDC_Y8POS_SHIFT 11 |
Definition at line 122 of file dm355_ccdc_regs.h.
| #define CCDC_YCINSWP_RAW (0 << 4) |
Definition at line 113 of file dm355_ccdc_regs.h.
| #define CCDCFG 0x88 |
Definition at line 58 of file dm355_ccdc_regs.h.
| #define CLAMP 0x44 |
Definition at line 41 of file dm355_ccdc_regs.h.
| #define COLPTN 0x4c |
Definition at line 43 of file dm355_ccdc_regs.h.
| #define CSCCTL 0x138 |
Definition at line 96 of file dm355_ccdc_regs.h.
| #define CSCM0 0x13c |
Definition at line 97 of file dm355_ccdc_regs.h.
| #define CSCM1 0x140 |
Definition at line 98 of file dm355_ccdc_regs.h.
| #define CSCM2 0x144 |
Definition at line 99 of file dm355_ccdc_regs.h.
| #define CSCM3 0x148 |
Definition at line 100 of file dm355_ccdc_regs.h.
| #define CSCM4 0x14c |
Definition at line 101 of file dm355_ccdc_regs.h.
| #define CSCM5 0x150 |
Definition at line 102 of file dm355_ccdc_regs.h.
| #define CSCM6 0x154 |
Definition at line 103 of file dm355_ccdc_regs.h.
| #define CSCM7 0x158 |
Definition at line 104 of file dm355_ccdc_regs.h.
| #define CULH 0x2c |
Definition at line 35 of file dm355_ccdc_regs.h.
| #define CULH_DEFAULT 0xFFFF |
Definition at line 304 of file dm355_ccdc_regs.h.
| #define CULV 0x30 |
Definition at line 36 of file dm355_ccdc_regs.h.
| #define CULV_DEFAULT 0xFF |
Definition at line 305 of file dm355_ccdc_regs.h.
| #define DATAOFST 0x15c |
Definition at line 105 of file dm355_ccdc_regs.h.
| #define DCSUB 0x48 |
Definition at line 42 of file dm355_ccdc_regs.h.
| #define DFCCTL 0x118 |
Definition at line 88 of file dm355_ccdc_regs.h.
| #define DFCMEM0 0x124 |
Definition at line 91 of file dm355_ccdc_regs.h.
| #define DFCMEM1 0x128 |
Definition at line 92 of file dm355_ccdc_regs.h.
| #define DFCMEM2 0x12c |
Definition at line 93 of file dm355_ccdc_regs.h.
| #define DFCMEM3 0x130 |
Definition at line 94 of file dm355_ccdc_regs.h.
| #define DFCMEM4 0x134 |
Definition at line 95 of file dm355_ccdc_regs.h.
| #define DFCMEMCTL 0x120 |
Definition at line 90 of file dm355_ccdc_regs.h.
| #define DFCVSAT 0x11c |
Definition at line 89 of file dm355_ccdc_regs.h.
| #define FMT_ADDR_PTR | ( | i | ) | (FMT_ADDR_PTR_B + (i * 4)) |
Definition at line 68 of file dm355_ccdc_regs.h.
| #define FMT_ADDR_PTR_B 0xac |
Definition at line 67 of file dm355_ccdc_regs.h.
| #define FMTCFG 0x8c |
Definition at line 59 of file dm355_ccdc_regs.h.
| #define FMTHCNT 0xa8 |
Definition at line 66 of file dm355_ccdc_regs.h.
| #define FMTLNH 0x98 |
Definition at line 62 of file dm355_ccdc_regs.h.
| #define FMTLNV 0xa0 |
Definition at line 64 of file dm355_ccdc_regs.h.
| #define FMTPGM_AP0 0xd4 |
Definition at line 71 of file dm355_ccdc_regs.h.
| #define FMTPGM_AP1 0xd8 |
Definition at line 72 of file dm355_ccdc_regs.h.
| #define FMTPGM_AP2 0xdc |
Definition at line 73 of file dm355_ccdc_regs.h.
| #define FMTPGM_AP3 0xe0 |
Definition at line 74 of file dm355_ccdc_regs.h.
| #define FMTPGM_AP4 0xe4 |
Definition at line 75 of file dm355_ccdc_regs.h.
| #define FMTPGM_AP5 0xe8 |
Definition at line 76 of file dm355_ccdc_regs.h.
| #define FMTPGM_AP6 0xec |
Definition at line 77 of file dm355_ccdc_regs.h.
| #define FMTPGM_AP7 0xf0 |
Definition at line 78 of file dm355_ccdc_regs.h.
| #define FMTPGM_VF0 0xcc |
Definition at line 69 of file dm355_ccdc_regs.h.
| #define FMTPGM_VF1 0xd0 |
Definition at line 70 of file dm355_ccdc_regs.h.
| #define FMTPLEN 0x90 |
Definition at line 60 of file dm355_ccdc_regs.h.
| #define FMTRLEN 0xa4 |
Definition at line 65 of file dm355_ccdc_regs.h.
| #define FMTSLV 0x9c |
Definition at line 63 of file dm355_ccdc_regs.h.
| #define FMTSPH 0x94 |
Definition at line 61 of file dm355_ccdc_regs.h.
| #define GAIN_DEFAULT 256 |
Definition at line 306 of file dm355_ccdc_regs.h.
| #define GAMMAWD 0x80 |
Definition at line 56 of file dm355_ccdc_regs.h.
| #define GBGGAIN 0x64 |
Definition at line 49 of file dm355_ccdc_regs.h.
| #define GRCYGAIN 0x60 |
Definition at line 48 of file dm355_ccdc_regs.h.
| #define HDWIDTH 0x08 |
Definition at line 26 of file dm355_ccdc_regs.h.
| #define HSIZE 0x34 |
Definition at line 37 of file dm355_ccdc_regs.h.
| #define LPFR 0x14 |
Definition at line 29 of file dm355_ccdc_regs.h.
| #define LSCCFG1 0xf4 |
Definition at line 79 of file dm355_ccdc_regs.h.
| #define LSCCFG2 0xf8 |
Definition at line 80 of file dm355_ccdc_regs.h.
| #define LSCCFG2_DEFAULT 0xE |
Definition at line 308 of file dm355_ccdc_regs.h.
| #define LSCH0 0xfc |
Definition at line 81 of file dm355_ccdc_regs.h.
| #define LSCKH 0x104 |
Definition at line 83 of file dm355_ccdc_regs.h.
| #define LSCKV 0x108 |
Definition at line 84 of file dm355_ccdc_regs.h.
| #define LSCMEMCTL 0x10c |
Definition at line 85 of file dm355_ccdc_regs.h.
| #define LSCMEMD 0x110 |
Definition at line 86 of file dm355_ccdc_regs.h.
| #define LSCMEMQ 0x114 |
Definition at line 87 of file dm355_ccdc_regs.h.
| #define LSCV0 0x100 |
Definition at line 82 of file dm355_ccdc_regs.h.
| #define MEDFILT 0x58 |
Definition at line 46 of file dm355_ccdc_regs.h.
| #define MODESET 0x04 |
Definition at line 25 of file dm355_ccdc_regs.h.
| #define MODESET_DEFAULT 0x200 |
Definition at line 303 of file dm355_ccdc_regs.h.
| #define NLV 0x28 |
Definition at line 34 of file dm355_ccdc_regs.h.
| #define NPH 0x1c |
Definition at line 31 of file dm355_ccdc_regs.h.
| #define OFFSET 0x6c |
Definition at line 51 of file dm355_ccdc_regs.h.
| #define OUTCLIP 0x70 |
Definition at line 52 of file dm355_ccdc_regs.h.
| #define OUTCLIP_DEFAULT 0x3FFF |
Definition at line 307 of file dm355_ccdc_regs.h.
| #define PPLN 0x10 |
Definition at line 28 of file dm355_ccdc_regs.h.
| #define REC656IF 0x84 |
Definition at line 57 of file dm355_ccdc_regs.h.
| #define RSV0 0x7c |
Definition at line 55 of file dm355_ccdc_regs.h.
| #define RYEGAIN 0x5c |
Definition at line 47 of file dm355_ccdc_regs.h.
| #define SDOFST 0x38 |
Definition at line 38 of file dm355_ccdc_regs.h.
| #define SLV0 0x20 |
Definition at line 32 of file dm355_ccdc_regs.h.
| #define SLV1 0x24 |
Definition at line 33 of file dm355_ccdc_regs.h.
| #define SPH 0x18 |
Definition at line 30 of file dm355_ccdc_regs.h.
| #define STADRH 0x3c |
Definition at line 39 of file dm355_ccdc_regs.h.
| #define STADRL 0x40 |
Definition at line 40 of file dm355_ccdc_regs.h.
| #define SYNCEN 0x00 |
Definition at line 24 of file dm355_ccdc_regs.h.
| #define VDINT0 0x74 |
Definition at line 53 of file dm355_ccdc_regs.h.
| #define VDINT1 0x78 |
Definition at line 54 of file dm355_ccdc_regs.h.
| #define VDWIDTH 0x0c |
Definition at line 27 of file dm355_ccdc_regs.h.
1.8.2