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Macros
dm644x_ccdc_regs.h File Reference

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Macros

#define CCDC_PID   0x0
 
#define CCDC_PCR   0x4
 
#define CCDC_SYN_MODE   0x8
 
#define CCDC_HD_VD_WID   0xc
 
#define CCDC_PIX_LINES   0x10
 
#define CCDC_HORZ_INFO   0x14
 
#define CCDC_VERT_START   0x18
 
#define CCDC_VERT_LINES   0x1c
 
#define CCDC_CULLING   0x20
 
#define CCDC_HSIZE_OFF   0x24
 
#define CCDC_SDOFST   0x28
 
#define CCDC_SDR_ADDR   0x2c
 
#define CCDC_CLAMP   0x30
 
#define CCDC_DCSUB   0x34
 
#define CCDC_COLPTN   0x38
 
#define CCDC_BLKCMP   0x3c
 
#define CCDC_FPC   0x40
 
#define CCDC_FPC_ADDR   0x44
 
#define CCDC_VDINT   0x48
 
#define CCDC_ALAW   0x4c
 
#define CCDC_REC656IF   0x50
 
#define CCDC_CCDCFG   0x54
 
#define CCDC_FMTCFG   0x58
 
#define CCDC_FMT_HORZ   0x5c
 
#define CCDC_FMT_VERT   0x60
 
#define CCDC_FMT_ADDR0   0x64
 
#define CCDC_FMT_ADDR1   0x68
 
#define CCDC_FMT_ADDR2   0x6c
 
#define CCDC_FMT_ADDR3   0x70
 
#define CCDC_FMT_ADDR4   0x74
 
#define CCDC_FMT_ADDR5   0x78
 
#define CCDC_FMT_ADDR6   0x7c
 
#define CCDC_FMT_ADDR7   0x80
 
#define CCDC_PRGEVEN_0   0x84
 
#define CCDC_PRGEVEN_1   0x88
 
#define CCDC_PRGODD_0   0x8c
 
#define CCDC_PRGODD_1   0x90
 
#define CCDC_VP_OUT   0x94
 
#define CCDC_REG_END   0x98
 
#define CCDC_FID_POL_MASK   1
 
#define CCDC_FID_POL_SHIFT   4
 
#define CCDC_HD_POL_MASK   1
 
#define CCDC_HD_POL_SHIFT   3
 
#define CCDC_VD_POL_MASK   1
 
#define CCDC_VD_POL_SHIFT   2
 
#define CCDC_HSIZE_OFF_MASK   0xffffffe0
 
#define CCDC_32BYTE_ALIGN_VAL   31
 
#define CCDC_FRM_FMT_MASK   0x1
 
#define CCDC_FRM_FMT_SHIFT   7
 
#define CCDC_DATA_SZ_MASK   7
 
#define CCDC_DATA_SZ_SHIFT   8
 
#define CCDC_PIX_FMT_MASK   3
 
#define CCDC_PIX_FMT_SHIFT   12
 
#define CCDC_VP2SDR_DISABLE   0xFFFBFFFF
 
#define CCDC_WEN_ENABLE   (1 << 17)
 
#define CCDC_SDR2RSZ_DISABLE   0xFFF7FFFF
 
#define CCDC_VDHDEN_ENABLE   (1 << 16)
 
#define CCDC_LPF_ENABLE   (1 << 14)
 
#define CCDC_ALAW_ENABLE   (1 << 3)
 
#define CCDC_ALAW_GAMA_WD_MASK   7
 
#define CCDC_BLK_CLAMP_ENABLE   (1 << 31)
 
#define CCDC_BLK_SGAIN_MASK   0x1F
 
#define CCDC_BLK_ST_PXL_MASK   0x7FFF
 
#define CCDC_BLK_ST_PXL_SHIFT   10
 
#define CCDC_BLK_SAMPLE_LN_MASK   7
 
#define CCDC_BLK_SAMPLE_LN_SHIFT   28
 
#define CCDC_BLK_SAMPLE_LINE_MASK   7
 
#define CCDC_BLK_SAMPLE_LINE_SHIFT   25
 
#define CCDC_BLK_DC_SUB_MASK   0x03FFF
 
#define CCDC_BLK_COMP_MASK   0xFF
 
#define CCDC_BLK_COMP_GB_COMP_SHIFT   8
 
#define CCDC_BLK_COMP_GR_COMP_SHIFT   16
 
#define CCDC_BLK_COMP_R_COMP_SHIFT   24
 
#define CCDC_LATCH_ON_VSYNC_DISABLE   (1 << 15)
 
#define CCDC_FPC_ENABLE   (1 << 15)
 
#define CCDC_FPC_DISABLE   0
 
#define CCDC_FPC_FPC_NUM_MASK   0x7FFF
 
#define CCDC_DATA_PACK_ENABLE   (1 << 11)
 
#define CCDC_FMTCFG_VPIN_MASK   7
 
#define CCDC_FMTCFG_VPIN_SHIFT   12
 
#define CCDC_FMT_HORZ_FMTLNH_MASK   0x1FFF
 
#define CCDC_FMT_HORZ_FMTSPH_MASK   0x1FFF
 
#define CCDC_FMT_HORZ_FMTSPH_SHIFT   16
 
#define CCDC_FMT_VERT_FMTLNV_MASK   0x1FFF
 
#define CCDC_FMT_VERT_FMTSLV_MASK   0x1FFF
 
#define CCDC_FMT_VERT_FMTSLV_SHIFT   16
 
#define CCDC_VP_OUT_VERT_NUM_MASK   0x3FFF
 
#define CCDC_VP_OUT_VERT_NUM_SHIFT   17
 
#define CCDC_VP_OUT_HORZ_NUM_MASK   0x1FFF
 
#define CCDC_VP_OUT_HORZ_NUM_SHIFT   4
 
#define CCDC_VP_OUT_HORZ_ST_MASK   0xF
 
#define CCDC_HORZ_INFO_SPH_SHIFT   16
 
#define CCDC_VERT_START_SLV0_SHIFT   16
 
#define CCDC_VDINT_VDINT0_SHIFT   16
 
#define CCDC_VDINT_VDINT1_MASK   0xFFFF
 
#define CCDC_PPC_RAW   1
 
#define CCDC_DCSUB_DEFAULT_VAL   0
 
#define CCDC_CLAMP_DEFAULT_VAL   0
 
#define CCDC_ENABLE_VIDEO_PORT   0x8000
 
#define CCDC_DISABLE_VIDEO_PORT   0
 
#define CCDC_COLPTN_VAL   0xBB11BB11
 
#define CCDC_TWO_BYTES_PER_PIXEL   2
 
#define CCDC_INTERLACED_IMAGE_INVERT   0x4B6D
 
#define CCDC_INTERLACED_NO_IMAGE_INVERT   0x0249
 
#define CCDC_PROGRESSIVE_IMAGE_INVERT   0x4000
 
#define CCDC_PROGRESSIVE_NO_IMAGE_INVERT   0
 
#define CCDC_INTERLACED_HEIGHT_SHIFT   1
 
#define CCDC_SYN_MODE_INPMOD_SHIFT   12
 
#define CCDC_SYN_MODE_INPMOD_MASK   3
 
#define CCDC_SYN_MODE_8BITS   (7 << 8)
 
#define CCDC_SYN_MODE_10BITS   (6 << 8)
 
#define CCDC_SYN_MODE_11BITS   (5 << 8)
 
#define CCDC_SYN_MODE_12BITS   (4 << 8)
 
#define CCDC_SYN_MODE_13BITS   (3 << 8)
 
#define CCDC_SYN_MODE_14BITS   (2 << 8)
 
#define CCDC_SYN_MODE_15BITS   (1 << 8)
 
#define CCDC_SYN_MODE_16BITS   (0 << 8)
 
#define CCDC_SYN_FLDMODE_MASK   1
 
#define CCDC_SYN_FLDMODE_SHIFT   7
 
#define CCDC_REC656IF_BT656_EN   3
 
#define CCDC_SYN_MODE_VD_POL_NEGATIVE   (1 << 2)
 
#define CCDC_CCDCFG_Y8POS_SHIFT   11
 
#define CCDC_CCDCFG_BW656_10BIT   (1 << 5)
 
#define CCDC_SDOFST_FIELD_INTERLEAVED   0x249
 
#define CCDC_NO_CULLING   0xffff00ff
 

Macro Definition Documentation

#define CCDC_32BYTE_ALIGN_VAL   31

Definition at line 74 of file dm644x_ccdc_regs.h.

#define CCDC_ALAW   0x4c

Definition at line 43 of file dm644x_ccdc_regs.h.

#define CCDC_ALAW_ENABLE   (1 << 3)

Definition at line 86 of file dm644x_ccdc_regs.h.

#define CCDC_ALAW_GAMA_WD_MASK   7

Definition at line 87 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_CLAMP_ENABLE   (1 << 31)

Definition at line 88 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_COMP_GB_COMP_SHIFT   8

Definition at line 98 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_COMP_GR_COMP_SHIFT   16

Definition at line 99 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_COMP_MASK   0xFF

Definition at line 97 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_COMP_R_COMP_SHIFT   24

Definition at line 100 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_DC_SUB_MASK   0x03FFF

Definition at line 96 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_SAMPLE_LINE_MASK   7

Definition at line 94 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_SAMPLE_LINE_SHIFT   25

Definition at line 95 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_SAMPLE_LN_MASK   7

Definition at line 92 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_SAMPLE_LN_SHIFT   28

Definition at line 93 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_SGAIN_MASK   0x1F

Definition at line 89 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_ST_PXL_MASK   0x7FFF

Definition at line 90 of file dm644x_ccdc_regs.h.

#define CCDC_BLK_ST_PXL_SHIFT   10

Definition at line 91 of file dm644x_ccdc_regs.h.

#define CCDC_BLKCMP   0x3c

Definition at line 39 of file dm644x_ccdc_regs.h.

#define CCDC_CCDCFG   0x54

Definition at line 45 of file dm644x_ccdc_regs.h.

#define CCDC_CCDCFG_BW656_10BIT   (1 << 5)

Definition at line 150 of file dm644x_ccdc_regs.h.

#define CCDC_CCDCFG_Y8POS_SHIFT   11

Definition at line 149 of file dm644x_ccdc_regs.h.

#define CCDC_CLAMP   0x30

Definition at line 36 of file dm644x_ccdc_regs.h.

#define CCDC_CLAMP_DEFAULT_VAL   0

Definition at line 125 of file dm644x_ccdc_regs.h.

#define CCDC_COLPTN   0x38

Definition at line 38 of file dm644x_ccdc_regs.h.

#define CCDC_COLPTN_VAL   0xBB11BB11

Definition at line 128 of file dm644x_ccdc_regs.h.

#define CCDC_CULLING   0x20

Definition at line 32 of file dm644x_ccdc_regs.h.

#define CCDC_DATA_PACK_ENABLE   (1 << 11)

Definition at line 105 of file dm644x_ccdc_regs.h.

#define CCDC_DATA_SZ_MASK   7

Definition at line 77 of file dm644x_ccdc_regs.h.

#define CCDC_DATA_SZ_SHIFT   8

Definition at line 78 of file dm644x_ccdc_regs.h.

#define CCDC_DCSUB   0x34

Definition at line 37 of file dm644x_ccdc_regs.h.

#define CCDC_DCSUB_DEFAULT_VAL   0

Definition at line 124 of file dm644x_ccdc_regs.h.

#define CCDC_DISABLE_VIDEO_PORT   0

Definition at line 127 of file dm644x_ccdc_regs.h.

#define CCDC_ENABLE_VIDEO_PORT   0x8000

Definition at line 126 of file dm644x_ccdc_regs.h.

#define CCDC_FID_POL_MASK   1

Definition at line 67 of file dm644x_ccdc_regs.h.

#define CCDC_FID_POL_SHIFT   4

Definition at line 68 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_ADDR0   0x64

Definition at line 49 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_ADDR1   0x68

Definition at line 50 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_ADDR2   0x6c

Definition at line 51 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_ADDR3   0x70

Definition at line 52 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_ADDR4   0x74

Definition at line 53 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_ADDR5   0x78

Definition at line 54 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_ADDR6   0x7c

Definition at line 55 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_ADDR7   0x80

Definition at line 56 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_HORZ   0x5c

Definition at line 47 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_HORZ_FMTLNH_MASK   0x1FFF

Definition at line 108 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_HORZ_FMTSPH_MASK   0x1FFF

Definition at line 109 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_HORZ_FMTSPH_SHIFT   16

Definition at line 110 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_VERT   0x60

Definition at line 48 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_VERT_FMTLNV_MASK   0x1FFF

Definition at line 111 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_VERT_FMTSLV_MASK   0x1FFF

Definition at line 112 of file dm644x_ccdc_regs.h.

#define CCDC_FMT_VERT_FMTSLV_SHIFT   16

Definition at line 113 of file dm644x_ccdc_regs.h.

#define CCDC_FMTCFG   0x58

Definition at line 46 of file dm644x_ccdc_regs.h.

#define CCDC_FMTCFG_VPIN_MASK   7

Definition at line 106 of file dm644x_ccdc_regs.h.

#define CCDC_FMTCFG_VPIN_SHIFT   12

Definition at line 107 of file dm644x_ccdc_regs.h.

#define CCDC_FPC   0x40

Definition at line 40 of file dm644x_ccdc_regs.h.

#define CCDC_FPC_ADDR   0x44

Definition at line 41 of file dm644x_ccdc_regs.h.

#define CCDC_FPC_DISABLE   0

Definition at line 103 of file dm644x_ccdc_regs.h.

#define CCDC_FPC_ENABLE   (1 << 15)

Definition at line 102 of file dm644x_ccdc_regs.h.

#define CCDC_FPC_FPC_NUM_MASK   0x7FFF

Definition at line 104 of file dm644x_ccdc_regs.h.

#define CCDC_FRM_FMT_MASK   0x1

Definition at line 75 of file dm644x_ccdc_regs.h.

#define CCDC_FRM_FMT_SHIFT   7

Definition at line 76 of file dm644x_ccdc_regs.h.

#define CCDC_HD_POL_MASK   1

Definition at line 69 of file dm644x_ccdc_regs.h.

#define CCDC_HD_POL_SHIFT   3

Definition at line 70 of file dm644x_ccdc_regs.h.

#define CCDC_HD_VD_WID   0xc

Definition at line 27 of file dm644x_ccdc_regs.h.

#define CCDC_HORZ_INFO   0x14

Definition at line 29 of file dm644x_ccdc_regs.h.

#define CCDC_HORZ_INFO_SPH_SHIFT   16

Definition at line 119 of file dm644x_ccdc_regs.h.

#define CCDC_HSIZE_OFF   0x24

Definition at line 33 of file dm644x_ccdc_regs.h.

#define CCDC_HSIZE_OFF_MASK   0xffffffe0

Definition at line 73 of file dm644x_ccdc_regs.h.

#define CCDC_INTERLACED_HEIGHT_SHIFT   1

Definition at line 134 of file dm644x_ccdc_regs.h.

#define CCDC_INTERLACED_IMAGE_INVERT   0x4B6D

Definition at line 130 of file dm644x_ccdc_regs.h.

#define CCDC_INTERLACED_NO_IMAGE_INVERT   0x0249

Definition at line 131 of file dm644x_ccdc_regs.h.

#define CCDC_LATCH_ON_VSYNC_DISABLE   (1 << 15)

Definition at line 101 of file dm644x_ccdc_regs.h.

#define CCDC_LPF_ENABLE   (1 << 14)

Definition at line 85 of file dm644x_ccdc_regs.h.

#define CCDC_NO_CULLING   0xffff00ff

Definition at line 152 of file dm644x_ccdc_regs.h.

#define CCDC_PCR   0x4

Definition at line 25 of file dm644x_ccdc_regs.h.

#define CCDC_PID   0x0

Definition at line 24 of file dm644x_ccdc_regs.h.

#define CCDC_PIX_FMT_MASK   3

Definition at line 79 of file dm644x_ccdc_regs.h.

#define CCDC_PIX_FMT_SHIFT   12

Definition at line 80 of file dm644x_ccdc_regs.h.

#define CCDC_PIX_LINES   0x10

Definition at line 28 of file dm644x_ccdc_regs.h.

#define CCDC_PPC_RAW   1

Definition at line 123 of file dm644x_ccdc_regs.h.

#define CCDC_PRGEVEN_0   0x84

Definition at line 57 of file dm644x_ccdc_regs.h.

#define CCDC_PRGEVEN_1   0x88

Definition at line 58 of file dm644x_ccdc_regs.h.

#define CCDC_PRGODD_0   0x8c

Definition at line 59 of file dm644x_ccdc_regs.h.

#define CCDC_PRGODD_1   0x90

Definition at line 60 of file dm644x_ccdc_regs.h.

#define CCDC_PROGRESSIVE_IMAGE_INVERT   0x4000

Definition at line 132 of file dm644x_ccdc_regs.h.

#define CCDC_PROGRESSIVE_NO_IMAGE_INVERT   0

Definition at line 133 of file dm644x_ccdc_regs.h.

#define CCDC_REC656IF   0x50

Definition at line 44 of file dm644x_ccdc_regs.h.

#define CCDC_REC656IF_BT656_EN   3

Definition at line 147 of file dm644x_ccdc_regs.h.

#define CCDC_REG_END   0x98

Definition at line 62 of file dm644x_ccdc_regs.h.

#define CCDC_SDOFST   0x28

Definition at line 34 of file dm644x_ccdc_regs.h.

#define CCDC_SDOFST_FIELD_INTERLEAVED   0x249

Definition at line 151 of file dm644x_ccdc_regs.h.

#define CCDC_SDR2RSZ_DISABLE   0xFFF7FFFF

Definition at line 83 of file dm644x_ccdc_regs.h.

#define CCDC_SDR_ADDR   0x2c

Definition at line 35 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_FLDMODE_MASK   1

Definition at line 145 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_FLDMODE_SHIFT   7

Definition at line 146 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE   0x8

Definition at line 26 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE_10BITS   (6 << 8)

Definition at line 138 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE_11BITS   (5 << 8)

Definition at line 139 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE_12BITS   (4 << 8)

Definition at line 140 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE_13BITS   (3 << 8)

Definition at line 141 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE_14BITS   (2 << 8)

Definition at line 142 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE_15BITS   (1 << 8)

Definition at line 143 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE_16BITS   (0 << 8)

Definition at line 144 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE_8BITS   (7 << 8)

Definition at line 137 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE_INPMOD_MASK   3

Definition at line 136 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE_INPMOD_SHIFT   12

Definition at line 135 of file dm644x_ccdc_regs.h.

#define CCDC_SYN_MODE_VD_POL_NEGATIVE   (1 << 2)

Definition at line 148 of file dm644x_ccdc_regs.h.

#define CCDC_TWO_BYTES_PER_PIXEL   2

Definition at line 129 of file dm644x_ccdc_regs.h.

#define CCDC_VD_POL_MASK   1

Definition at line 71 of file dm644x_ccdc_regs.h.

#define CCDC_VD_POL_SHIFT   2

Definition at line 72 of file dm644x_ccdc_regs.h.

#define CCDC_VDHDEN_ENABLE   (1 << 16)

Definition at line 84 of file dm644x_ccdc_regs.h.

#define CCDC_VDINT   0x48

Definition at line 42 of file dm644x_ccdc_regs.h.

#define CCDC_VDINT_VDINT0_SHIFT   16

Definition at line 121 of file dm644x_ccdc_regs.h.

#define CCDC_VDINT_VDINT1_MASK   0xFFFF

Definition at line 122 of file dm644x_ccdc_regs.h.

#define CCDC_VERT_LINES   0x1c

Definition at line 31 of file dm644x_ccdc_regs.h.

#define CCDC_VERT_START   0x18

Definition at line 30 of file dm644x_ccdc_regs.h.

#define CCDC_VERT_START_SLV0_SHIFT   16

Definition at line 120 of file dm644x_ccdc_regs.h.

#define CCDC_VP2SDR_DISABLE   0xFFFBFFFF

Definition at line 81 of file dm644x_ccdc_regs.h.

#define CCDC_VP_OUT   0x94

Definition at line 61 of file dm644x_ccdc_regs.h.

#define CCDC_VP_OUT_HORZ_NUM_MASK   0x1FFF

Definition at line 116 of file dm644x_ccdc_regs.h.

#define CCDC_VP_OUT_HORZ_NUM_SHIFT   4

Definition at line 117 of file dm644x_ccdc_regs.h.

#define CCDC_VP_OUT_HORZ_ST_MASK   0xF

Definition at line 118 of file dm644x_ccdc_regs.h.

#define CCDC_VP_OUT_VERT_NUM_MASK   0x3FFF

Definition at line 114 of file dm644x_ccdc_regs.h.

#define CCDC_VP_OUT_VERT_NUM_SHIFT   17

Definition at line 115 of file dm644x_ccdc_regs.h.

#define CCDC_WEN_ENABLE   (1 << 17)

Definition at line 82 of file dm644x_ccdc_regs.h.