35 return nv_rd08(obj, 0x601000 + port);
37 if (port == 0x03c0 || port == 0x03c1 ||
38 port == 0x03c2 || port == 0x03da ||
39 port == 0x03d4 || port == 0x03d5)
40 return nv_rd08(obj, 0x601000 + (head * 0x2000) + port);
42 if (port == 0x03c2 || port == 0x03cc ||
43 port == 0x03c4 || port == 0x03c5 ||
44 port == 0x03ce || port == 0x03cf) {
47 return nv_rd08(obj, 0x0c0000 + (head * 0x2000) + port);
50 nv_error(obj,
"unknown vga port 0x%04x\n", port);
60 nv_wr08(obj, 0x601000 + port, data);
62 if (port == 0x03c0 || port == 0x03c1 ||
63 port == 0x03c2 || port == 0x03da ||
64 port == 0x03d4 || port == 0x03d5)
65 nv_wr08(obj, 0x601000 + (head * 0x2000) + port, data);
67 if (port == 0x03c2 || port == 0x03cc ||
68 port == 0x03c4 || port == 0x03c5 ||
69 port == 0x03ce || port == 0x03cf) {
72 nv_wr08(obj, 0x0c0000 + (head * 0x2000) + port, data);
74 nv_error(obj,
"unknown vga port 0x%04x\n", port);
122 if (port == 0x03c4)
return nv_rdvgas(obj, head, index);
123 if (port == 0x03ce)
return nv_rdvgag(obj, head, index);
124 if (port == 0x03d4)
return nv_rdvgac(obj, head, index);
125 nv_error(obj,
"unknown indexed vga port 0x%04x\n", port);
132 if (port == 0x03c4)
nv_wrvgas(obj, head, index, value);
133 else if (port == 0x03ce)
nv_wrvgag(obj, head, index, value);
134 else if (port == 0x03d4)
nv_wrvgac(obj, head, index, value);
135 else nv_error(obj,
"unknown indexed vga port 0x%04x\n", port);
142 u8 data = lock ? 0x99 : 0x57;
144 if (nv_device(obj)->
chipset == 0x11) {
145 if (!(nv_rd32(obj, 0x001084) & 0x10000000))
173 if (nv_device(obj)->
chipset == 0x11) {
174 u32 tied = nv_rd32(obj, 0x001084) & 0x10000000;
180 if (slA && !tvA)
return 0x00;
181 if (slB && !tvB)
return 0x03;
182 if (slA)
return 0x00;
183 if (slB)
return 0x03;
192 nv_error(obj,
"rdvgaowner after nv4x\n");
200 u8 owner = (select == 1) ? 3 : select;
201 if (nv_device(obj)->chipset == 0x11) {
209 if (nv_device(obj)->
chipset == 0x11) {
214 nv_error(obj,
"wrvgaowner after nv4x\n");