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Linux Kernel
3.7.1
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#include <linux/errno.h>#include <linux/interrupt.h>#include <linux/pci.h>#include <linux/slab.h>#include "mthca_dev.h"#include "mthca_cmd.h"#include "mthca_config_reg.h"Go to the source code of this file.
Data Structures | |
| struct | mthca_eq_context |
| struct | mthca_eqe |
Macros | |
| #define | MTHCA_EQ_STATUS_OK ( 0 << 28) |
| #define | MTHCA_EQ_STATUS_OVERFLOW ( 9 << 28) |
| #define | MTHCA_EQ_STATUS_WRITE_FAIL (10 << 28) |
| #define | MTHCA_EQ_OWNER_SW ( 0 << 24) |
| #define | MTHCA_EQ_OWNER_HW ( 1 << 24) |
| #define | MTHCA_EQ_FLAG_TR ( 1 << 18) |
| #define | MTHCA_EQ_FLAG_OI ( 1 << 17) |
| #define | MTHCA_EQ_STATE_ARMED ( 1 << 8) |
| #define | MTHCA_EQ_STATE_FIRED ( 2 << 8) |
| #define | MTHCA_EQ_STATE_ALWAYS_ARMED ( 3 << 8) |
| #define | MTHCA_EQ_STATE_ARBEL ( 8 << 8) |
| #define | MTHCA_ASYNC_EVENT_MASK |
| #define | MTHCA_SRQ_EVENT_MASK |
| #define | MTHCA_CMD_EVENT_MASK (1ULL << MTHCA_EVENT_TYPE_CMD) |
| #define | MTHCA_EQ_DB_INC_CI (1 << 24) |
| #define | MTHCA_EQ_DB_REQ_NOT (2 << 24) |
| #define | MTHCA_EQ_DB_DISARM_CQ (3 << 24) |
| #define | MTHCA_EQ_DB_SET_CI (4 << 24) |
| #define | MTHCA_EQ_DB_ALWAYS_ARM (5 << 24) |
| #define | MTHCA_EQ_ENTRY_OWNER_SW (0 << 7) |
| #define | MTHCA_EQ_ENTRY_OWNER_HW (1 << 7) |
Enumerations | |
| enum | { MTHCA_NUM_ASYNC_EQE = 0x80, MTHCA_NUM_CMD_EQE = 0x80, MTHCA_NUM_SPARE_EQE = 0x80, MTHCA_EQ_ENTRY_SIZE = 0x20 } |
| enum | { MTHCA_EVENT_TYPE_COMP = 0x00, MTHCA_EVENT_TYPE_PATH_MIG = 0x01, MTHCA_EVENT_TYPE_COMM_EST = 0x02, MTHCA_EVENT_TYPE_SQ_DRAINED = 0x03, MTHCA_EVENT_TYPE_SRQ_QP_LAST_WQE = 0x13, MTHCA_EVENT_TYPE_SRQ_LIMIT = 0x14, MTHCA_EVENT_TYPE_CQ_ERROR = 0x04, MTHCA_EVENT_TYPE_WQ_CATAS_ERROR = 0x05, MTHCA_EVENT_TYPE_EEC_CATAS_ERROR = 0x06, MTHCA_EVENT_TYPE_PATH_MIG_FAILED = 0x07, MTHCA_EVENT_TYPE_WQ_INVAL_REQ_ERROR = 0x10, MTHCA_EVENT_TYPE_WQ_ACCESS_ERROR = 0x11, MTHCA_EVENT_TYPE_SRQ_CATAS_ERROR = 0x12, MTHCA_EVENT_TYPE_LOCAL_CATAS_ERROR = 0x08, MTHCA_EVENT_TYPE_PORT_CHANGE = 0x09, MTHCA_EVENT_TYPE_EQ_OVERFLOW = 0x0f, MTHCA_EVENT_TYPE_ECC_DETECT = 0x0e, MTHCA_EVENT_TYPE_CMD = 0x0a } |
Functions | |
| struct mthca_eq_context | __attribute__ ((packed)) |
| int | mthca_map_eq_icm (struct mthca_dev *dev, u64 icm_virt) |
| void | mthca_unmap_eq_icm (struct mthca_dev *dev) |
| int | mthca_init_eq_table (struct mthca_dev *dev) |
| void | mthca_cleanup_eq_table (struct mthca_dev *dev) |
Variables | |
| __be32 | flags |
| __be64 | start |
| __be32 | logsize_usrpage |
| __be32 | tavor_pd |
| u8 | reserved1 [3] |
| u8 | intr |
| __be32 | arbel_pd |
| __be32 | lkey |
| u32 | reserved2 [2] |
| __be32 | consumer_index |
| __be32 | producer_index |
| u32 | reserved3 [4] |
| enum { ... } | __attribute__ |
| __be32 | cqn |
| u8 | type |
| u8 | subtype |
| union { | |
| u32 raw [6] | |
| } | event |
| u8 | owner |
| #define MTHCA_ASYNC_EVENT_MASK |
Definition at line 101 of file mthca_eq.c.
| #define MTHCA_CMD_EVENT_MASK (1ULL << MTHCA_EVENT_TYPE_CMD) |
Definition at line 116 of file mthca_eq.c.
| #define MTHCA_EQ_DB_ALWAYS_ARM (5 << 24) |
Definition at line 122 of file mthca_eq.c.
| #define MTHCA_EQ_DB_DISARM_CQ (3 << 24) |
Definition at line 120 of file mthca_eq.c.
| #define MTHCA_EQ_DB_INC_CI (1 << 24) |
Definition at line 118 of file mthca_eq.c.
| #define MTHCA_EQ_DB_REQ_NOT (2 << 24) |
Definition at line 119 of file mthca_eq.c.
| #define MTHCA_EQ_DB_SET_CI (4 << 24) |
Definition at line 121 of file mthca_eq.c.
| #define MTHCA_EQ_ENTRY_OWNER_HW (1 << 7) |
Definition at line 164 of file mthca_eq.c.
| #define MTHCA_EQ_ENTRY_OWNER_SW (0 << 7) |
Definition at line 163 of file mthca_eq.c.
| #define MTHCA_EQ_FLAG_OI ( 1 << 17) |
Definition at line 74 of file mthca_eq.c.
| #define MTHCA_EQ_FLAG_TR ( 1 << 18) |
Definition at line 73 of file mthca_eq.c.
| #define MTHCA_EQ_OWNER_HW ( 1 << 24) |
Definition at line 72 of file mthca_eq.c.
| #define MTHCA_EQ_OWNER_SW ( 0 << 24) |
Definition at line 71 of file mthca_eq.c.
| #define MTHCA_EQ_STATE_ALWAYS_ARMED ( 3 << 8) |
Definition at line 77 of file mthca_eq.c.
| #define MTHCA_EQ_STATE_ARBEL ( 8 << 8) |
Definition at line 78 of file mthca_eq.c.
| #define MTHCA_EQ_STATE_ARMED ( 1 << 8) |
Definition at line 75 of file mthca_eq.c.
| #define MTHCA_EQ_STATE_FIRED ( 2 << 8) |
Definition at line 76 of file mthca_eq.c.
| #define MTHCA_EQ_STATUS_OK ( 0 << 28) |
Definition at line 68 of file mthca_eq.c.
| #define MTHCA_EQ_STATUS_OVERFLOW ( 9 << 28) |
Definition at line 69 of file mthca_eq.c.
| #define MTHCA_EQ_STATUS_WRITE_FAIL (10 << 28) |
Definition at line 70 of file mthca_eq.c.
| #define MTHCA_SRQ_EVENT_MASK |
Definition at line 113 of file mthca_eq.c.
| anonymous enum |
Definition at line 43 of file mthca_eq.c.
| anonymous enum |
Definition at line 80 of file mthca_eq.c.
|
read |
Definition at line 171 of file esd_usb2.c.
Definition at line 888 of file mthca_eq.c.
Definition at line 767 of file mthca_eq.c.
Definition at line 728 of file mthca_eq.c.
Definition at line 759 of file mthca_eq.c.
| enum { ... } __attribute__ |
| __be32 arbel_pd |
Definition at line 73 of file mthca_eq.c.
| __be32 consumer_index |
Definition at line 76 of file mthca_eq.c.
| __be32 cqn |
Definition at line 135 of file mthca_eq.c.
| union { ... } event |
| __be32 flags |
Definition at line 67 of file mthca_eq.c.
| static irqreturn_t intr |
Definition at line 72 of file mthca_eq.c.
| __be32 lkey |
Definition at line 74 of file mthca_eq.c.
| __be32 logsize_usrpage |
Definition at line 69 of file mthca_eq.c.
| __le64 owner |
Definition at line 197 of file mthca_eq.c.
| __be32 producer_index |
Definition at line 77 of file mthca_eq.c.
| u32 raw[6] |
Definition at line 167 of file mthca_eq.c.
| u8 reserved1 |
Definition at line 71 of file mthca_eq.c.
| u8 reserved2 |
Definition at line 75 of file mthca_eq.c.
| u8 reserved3[3] |
Definition at line 78 of file mthca_eq.c.
| __be64 start |
Definition at line 68 of file mthca_eq.c.
| u8 subtype |
Definition at line 165 of file mthca_eq.c.
| __be32 tavor_pd |
Definition at line 70 of file mthca_eq.c.
Definition at line 163 of file mthca_eq.c.
1.8.2