35 ramcfg = (nv_rd32(bios, 0x101000) & 0x0000003c) >> 2;
39 u8 header = nv_ro08(bios, table + 1);
40 u8 record = nv_ro08(bios, table + 2);
42 if (table && version == 0x10 && ramcfg < entries) {
44 switch (nv_ro08(bios, entry) & 0x0f) {
45 case 0:
return NV_MEM_TYPE_DDR2;
46 case 1:
return NV_MEM_TYPE_DDR3;
47 case 2:
return NV_MEM_TYPE_GDDR3;
48 case 3:
return NV_MEM_TYPE_GDDR5;
56 return NV_MEM_TYPE_UNKNOWN;
68 for (i = 0; i < pfb->
tile.regions; i++)
69 pfb->
tile.prog(pfb, i, &pfb->
tile.region[i]);
86 for (i = 0; i < pfb->
tile.regions; i++)
87 pfb->
tile.fini(pfb, i, &pfb->
tile.region[i]);
89 if (pfb->
tags.block_size)
92 if (pfb->
vram.block_size)
108 static const char *
name[] = {
122 if (pfb->
ram.size == 0) {
123 nv_fatal(pfb,
"no vram detected!!\n");
127 nv_info(pfb,
"RAM type: %s\n", name[pfb->
ram.type]);
128 nv_info(pfb,
"RAM size: %d MiB\n", (
int)(pfb->
ram.size >> 20));