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23 #ifndef __WL1251_SPI_H__
24 #define __WL1251_SPI_H__
30 #define WSPI_CMD_READ 0x40000000
31 #define WSPI_CMD_WRITE 0x00000000
32 #define WSPI_CMD_FIXED 0x20000000
33 #define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
34 #define WSPI_CMD_BYTE_LENGTH_OFFSET 17
35 #define WSPI_CMD_BYTE_ADDR 0x0001FFFF
37 #define WSPI_INIT_CMD_CRC_LEN 5
39 #define WSPI_INIT_CMD_START 0x00
40 #define WSPI_INIT_CMD_TX 0x40
42 #define WSPI_INIT_CMD_BYPASS_BIT 0x80
43 #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
44 #define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
45 #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
46 #define WSPI_INIT_CMD_IOD 0x40
47 #define WSPI_INIT_CMD_IP 0x20
48 #define WSPI_INIT_CMD_CS 0x10
49 #define WSPI_INIT_CMD_WS 0x08
50 #define WSPI_INIT_CMD_WSPI 0x01
51 #define WSPI_INIT_CMD_END 0x01
53 #define WSPI_INIT_CMD_LEN 8
55 #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
56 ((WL1251_BUSY_WORD_LEN - 4) / sizeof(u32))
57 #define HW_ACCESS_WSPI_INIT_CMD_MASK 0