|
#define | MAC_MAX_CONTEXT_SIZE_PAGE0 256 |
|
#define | MAC_MAX_CONTEXT_SIZE_PAGE1 128 |
|
#define | MAC_MAX_CONTEXT_SIZE MAC_MAX_CONTEXT_SIZE_PAGE0 + MAC_MAX_CONTEXT_SIZE_PAGE1 |
|
#define | MAC_REG_BCFG0 0x00 |
|
#define | MAC_REG_BCFG1 0x01 |
|
#define | MAC_REG_FCR0 0x02 |
|
#define | MAC_REG_FCR1 0x03 |
|
#define | MAC_REG_BISTCMD 0x04 |
|
#define | MAC_REG_BISTSR0 0x05 |
|
#define | MAC_REG_BISTSR1 0x06 |
|
#define | MAC_REG_BISTSR2 0x07 |
|
#define | MAC_REG_I2MCSR 0x08 |
|
#define | MAC_REG_I2MTGID 0x09 |
|
#define | MAC_REG_I2MTGAD 0x0A |
|
#define | MAC_REG_I2MCFG 0x0B |
|
#define | MAC_REG_I2MDIPT 0x0C |
|
#define | MAC_REG_I2MDOPT 0x0E |
|
#define | MAC_REG_PMC0 0x10 |
|
#define | MAC_REG_PMC1 0x11 |
|
#define | MAC_REG_STICKHW 0x12 |
|
#define | MAC_REG_LOCALID 0x14 |
|
#define | MAC_REG_TESTCFG 0x15 |
|
#define | MAC_REG_JUMPER0 0x16 |
|
#define | MAC_REG_JUMPER1 0x17 |
|
#define | MAC_REG_TMCTL0 0x18 |
|
#define | MAC_REG_TMCTL1 0x19 |
|
#define | MAC_REG_TMDATA0 0x1C |
|
#define | MAC_REG_LRT 0x20 |
|
#define | MAC_REG_SRT 0x21 |
|
#define | MAC_REG_SIFS 0x22 |
|
#define | MAC_REG_DIFS 0x23 |
|
#define | MAC_REG_EIFS 0x24 |
|
#define | MAC_REG_SLOT 0x25 |
|
#define | MAC_REG_BI 0x26 |
|
#define | MAC_REG_CWMAXMIN0 0x28 |
|
#define | MAC_REG_LINKOFFTOTM 0x2A |
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#define | MAC_REG_SWTMOT 0x2B |
|
#define | MAC_REG_MIBCNTR 0x2C |
|
#define | MAC_REG_RTSOKCNT 0x2C |
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#define | MAC_REG_RTSFAILCNT 0x2D |
|
#define | MAC_REG_ACKFAILCNT 0x2E |
|
#define | MAC_REG_FCSERRCNT 0x2F |
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#define | MAC_REG_TSFCNTR 0x30 |
|
#define | MAC_REG_NEXTTBTT 0x38 |
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#define | MAC_REG_TSFOFST 0x40 |
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#define | MAC_REG_TFTCTL 0x48 |
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#define | MAC_REG_ENCFG 0x4C |
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#define | MAC_REG_PAGE1SEL 0x4F |
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#define | MAC_REG_CFG 0x50 |
|
#define | MAC_REG_TEST 0x52 |
|
#define | MAC_REG_HOSTCR 0x54 |
|
#define | MAC_REG_MACCR 0x55 |
|
#define | MAC_REG_RCR 0x56 |
|
#define | MAC_REG_TCR 0x57 |
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#define | MAC_REG_IMR 0x58 |
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#define | MAC_REG_ISR 0x5C |
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#define | MAC_REG_PSCFG 0x60 |
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#define | MAC_REG_PSCTL 0x61 |
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#define | MAC_REG_PSPWRSIG 0x62 |
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#define | MAC_REG_BBCR13 0x63 |
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#define | MAC_REG_AIDATIM 0x64 |
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#define | MAC_REG_PWBT 0x66 |
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#define | MAC_REG_WAKEOKTMR 0x68 |
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#define | MAC_REG_CALTMR 0x69 |
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#define | MAC_REG_SYNSPACCNT 0x6A |
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#define | MAC_REG_WAKSYNOPT 0x6B |
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#define | MAC_REG_BBREGCTL 0x6C |
|
#define | MAC_REG_CHANNEL 0x6D |
|
#define | MAC_REG_BBREGADR 0x6E |
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#define | MAC_REG_BBREGDATA 0x6F |
|
#define | MAC_REG_IFREGCTL 0x70 |
|
#define | MAC_REG_IFDATA 0x71 |
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#define | MAC_REG_ITRTMSET 0x74 |
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#define | MAC_REG_PAPEDELAY 0x77 |
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#define | MAC_REG_SOFTPWRCTL 0x78 |
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#define | MAC_REG_GPIOCTL0 0x7A |
|
#define | MAC_REG_GPIOCTL1 0x7B |
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#define | MAC_REG_TXDMACTL0 0x7C |
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#define | MAC_REG_TXDMAPTR0 0x80 |
|
#define | MAC_REG_AC0DMACTL 0x84 |
|
#define | MAC_REG_AC0DMAPTR 0x88 |
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#define | MAC_REG_BCNDMACTL 0x8C |
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#define | MAC_REG_BCNDMAPTR 0x90 |
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#define | MAC_REG_RXDMACTL0 0x94 |
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#define | MAC_REG_RXDMAPTR0 0x98 |
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#define | MAC_REG_RXDMACTL1 0x9C |
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#define | MAC_REG_RXDMAPTR1 0xA0 |
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#define | MAC_REG_SYNCDMACTL 0xA4 |
|
#define | MAC_REG_SYNCDMAPTR 0xA8 |
|
#define | MAC_REG_ATIMDMACTL 0xAC |
|
#define | MAC_REG_ATIMDMAPTR 0xB0 |
|
#define | MAC_REG_MISCFFNDEX 0xB4 |
|
#define | MAC_REG_MISCFFCTL 0xB6 |
|
#define | MAC_REG_MISCFFDATA 0xB8 |
|
#define | MAC_REG_TMDATA1 0xBC |
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#define | MAC_REG_WAKEUPEN0 0xC0 |
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#define | MAC_REG_WAKEUPEN1 0xC1 |
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#define | MAC_REG_WAKEUPSR0 0xC2 |
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#define | MAC_REG_WAKEUPSR1 0xC3 |
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#define | MAC_REG_WAKE128_0 0xC4 |
|
#define | MAC_REG_WAKE128_1 0xD4 |
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#define | MAC_REG_WAKE128_2 0xE4 |
|
#define | MAC_REG_WAKE128_3 0xF4 |
|
#define | MAC_REG_CRC_128_0 0x04 |
|
#define | MAC_REG_CRC_128_1 0x06 |
|
#define | MAC_REG_CRC_128_2 0x08 |
|
#define | MAC_REG_CRC_128_3 0x0A |
|
#define | MAC_REG_PAR0 0x0C |
|
#define | MAC_REG_PAR4 0x10 |
|
#define | MAC_REG_BSSID0 0x14 |
|
#define | MAC_REG_BSSID4 0x18 |
|
#define | MAC_REG_MAR0 0x1C |
|
#define | MAC_REG_MAR4 0x20 |
|
#define | MAC_REG_RSPINF_B_1 0x24 |
|
#define | MAC_REG_RSPINF_B_2 0x28 |
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#define | MAC_REG_RSPINF_B_5 0x2C |
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#define | MAC_REG_RSPINF_B_11 0x30 |
|
#define | MAC_REG_RSPINF_A_6 0x34 |
|
#define | MAC_REG_RSPINF_A_9 0x36 |
|
#define | MAC_REG_RSPINF_A_12 0x38 |
|
#define | MAC_REG_RSPINF_A_18 0x3A |
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#define | MAC_REG_RSPINF_A_24 0x3C |
|
#define | MAC_REG_RSPINF_A_36 0x3E |
|
#define | MAC_REG_RSPINF_A_48 0x40 |
|
#define | MAC_REG_RSPINF_A_54 0x42 |
|
#define | MAC_REG_RSPINF_A_72 0x44 |
|
#define | MAC_REG_QUIETINIT 0x60 |
|
#define | MAC_REG_QUIETGAP 0x62 |
|
#define | MAC_REG_QUIETDUR 0x64 |
|
#define | MAC_REG_MSRCTL 0x66 |
|
#define | MAC_REG_MSRBBSTS 0x67 |
|
#define | MAC_REG_MSRSTART 0x68 |
|
#define | MAC_REG_MSRDURATION 0x70 |
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#define | MAC_REG_CCAFRACTION 0x72 |
|
#define | MAC_REG_PWRCCK 0x73 |
|
#define | MAC_REG_PWROFDM 0x7C |
|
#define | BCFG0_PERROFF 0x40 |
|
#define | BCFG0_MRDMDIS 0x20 |
|
#define | BCFG0_MRDLDIS 0x10 |
|
#define | BCFG0_MWMEN 0x08 |
|
#define | BCFG0_VSERREN 0x02 |
|
#define | BCFG0_LATMEN 0x01 |
|
#define | BCFG1_CFUNOPT 0x80 |
|
#define | BCFG1_CREQOPT 0x40 |
|
#define | BCFG1_DMA8 0x10 |
|
#define | BCFG1_ARBITOPT 0x08 |
|
#define | BCFG1_PCIMEN 0x04 |
|
#define | BCFG1_MIOEN 0x02 |
|
#define | BCFG1_CISDLYEN 0x01 |
|
#define | BISTCMD_TSTPAT5 0x00 |
|
#define | BISTCMD_TSTPATA 0x80 |
|
#define | BISTCMD_TSTERR 0x20 |
|
#define | BISTCMD_TSTPATF 0x18 |
|
#define | BISTCMD_TSTPAT0 0x10 |
|
#define | BISTCMD_TSTMODE 0x04 |
|
#define | BISTCMD_TSTITTX 0x03 |
|
#define | BISTCMD_TSTATRX 0x02 |
|
#define | BISTCMD_TSTATTX 0x01 |
|
#define | BISTCMD_TSTRX 0x00 |
|
#define | BISTSR0_BISTGO 0x01 |
|
#define | BISTSR1_TSTSR 0x01 |
|
#define | BISTSR2_CMDPRTEN 0x02 |
|
#define | BISTSR2_RAMTSTEN 0x01 |
|
#define | I2MCFG_BOUNDCTL 0x80 |
|
#define | I2MCFG_WAITCTL 0x20 |
|
#define | I2MCFG_SCLOECTL 0x10 |
|
#define | I2MCFG_WBUSYCTL 0x08 |
|
#define | I2MCFG_NORETRY 0x04 |
|
#define | I2MCFG_I2MLDSEQ 0x02 |
|
#define | I2MCFG_I2CMFAST 0x01 |
|
#define | I2MCSR_EEMW 0x80 |
|
#define | I2MCSR_EEMR 0x40 |
|
#define | I2MCSR_AUTOLD 0x08 |
|
#define | I2MCSR_NACK 0x02 |
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#define | I2MCSR_DONE 0x01 |
|
#define | SPS_RST 0x80 |
|
#define | PCISTIKY 0x40 |
|
#define | PME_OVR 0x02 |
|
#define | STICKHW_DS1_SHADOW 0x02 |
|
#define | STICKHW_DS0_SHADOW 0x01 |
|
#define | TMCTL_TSUSP 0x04 |
|
#define | TMCTL_TMD 0x02 |
|
#define | TMCTL_TE 0x01 |
|
#define | TFTCTL_HWUTSF 0x80 |
|
#define | TFTCTL_TBTTSYNC 0x40 |
|
#define | TFTCTL_HWUTSFEN 0x20 |
|
#define | TFTCTL_TSFCNTRRD 0x10 |
|
#define | TFTCTL_TBTTSYNCEN 0x08 |
|
#define | TFTCTL_TSFSYNCEN 0x04 |
|
#define | TFTCTL_TSFCNTRST 0x02 |
|
#define | TFTCTL_TSFCNTREN 0x01 |
|
#define | EnCFG_BarkerPream 0x00020000 |
|
#define | EnCFG_NXTBTTCFPSTR 0x00010000 |
|
#define | EnCFG_BcnSusClr 0x00000200 |
|
#define | EnCFG_BcnSusInd 0x00000100 |
|
#define | EnCFG_CFP_ProtectEn 0x00000040 |
|
#define | EnCFG_ProtectMd 0x00000020 |
|
#define | EnCFG_HwParCFP 0x00000010 |
|
#define | EnCFG_CFNULRSP 0x00000004 |
|
#define | EnCFG_BBType_MASK 0x00000003 |
|
#define | EnCFG_BBType_g 0x00000002 |
|
#define | EnCFG_BBType_b 0x00000001 |
|
#define | EnCFG_BBType_a 0x00000000 |
|
#define | PAGE1_SEL 0x01 |
|
#define | CFG_TKIPOPT 0x80 |
|
#define | CFG_RXDMAOPT 0x40 |
|
#define | CFG_TMOT_SW 0x20 |
|
#define | CFG_TMOT_HWLONG 0x10 |
|
#define | CFG_TMOT_HW 0x00 |
|
#define | CFG_CFPENDOPT 0x08 |
|
#define | CFG_BCNSUSEN 0x04 |
|
#define | CFG_NOTXTIMEOUT 0x02 |
|
#define | CFG_NOBUFOPT 0x01 |
|
#define | TEST_LBEXT 0x80 |
|
#define | TEST_LBINT 0x40 |
|
#define | TEST_LBNONE 0x00 |
|
#define | TEST_SOFTINT 0x20 |
|
#define | TEST_CONTTX 0x10 |
|
#define | TEST_TXPE 0x08 |
|
#define | TEST_NAVDIS 0x04 |
|
#define | TEST_NOCTS 0x02 |
|
#define | TEST_NOACK 0x01 |
|
#define | HOSTCR_TXONST 0x80 |
|
#define | HOSTCR_RXONST 0x40 |
|
#define | HOSTCR_ADHOC 0x20 |
|
#define | HOSTCR_AP 0x10 |
|
#define | HOSTCR_TXON 0x08 |
|
#define | HOSTCR_RXON 0x04 |
|
#define | HOSTCR_MACEN 0x02 |
|
#define | HOSTCR_SOFTRST 0x01 |
|
#define | MACCR_SYNCFLUSHOK 0x04 |
|
#define | MACCR_SYNCFLUSH 0x02 |
|
#define | MACCR_CLRNAV 0x01 |
|
#define | LED_ACTSET 0x01 |
|
#define | LED_RFOFF 0x02 |
|
#define | LED_NOCONNECT 0x04 |
|
#define | RCR_SSID 0x80 |
|
#define | RCR_RXALLTYPE 0x40 |
|
#define | RCR_UNICAST 0x20 |
|
#define | RCR_BROADCAST 0x10 |
|
#define | RCR_MULTICAST 0x08 |
|
#define | RCR_WPAERR 0x04 |
|
#define | RCR_ERRCRC 0x02 |
|
#define | RCR_BSSID 0x01 |
|
#define | TCR_SYNCDCFOPT 0x02 |
|
#define | TCR_AUTOBCNTX 0x01 |
|
#define | IMR_MEASURESTART 0x80000000 |
|
#define | IMR_QUIETSTART 0x20000000 |
|
#define | IMR_RADARDETECT 0x10000000 |
|
#define | IMR_MEASUREEND 0x08000000 |
|
#define | IMR_SOFTTIMER1 0x00200000 |
|
#define | IMR_RXDMA1 0x00001000 |
|
#define | IMR_RXNOBUF 0x00000800 |
|
#define | IMR_MIBNEARFULL 0x00000400 |
|
#define | IMR_SOFTINT 0x00000200 |
|
#define | IMR_FETALERR 0x00000100 |
|
#define | IMR_WATCHDOG 0x00000080 |
|
#define | IMR_SOFTTIMER 0x00000040 |
|
#define | IMR_GPIO 0x00000020 |
|
#define | IMR_TBTT 0x00000010 |
|
#define | IMR_RXDMA0 0x00000008 |
|
#define | IMR_BNTX 0x00000004 |
|
#define | IMR_AC0DMA 0x00000002 |
|
#define | IMR_TXDMA0 0x00000001 |
|
#define | ISR_MEASURESTART 0x80000000 |
|
#define | ISR_QUIETSTART 0x20000000 |
|
#define | ISR_RADARDETECT 0x10000000 |
|
#define | ISR_MEASUREEND 0x08000000 |
|
#define | ISR_SOFTTIMER1 0x00200000 |
|
#define | ISR_RXDMA1 0x00001000 |
|
#define | ISR_RXNOBUF 0x00000800 |
|
#define | ISR_MIBNEARFULL 0x00000400 |
|
#define | ISR_SOFTINT 0x00000200 |
|
#define | ISR_FETALERR 0x00000100 |
|
#define | ISR_WATCHDOG 0x00000080 |
|
#define | ISR_SOFTTIMER 0x00000040 |
|
#define | ISR_GPIO 0x00000020 |
|
#define | ISR_TBTT 0x00000010 |
|
#define | ISR_RXDMA0 0x00000008 |
|
#define | ISR_BNTX 0x00000004 |
|
#define | ISR_AC0DMA 0x00000002 |
|
#define | ISR_TXDMA0 0x00000001 |
|
#define | PSCFG_PHILIPMD 0x40 |
|
#define | PSCFG_WAKECALEN 0x20 |
|
#define | PSCFG_WAKETMREN 0x10 |
|
#define | PSCFG_BBPSPROG 0x08 |
|
#define | PSCFG_WAKESYN 0x04 |
|
#define | PSCFG_SLEEPSYN 0x02 |
|
#define | PSCFG_AUTOSLEEP 0x01 |
|
#define | PSCTL_WAKEDONE 0x20 |
|
#define | PSCTL_PS 0x10 |
|
#define | PSCTL_GO2DOZE 0x08 |
|
#define | PSCTL_LNBCN 0x04 |
|
#define | PSCTL_ALBCN 0x02 |
|
#define | PSCTL_PSEN 0x01 |
|
#define | PSSIG_WPE3 0x80 |
|
#define | PSSIG_WPE2 0x40 |
|
#define | PSSIG_WPE1 0x20 |
|
#define | PSSIG_WRADIOPE 0x10 |
|
#define | PSSIG_SPE3 0x08 |
|
#define | PSSIG_SPE2 0x04 |
|
#define | PSSIG_SPE1 0x02 |
|
#define | PSSIG_SRADIOPE 0x01 |
|
#define | BBREGCTL_DONE 0x04 |
|
#define | BBREGCTL_REGR 0x02 |
|
#define | BBREGCTL_REGW 0x01 |
|
#define | IFREGCTL_DONE 0x04 |
|
#define | IFREGCTL_IFRF 0x02 |
|
#define | IFREGCTL_REGW 0x01 |
|
#define | SOFTPWRCTL_RFLEOPT 0x0800 |
|
#define | SOFTPWRCTL_TXPEINV 0x0200 |
|
#define | SOFTPWRCTL_SWPECTI 0x0100 |
|
#define | SOFTPWRCTL_SWPAPE 0x0020 |
|
#define | SOFTPWRCTL_SWCALEN 0x0010 |
|
#define | SOFTPWRCTL_SWRADIO_PE 0x0008 |
|
#define | SOFTPWRCTL_SWPE2 0x0004 |
|
#define | SOFTPWRCTL_SWPE1 0x0002 |
|
#define | SOFTPWRCTL_SWPE3 0x0001 |
|
#define | GPIO1_DATA1 0x20 |
|
#define | GPIO1_MD1 0x10 |
|
#define | GPIO1_DATA0 0x02 |
|
#define | GPIO1_MD0 0x01 |
|
#define | DMACTL_CLRRUN 0x00080000 |
|
#define | DMACTL_RUN 0x00000008 |
|
#define | DMACTL_WAKE 0x00000004 |
|
#define | DMACTL_DEAD 0x00000002 |
|
#define | DMACTL_ACTIVE 0x00000001 |
|
#define | RX_PERPKT 0x00000100 |
|
#define | RX_PERPKTCLR 0x01000000 |
|
#define | BEACON_READY 0x01 |
|
#define | MISCFFCTL_WRITE 0x0001 |
|
#define | WAKEUPEN0_DIRPKT 0x10 |
|
#define | WAKEUPEN0_LINKOFF 0x08 |
|
#define | WAKEUPEN0_ATIMEN 0x04 |
|
#define | WAKEUPEN0_TIMEN 0x02 |
|
#define | WAKEUPEN0_MAGICEN 0x01 |
|
#define | WAKEUPEN1_128_3 0x08 |
|
#define | WAKEUPEN1_128_2 0x04 |
|
#define | WAKEUPEN1_128_1 0x02 |
|
#define | WAKEUPEN1_128_0 0x01 |
|
#define | WAKEUPSR0_DIRPKT 0x10 |
|
#define | WAKEUPSR0_LINKOFF 0x08 |
|
#define | WAKEUPSR0_ATIMEN 0x04 |
|
#define | WAKEUPSR0_TIMEN 0x02 |
|
#define | WAKEUPSR0_MAGICEN 0x01 |
|
#define | WAKEUPSR1_128_3 0x08 |
|
#define | WAKEUPSR1_128_2 0x04 |
|
#define | WAKEUPSR1_128_1 0x02 |
|
#define | WAKEUPSR1_128_0 0x01 |
|
#define | GPIO0_MD 0x01 |
|
#define | GPIO0_DATA 0x02 |
|
#define | GPIO0_INTMD 0x04 |
|
#define | GPIO1_MD 0x10 |
|
#define | GPIO1_DATA 0x20 |
|
#define | MSRCTL_FINISH 0x80 |
|
#define | MSRCTL_READY 0x40 |
|
#define | MSRCTL_RADARDETECT 0x20 |
|
#define | MSRCTL_EN 0x10 |
|
#define | MSRCTL_QUIETTXCHK 0x08 |
|
#define | MSRCTL_QUIETRPT 0x04 |
|
#define | MSRCTL_QUIETINT 0x02 |
|
#define | MSRCTL_QUIETEN 0x01 |
|
#define | MSRCTL1_TXPWR 0x08 |
|
#define | MSRCTL1_CSAPAREN 0x04 |
|
#define | MSRCTL1_TXPAUSE 0x01 |
|
#define | MAC_LB_EXT 0x02 |
|
#define | MAC_LB_INTERNAL 0x01 |
|
#define | MAC_LB_NONE 0x00 |
|
#define | PKT_TYPE_NONE 0x00 |
|
#define | PKT_TYPE_ALL_MULTICAST 0x80 |
|
#define | PKT_TYPE_PROMISCUOUS 0x40 |
|
#define | PKT_TYPE_DIRECTED 0x20 |
|
#define | PKT_TYPE_BROADCAST 0x10 |
|
#define | PKT_TYPE_MULTICAST 0x08 |
|
#define | PKT_TYPE_ERROR_WPA 0x04 |
|
#define | PKT_TYPE_ERROR_CRC 0x02 |
|
#define | PKT_TYPE_BSSID 0x01 |
|
#define | Default_BI 0x200 |
|
#define | MISCFIFO_KEYETRY0 32 |
|
#define | MISCFIFO_KEYENTRYSIZE 22 |
|
#define | MISCFIFO_SYNINFO_IDX 10 |
|
#define | MISCFIFO_SYNDATA_IDX 11 |
|
#define | MISCFIFO_SYNDATASIZE 21 |
|
#define | IMR_MASK_VALUE |
|
#define | W_MAX_TIMEOUT 0xFFF0U |
|
#define | CB_DELAY_LOOP_WAIT 10 |
|
#define | REV_ID_VT3253_A0 0x00 |
|
#define | REV_ID_VT3253_A1 0x01 |
|
#define | REV_ID_VT3253_B0 0x08 |
|
#define | REV_ID_VT3253_B1 0x09 |
|
#define | MACvRegBitsOn(dwIoBase, byRegOfs, byBits) |
|
#define | MACvWordRegBitsOn(dwIoBase, byRegOfs, wBits) |
|
#define | MACvDWordRegBitsOn(dwIoBase, byRegOfs, dwBits) |
|
#define | MACvRegBitsOnEx(dwIoBase, byRegOfs, byMask, byBits) |
|
#define | MACvRegBitsOff(dwIoBase, byRegOfs, byBits) |
|
#define | MACvWordRegBitsOff(dwIoBase, byRegOfs, wBits) |
|
#define | MACvDWordRegBitsOff(dwIoBase, byRegOfs, dwBits) |
|
#define | MACvGetCurrRx0DescAddr(dwIoBase, pdwCurrDescAddr) |
|
#define | MACvGetCurrRx1DescAddr(dwIoBase, pdwCurrDescAddr) |
|
#define | MACvGetCurrTx0DescAddr(dwIoBase, pdwCurrDescAddr) |
|
#define | MACvGetCurrAC0DescAddr(dwIoBase, pdwCurrDescAddr) |
|
#define | MACvGetCurrSyncDescAddr(dwIoBase, pdwCurrDescAddr) |
|
#define | MACvGetCurrATIMDescAddr(dwIoBase, pdwCurrDescAddr) |
|
#define | MACvSetCurrBCNTxDescAddr(dwIoBase, dwCurrDescAddr) |
|
#define | MACvSetCurrBCNLength(dwIoBase, wCurrBCNLength) |
|
#define | MACvReadBSSIDAddress(dwIoBase, pbyEtherAddr) |
|
#define | MACvWriteBSSIDAddress(dwIoBase, pbyEtherAddr) |
|
#define | MACvReadEtherAddress(dwIoBase, pbyEtherAddr) |
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#define | MACvWriteEtherAddress(dwIoBase, pbyEtherAddr) |
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#define | MACvClearISR(dwIoBase) |
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#define | MACvStart(dwIoBase) |
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#define | MACvRx0PerPktMode(dwIoBase) |
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#define | MACvRx0BufferFillMode(dwIoBase) |
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#define | MACvRx1PerPktMode(dwIoBase) |
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#define | MACvRx1BufferFillMode(dwIoBase) |
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#define | MACvRxOn(dwIoBase) |
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#define | MACvReceive0(dwIoBase) |
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#define | MACvReceive1(dwIoBase) |
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#define | MACvTxOn(dwIoBase) |
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#define | MACvTransmit0(dwIoBase) |
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#define | MACvTransmitAC0(dwIoBase) |
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#define | MACvTransmitSYNC(dwIoBase) |
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#define | MACvTransmitATIM(dwIoBase) |
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#define | MACvTransmitBCN(dwIoBase) |
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#define | MACvClearStckDS(dwIoBase) |
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#define | MACvReadISR(dwIoBase, pdwValue) |
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#define | MACvWriteISR(dwIoBase, dwValue) |
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#define | MACvIntEnable(dwIoBase, dwMask) |
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#define | MACvIntDisable(dwIoBase) |
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#define | MACvSelectPage0(dwIoBase) |
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#define | MACvSelectPage1(dwIoBase) |
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#define | MACvReadMIBCounter(dwIoBase, pdwCounter) |
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#define | MACvPwrEvntDisable(dwIoBase) |
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#define | MACvEnableProtectMD(dwIoBase) |
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#define | MACvDisableProtectMD(dwIoBase) |
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#define | MACvEnableBarkerPreambleMd(dwIoBase) |
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#define | MACvDisableBarkerPreambleMd(dwIoBase) |
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#define | MACvSetBBType(dwIoBase, byTyp) |
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#define | MACvReadATIMW(dwIoBase, pwCounter) |
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#define | MACvWriteATIMW(dwIoBase, wCounter) |
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#define | MACvWriteCRC16_128(dwIoBase, byRegOfs, wCRC) |
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#define | MACvGPIOIn(dwIoBase, pbyValue) |
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#define | MACvSetRFLE_LatchBase(dwIoBase) |
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void | MACvReadAllRegs (unsigned long dwIoBase, unsigned char *pbyMacRegs) |
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bool | MACbIsRegBitsOn (unsigned long dwIoBase, unsigned char byRegOfs, unsigned char byTestBits) |
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bool | MACbIsRegBitsOff (unsigned long dwIoBase, unsigned char byRegOfs, unsigned char byTestBits) |
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bool | MACbIsIntDisable (unsigned long dwIoBase) |
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unsigned char | MACbyReadMultiAddr (unsigned long dwIoBase, unsigned int uByteIdx) |
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void | MACvWriteMultiAddr (unsigned long dwIoBase, unsigned int uByteIdx, unsigned char byData) |
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void | MACvSetMultiAddrByHash (unsigned long dwIoBase, unsigned char byHashIdx) |
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void | MACvResetMultiAddrByHash (unsigned long dwIoBase, unsigned char byHashIdx) |
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void | MACvSetRxThreshold (unsigned long dwIoBase, unsigned char byThreshold) |
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void | MACvGetRxThreshold (unsigned long dwIoBase, unsigned char *pbyThreshold) |
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void | MACvSetTxThreshold (unsigned long dwIoBase, unsigned char byThreshold) |
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void | MACvGetTxThreshold (unsigned long dwIoBase, unsigned char *pbyThreshold) |
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void | MACvSetDmaLength (unsigned long dwIoBase, unsigned char byDmaLength) |
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void | MACvGetDmaLength (unsigned long dwIoBase, unsigned char *pbyDmaLength) |
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void | MACvSetShortRetryLimit (unsigned long dwIoBase, unsigned char byRetryLimit) |
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void | MACvGetShortRetryLimit (unsigned long dwIoBase, unsigned char *pbyRetryLimit) |
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void | MACvSetLongRetryLimit (unsigned long dwIoBase, unsigned char byRetryLimit) |
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void | MACvGetLongRetryLimit (unsigned long dwIoBase, unsigned char *pbyRetryLimit) |
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void | MACvSetLoopbackMode (unsigned long dwIoBase, unsigned char byLoopbackMode) |
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bool | MACbIsInLoopbackMode (unsigned long dwIoBase) |
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void | MACvSetPacketFilter (unsigned long dwIoBase, unsigned short wFilterType) |
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void | MACvSaveContext (unsigned long dwIoBase, unsigned char *pbyCxtBuf) |
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void | MACvRestoreContext (unsigned long dwIoBase, unsigned char *pbyCxtBuf) |
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bool | MACbCompareContext (unsigned long dwIoBase, unsigned char *pbyCxtBuf) |
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bool | MACbSoftwareReset (unsigned long dwIoBase) |
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bool | MACbSafeSoftwareReset (unsigned long dwIoBase) |
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bool | MACbSafeRxOff (unsigned long dwIoBase) |
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bool | MACbSafeTxOff (unsigned long dwIoBase) |
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bool | MACbSafeStop (unsigned long dwIoBase) |
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bool | MACbShutdown (unsigned long dwIoBase) |
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void | MACvInitialize (unsigned long dwIoBase) |
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void | MACvSetCurrRx0DescAddr (unsigned long dwIoBase, unsigned long dwCurrDescAddr) |
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void | MACvSetCurrRx1DescAddr (unsigned long dwIoBase, unsigned long dwCurrDescAddr) |
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void | MACvSetCurrTXDescAddr (int iTxType, unsigned long dwIoBase, unsigned long dwCurrDescAddr) |
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void | MACvSetCurrTx0DescAddrEx (unsigned long dwIoBase, unsigned long dwCurrDescAddr) |
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void | MACvSetCurrAC0DescAddrEx (unsigned long dwIoBase, unsigned long dwCurrDescAddr) |
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void | MACvSetCurrSyncDescAddrEx (unsigned long dwIoBase, unsigned long dwCurrDescAddr) |
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void | MACvSetCurrATIMDescAddrEx (unsigned long dwIoBase, unsigned long dwCurrDescAddr) |
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void | MACvTimer0MicroSDelay (unsigned long dwIoBase, unsigned int uDelay) |
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void | MACvOneShotTimer0MicroSec (unsigned long dwIoBase, unsigned int uDelayTime) |
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void | MACvOneShotTimer1MicroSec (unsigned long dwIoBase, unsigned int uDelayTime) |
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void | MACvSetMISCFifo (unsigned long dwIoBase, unsigned short wOffset, unsigned long dwData) |
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bool | MACbTxDMAOff (unsigned long dwIoBase, unsigned int idx) |
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void | MACvClearBusSusInd (unsigned long dwIoBase) |
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void | MACvEnableBusSusEn (unsigned long dwIoBase) |
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bool | MACbFlushSYNCFifo (unsigned long dwIoBase) |
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bool | MACbPSWakeup (unsigned long dwIoBase) |
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void | MACvSetKeyEntry (unsigned long dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx, unsigned int uKeyIdx, unsigned char *pbyAddr, unsigned long *pdwKey, unsigned char byLocalID) |
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void | MACvDisableKeyEntry (unsigned long dwIoBase, unsigned int uEntryIdx) |
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void | MACvSetDefaultKeyEntry (unsigned long dwIoBase, unsigned int uKeyLen, unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID) |
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void | MACvDisableDefaultKey (unsigned long dwIoBase) |
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void | MACvSetDefaultTKIPKeyEntry (unsigned long dwIoBase, unsigned int uKeyLen, unsigned int uKeyIdx, unsigned long *pdwKey, unsigned char byLocalID) |
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void | MACvSetDefaultKeyCtl (unsigned long dwIoBase, unsigned short wKeyCtl, unsigned int uEntryIdx, unsigned char byLocalID) |
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