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Macros
drxd_map_firm.h File Reference

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Macros

#define HI_COMM_EXEC__A   0x400000
 
#define HI_COMM_MB__A   0x400002
 
#define HI_CT_REG_COMM_STATE__A   0x410001
 
#define HI_RA_RAM_SRV_RES__A   0x420031
 
#define HI_RA_RAM_SRV_CMD__A   0x420032
 
#define HI_RA_RAM_SRV_CMD_RESET   0x2
 
#define HI_RA_RAM_SRV_CMD_CONFIG   0x3
 
#define HI_RA_RAM_SRV_CMD_EXECUTE   0x6
 
#define HI_RA_RAM_SRV_RST_KEY__A   0x420033
 
#define HI_RA_RAM_SRV_RST_KEY_ACT   0x3973
 
#define HI_RA_RAM_SRV_CFG_KEY__A   0x420033
 
#define HI_RA_RAM_SRV_CFG_DIV__A   0x420034
 
#define HI_RA_RAM_SRV_CFG_BDL__A   0x420035
 
#define HI_RA_RAM_SRV_CFG_WUP__A   0x420036
 
#define HI_RA_RAM_SRV_CFG_ACT__A   0x420037
 
#define HI_RA_RAM_SRV_CFG_ACT_SLV0_ON   0x1
 
#define HI_RA_RAM_SRV_CFG_ACT_BRD__M   0x4
 
#define HI_RA_RAM_SRV_CFG_ACT_BRD_OFF   0x0
 
#define HI_RA_RAM_SRV_CFG_ACT_BRD_ON   0x4
 
#define HI_RA_RAM_SRV_CFG_ACT_PWD_EXE   0x8
 
#define HI_RA_RAM_USR_BEGIN__A   0x420040
 
#define HI_IF_RAM_TRP_BPT0__AX   0x430000
 
#define HI_IF_RAM_USR_BEGIN__A   0x430200
 
#define SC_COMM_EXEC__A   0x800000
 
#define SC_COMM_EXEC_CTL_STOP   0x0
 
#define SC_COMM_STATE__A   0x800001
 
#define SC_RA_RAM_PARAM0__A   0x820040
 
#define SC_RA_RAM_PARAM1__A   0x820041
 
#define SC_RA_RAM_CMD_ADDR__A   0x820042
 
#define SC_RA_RAM_CMD__A   0x820043
 
#define SC_RA_RAM_CMD_PROC_START   0x1
 
#define SC_RA_RAM_CMD_SET_PREF_PARAM   0x3
 
#define SC_RA_RAM_CMD_GET_OP_PARAM   0x5
 
#define SC_RA_RAM_SW_EVENT_RUN_NMASK__M   0x1
 
#define SC_RA_RAM_LOCKTRACK_MIN   0x1
 
#define SC_RA_RAM_OP_PARAM_MODE_2K   0x0
 
#define SC_RA_RAM_OP_PARAM_MODE_8K   0x1
 
#define SC_RA_RAM_OP_PARAM_GUARD_32   0x0
 
#define SC_RA_RAM_OP_PARAM_GUARD_16   0x4
 
#define SC_RA_RAM_OP_PARAM_GUARD_8   0x8
 
#define SC_RA_RAM_OP_PARAM_GUARD_4   0xC
 
#define SC_RA_RAM_OP_PARAM_CONST_QPSK   0x0
 
#define SC_RA_RAM_OP_PARAM_CONST_QAM16   0x10
 
#define SC_RA_RAM_OP_PARAM_CONST_QAM64   0x20
 
#define SC_RA_RAM_OP_PARAM_HIER_NO   0x0
 
#define SC_RA_RAM_OP_PARAM_HIER_A1   0x40
 
#define SC_RA_RAM_OP_PARAM_HIER_A2   0x80
 
#define SC_RA_RAM_OP_PARAM_HIER_A4   0xC0
 
#define SC_RA_RAM_OP_PARAM_RATE_1_2   0x0
 
#define SC_RA_RAM_OP_PARAM_RATE_2_3   0x200
 
#define SC_RA_RAM_OP_PARAM_RATE_3_4   0x400
 
#define SC_RA_RAM_OP_PARAM_RATE_5_6   0x600
 
#define SC_RA_RAM_OP_PARAM_RATE_7_8   0x800
 
#define SC_RA_RAM_OP_PARAM_PRIO_HI   0x0
 
#define SC_RA_RAM_OP_PARAM_PRIO_LO   0x1000
 
#define SC_RA_RAM_OP_AUTO_MODE__M   0x1
 
#define SC_RA_RAM_OP_AUTO_GUARD__M   0x2
 
#define SC_RA_RAM_OP_AUTO_CONST__M   0x4
 
#define SC_RA_RAM_OP_AUTO_HIER__M   0x8
 
#define SC_RA_RAM_OP_AUTO_RATE__M   0x10
 
#define SC_RA_RAM_LOCK__A   0x82004B
 
#define SC_RA_RAM_LOCK_DEMOD__M   0x1
 
#define SC_RA_RAM_LOCK_FEC__M   0x2
 
#define SC_RA_RAM_LOCK_MPEG__M   0x4
 
#define SC_RA_RAM_BE_OPT_ENA__A   0x82004C
 
#define SC_RA_RAM_BE_OPT_ENA_CP_OPT   0x1
 
#define SC_RA_RAM_BE_OPT_DELAY__A   0x82004D
 
#define SC_RA_RAM_CONFIG__A   0x820050
 
#define SC_RA_RAM_CONFIG_FR_ENABLE__M   0x4
 
#define SC_RA_RAM_CONFIG_FREQSCAN__M   0x10
 
#define SC_RA_RAM_CONFIG_SLAVE__M   0x20
 
#define SC_RA_RAM_IF_SAVE__AX   0x82008E
 
#define SC_RA_RAM_IR_COARSE_2K_LENGTH__A   0x8200D1
 
#define SC_RA_RAM_IR_COARSE_2K_LENGTH__PRE   0x9
 
#define SC_RA_RAM_IR_COARSE_2K_FREQINC__A   0x8200D2
 
#define SC_RA_RAM_IR_COARSE_2K_FREQINC__PRE   0x4
 
#define SC_RA_RAM_IR_COARSE_2K_KAISINC__A   0x8200D3
 
#define SC_RA_RAM_IR_COARSE_2K_KAISINC__PRE   0x100
 
#define SC_RA_RAM_IR_COARSE_8K_LENGTH__A   0x8200D4
 
#define SC_RA_RAM_IR_COARSE_8K_LENGTH__PRE   0x8
 
#define SC_RA_RAM_IR_COARSE_8K_FREQINC__A   0x8200D5
 
#define SC_RA_RAM_IR_COARSE_8K_FREQINC__PRE   0x8
 
#define SC_RA_RAM_IR_COARSE_8K_KAISINC__A   0x8200D6
 
#define SC_RA_RAM_IR_COARSE_8K_KAISINC__PRE   0x200
 
#define SC_RA_RAM_IR_FINE_2K_LENGTH__A   0x8200D7
 
#define SC_RA_RAM_IR_FINE_2K_LENGTH__PRE   0x9
 
#define SC_RA_RAM_IR_FINE_2K_FREQINC__A   0x8200D8
 
#define SC_RA_RAM_IR_FINE_2K_FREQINC__PRE   0x4
 
#define SC_RA_RAM_IR_FINE_2K_KAISINC__A   0x8200D9
 
#define SC_RA_RAM_IR_FINE_2K_KAISINC__PRE   0x100
 
#define SC_RA_RAM_IR_FINE_8K_LENGTH__A   0x8200DA
 
#define SC_RA_RAM_IR_FINE_8K_LENGTH__PRE   0xB
 
#define SC_RA_RAM_IR_FINE_8K_FREQINC__A   0x8200DB
 
#define SC_RA_RAM_IR_FINE_8K_FREQINC__PRE   0x1
 
#define SC_RA_RAM_IR_FINE_8K_KAISINC__A   0x8200DC
 
#define SC_RA_RAM_IR_FINE_8K_KAISINC__PRE   0x40
 
#define SC_RA_RAM_ECHO_SHIFT_LIM__A   0x8200DD
 
#define SC_RA_RAM_SAMPLE_RATE_COUNT__A   0x8200E8
 
#define SC_RA_RAM_SAMPLE_RATE_STEP__A   0x8200E9
 
#define SC_RA_RAM_BAND__A   0x8200EC
 
#define SC_RA_RAM_LC_ABS_2K__A   0x8200F4
 
#define SC_RA_RAM_LC_ABS_2K__PRE   0x1F
 
#define SC_RA_RAM_LC_ABS_8K__A   0x8200F5
 
#define SC_RA_RAM_LC_ABS_8K__PRE   0x1F
 
#define SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE   0x1D6
 
#define SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE   0x4
 
#define SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE   0x1BB
 
#define SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE   0x5
 
#define SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE   0x1EF
 
#define SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE   0x5
 
#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE   0x15E
 
#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE   0x5
 
#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE   0x11A
 
#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE   0x6
 
#define SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE   0x1FB
 
#define SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE   0x5
 
#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE   0x12F
 
#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE   0x5
 
#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE   0x197
 
#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE   0x5
 
#define SC_RA_RAM_DRIVER_VERSION__AX   0x8201FE
 
#define SC_RA_RAM_PROC_LOCKTRACK   0x0
 
#define FE_COMM_EXEC__A   0xC00000
 
#define FE_AD_REG_COMM_EXEC__A   0xC10000
 
#define FE_AD_REG_FDB_IN__A   0xC10012
 
#define FE_AD_REG_PD__A   0xC10013
 
#define FE_AD_REG_INVEXT__A   0xC10014
 
#define FE_AD_REG_CLKNEG__A   0xC10015
 
#define FE_AG_REG_COMM_EXEC__A   0xC20000
 
#define FE_AG_REG_AG_MODE_LOP__A   0xC20010
 
#define FE_AG_REG_AG_MODE_LOP_MODE_4__M   0x10
 
#define FE_AG_REG_AG_MODE_LOP_MODE_4_STATIC   0x0
 
#define FE_AG_REG_AG_MODE_LOP_MODE_4_DYNAMIC   0x10
 
#define FE_AG_REG_AG_MODE_LOP_MODE_5__M   0x20
 
#define FE_AG_REG_AG_MODE_LOP_MODE_5_STATIC   0x0
 
#define FE_AG_REG_AG_MODE_LOP_MODE_C__M   0x1000
 
#define FE_AG_REG_AG_MODE_LOP_MODE_C_STATIC   0x0
 
#define FE_AG_REG_AG_MODE_LOP_MODE_C_DYNAMIC   0x1000
 
#define FE_AG_REG_AG_MODE_LOP_MODE_E__M   0x4000
 
#define FE_AG_REG_AG_MODE_LOP_MODE_E_STATIC   0x0
 
#define FE_AG_REG_AG_MODE_LOP_MODE_E_DYNAMIC   0x4000
 
#define FE_AG_REG_AG_MODE_HIP__A   0xC20011
 
#define FE_AG_REG_AG_PGA_MODE__A   0xC20012
 
#define FE_AG_REG_AG_PGA_MODE_PFY_PCY_AFY_REN   0x0
 
#define FE_AG_REG_AG_PGA_MODE_PFN_PCN_AFY_REN   0x1
 
#define FE_AG_REG_AG_AGC_SIO__A   0xC20013
 
#define FE_AG_REG_AG_AGC_SIO_AGC_SIO_2__M   0x2
 
#define FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_OUTPUT   0x0
 
#define FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_INPUT   0x2
 
#define FE_AG_REG_AG_PWD__A   0xC20015
 
#define FE_AG_REG_AG_PWD_PWD_PD2__M   0x2
 
#define FE_AG_REG_AG_PWD_PWD_PD2_DISABLE   0x0
 
#define FE_AG_REG_AG_PWD_PWD_PD2_ENABLE   0x2
 
#define FE_AG_REG_DCE_AUR_CNT__A   0xC20016
 
#define FE_AG_REG_DCE_RUR_CNT__A   0xC20017
 
#define FE_AG_REG_ACE_AUR_CNT__A   0xC2001A
 
#define FE_AG_REG_ACE_RUR_CNT__A   0xC2001B
 
#define FE_AG_REG_CDR_RUR_CNT__A   0xC20020
 
#define FE_AG_REG_EGC_RUR_CNT__A   0xC20024
 
#define FE_AG_REG_EGC_SET_LVL__A   0xC20025
 
#define FE_AG_REG_EGC_SET_LVL__M   0x1FF
 
#define FE_AG_REG_EGC_FLA_RGN__A   0xC20026
 
#define FE_AG_REG_EGC_SLO_RGN__A   0xC20027
 
#define FE_AG_REG_EGC_JMP_PSN__A   0xC20028
 
#define FE_AG_REG_EGC_FLA_INC__A   0xC20029
 
#define FE_AG_REG_EGC_FLA_DEC__A   0xC2002A
 
#define FE_AG_REG_EGC_SLO_INC__A   0xC2002B
 
#define FE_AG_REG_EGC_SLO_DEC__A   0xC2002C
 
#define FE_AG_REG_EGC_FAS_INC__A   0xC2002D
 
#define FE_AG_REG_EGC_FAS_DEC__A   0xC2002E
 
#define FE_AG_REG_PM1_AGC_WRI__A   0xC20030
 
#define FE_AG_REG_PM1_AGC_WRI__M   0x7FF
 
#define FE_AG_REG_GC1_AGC_RIC__A   0xC20031
 
#define FE_AG_REG_GC1_AGC_OFF__A   0xC20032
 
#define FE_AG_REG_GC1_AGC_MAX__A   0xC20033
 
#define FE_AG_REG_GC1_AGC_MIN__A   0xC20034
 
#define FE_AG_REG_GC1_AGC_DAT__A   0xC20035
 
#define FE_AG_REG_GC1_AGC_DAT__M   0x3FF
 
#define FE_AG_REG_PM2_AGC_WRI__A   0xC20036
 
#define FE_AG_REG_IND_WIN__A   0xC2003C
 
#define FE_AG_REG_IND_THD_LOL__A   0xC2003D
 
#define FE_AG_REG_IND_THD_HIL__A   0xC2003E
 
#define FE_AG_REG_IND_DEL__A   0xC2003F
 
#define FE_AG_REG_IND_PD1_WRI__A   0xC20040
 
#define FE_AG_REG_PDA_AUR_CNT__A   0xC20041
 
#define FE_AG_REG_PDA_RUR_CNT__A   0xC20042
 
#define FE_AG_REG_PDA_AVE_DAT__A   0xC20043
 
#define FE_AG_REG_PDC_RUR_CNT__A   0xC20044
 
#define FE_AG_REG_PDC_SET_LVL__A   0xC20045
 
#define FE_AG_REG_PDC_FLA_RGN__A   0xC20046
 
#define FE_AG_REG_PDC_JMP_PSN__A   0xC20047
 
#define FE_AG_REG_PDC_FLA_STP__A   0xC20048
 
#define FE_AG_REG_PDC_SLO_STP__A   0xC20049
 
#define FE_AG_REG_PDC_PD2_WRI__A   0xC2004A
 
#define FE_AG_REG_PDC_MAP_DAT__A   0xC2004B
 
#define FE_AG_REG_PDC_MAX__A   0xC2004C
 
#define FE_AG_REG_TGA_AUR_CNT__A   0xC2004D
 
#define FE_AG_REG_TGA_RUR_CNT__A   0xC2004E
 
#define FE_AG_REG_TGA_AVE_DAT__A   0xC2004F
 
#define FE_AG_REG_TGC_RUR_CNT__A   0xC20050
 
#define FE_AG_REG_TGC_SET_LVL__A   0xC20051
 
#define FE_AG_REG_TGC_SET_LVL__M   0x3F
 
#define FE_AG_REG_TGC_FLA_RGN__A   0xC20052
 
#define FE_AG_REG_TGC_JMP_PSN__A   0xC20053
 
#define FE_AG_REG_TGC_FLA_STP__A   0xC20054
 
#define FE_AG_REG_TGC_SLO_STP__A   0xC20055
 
#define FE_AG_REG_TGC_MAP_DAT__A   0xC20056
 
#define FE_AG_REG_FGA_AUR_CNT__A   0xC20057
 
#define FE_AG_REG_FGA_RUR_CNT__A   0xC20058
 
#define FE_AG_REG_FGM_WRI__A   0xC20061
 
#define FE_AG_REG_BGC_FGC_WRI__A   0xC20068
 
#define FE_AG_REG_BGC_CGC_WRI__A   0xC20069
 
#define FE_FS_REG_COMM_EXEC__A   0xC30000
 
#define FE_FS_REG_ADD_INC_LOP__A   0xC30010
 
#define FE_FD_REG_COMM_EXEC__A   0xC40000
 
#define FE_FD_REG_SCL__A   0xC40010
 
#define FE_FD_REG_MAX_LEV__A   0xC40011
 
#define FE_FD_REG_NR__A   0xC40012
 
#define FE_FD_REG_MEAS_VAL__A   0xC40014
 
#define FE_IF_REG_COMM_EXEC__A   0xC50000
 
#define FE_IF_REG_INCR0__A   0xC50010
 
#define FE_IF_REG_INCR0__W   16
 
#define FE_IF_REG_INCR0__M   0xFFFF
 
#define FE_IF_REG_INCR1__A   0xC50011
 
#define FE_IF_REG_INCR1__M   0xFF
 
#define FE_CF_REG_COMM_EXEC__A   0xC60000
 
#define FE_CF_REG_SCL__A   0xC60010
 
#define FE_CF_REG_MAX_LEV__A   0xC60011
 
#define FE_CF_REG_NR__A   0xC60012
 
#define FE_CF_REG_IMP_VAL__A   0xC60013
 
#define FE_CF_REG_MEAS_VAL__A   0xC60014
 
#define FE_CU_REG_COMM_EXEC__A   0xC70000
 
#define FE_CU_REG_FRM_CNT_RST__A   0xC70011
 
#define FE_CU_REG_FRM_CNT_STR__A   0xC70012
 
#define FT_COMM_EXEC__A   0x1000000
 
#define FT_REG_COMM_EXEC__A   0x1010000
 
#define CP_COMM_EXEC__A   0x1400000
 
#define CP_REG_COMM_EXEC__A   0x1410000
 
#define CP_REG_INTERVAL__A   0x1410011
 
#define CP_REG_BR_SPL_OFFSET__A   0x1410023
 
#define CP_REG_BR_STR_DEL__A   0x1410024
 
#define CP_REG_RT_ANG_INC0__A   0x1410030
 
#define CP_REG_RT_ANG_INC1__A   0x1410031
 
#define CP_REG_RT_DETECT_ENA__A   0x1410032
 
#define CP_REG_RT_DETECT_TRH__A   0x1410033
 
#define CP_REG_RT_EXP_MARG__A   0x141003E
 
#define CP_REG_AC_NEXP_OFFS__A   0x1410040
 
#define CP_REG_AC_AVER_POW__A   0x1410041
 
#define CP_REG_AC_MAX_POW__A   0x1410042
 
#define CP_REG_AC_WEIGHT_MAN__A   0x1410043
 
#define CP_REG_AC_WEIGHT_EXP__A   0x1410044
 
#define CP_REG_AC_AMP_MODE__A   0x1410047
 
#define CP_REG_AC_AMP_FIX__A   0x1410048
 
#define CP_REG_AC_ANG_MODE__A   0x141004A
 
#define CE_COMM_EXEC__A   0x1800000
 
#define CE_REG_COMM_EXEC__A   0x1810000
 
#define CE_REG_TAPSET__A   0x1810011
 
#define CE_REG_AVG_POW__A   0x1810012
 
#define CE_REG_MAX_POW__A   0x1810013
 
#define CE_REG_ATT__A   0x1810014
 
#define CE_REG_NRED__A   0x1810015
 
#define CE_REG_NE_ERR_SELECT__A   0x1810043
 
#define CE_REG_NE_TD_CAL__A   0x1810044
 
#define CE_REG_NE_MIXAVG__A   0x1810046
 
#define CE_REG_NE_NUPD_OFS__A   0x1810047
 
#define CE_REG_PE_NEXP_OFFS__A   0x1810050
 
#define CE_REG_PE_TIMESHIFT__A   0x1810051
 
#define CE_REG_TP_A0_TAP_NEW__A   0x1810064
 
#define CE_REG_TP_A0_TAP_NEW_VALID__A   0x1810065
 
#define CE_REG_TP_A0_MU_LMS_STEP__A   0x1810066
 
#define CE_REG_TP_A1_TAP_NEW__A   0x1810068
 
#define CE_REG_TP_A1_TAP_NEW_VALID__A   0x1810069
 
#define CE_REG_TP_A1_MU_LMS_STEP__A   0x181006A
 
#define CE_REG_TI_NEXP_OFFS__A   0x1810070
 
#define CE_REG_FI_SHT_INCR__A   0x1810090
 
#define CE_REG_FI_EXP_NORM__A   0x1810091
 
#define CE_REG_IR_INPUTSEL__A   0x18100A0
 
#define CE_REG_IR_STARTPOS__A   0x18100A1
 
#define CE_REG_IR_NEXP_THRES__A   0x18100A2
 
#define CE_REG_FR_TREAL00__A   0x1820010
 
#define CE_REG_FR_TIMAG00__A   0x1820011
 
#define CE_REG_FR_TREAL01__A   0x1820012
 
#define CE_REG_FR_TIMAG01__A   0x1820013
 
#define CE_REG_FR_TREAL02__A   0x1820014
 
#define CE_REG_FR_TIMAG02__A   0x1820015
 
#define CE_REG_FR_TREAL03__A   0x1820016
 
#define CE_REG_FR_TIMAG03__A   0x1820017
 
#define CE_REG_FR_TREAL04__A   0x1820018
 
#define CE_REG_FR_TIMAG04__A   0x1820019
 
#define CE_REG_FR_TREAL05__A   0x182001A
 
#define CE_REG_FR_TIMAG05__A   0x182001B
 
#define CE_REG_FR_TREAL06__A   0x182001C
 
#define CE_REG_FR_TIMAG06__A   0x182001D
 
#define CE_REG_FR_TREAL07__A   0x182001E
 
#define CE_REG_FR_TIMAG07__A   0x182001F
 
#define CE_REG_FR_TREAL08__A   0x1820020
 
#define CE_REG_FR_TIMAG08__A   0x1820021
 
#define CE_REG_FR_TREAL09__A   0x1820022
 
#define CE_REG_FR_TIMAG09__A   0x1820023
 
#define CE_REG_FR_TREAL10__A   0x1820024
 
#define CE_REG_FR_TIMAG10__A   0x1820025
 
#define CE_REG_FR_TREAL11__A   0x1820026
 
#define CE_REG_FR_TIMAG11__A   0x1820027
 
#define CE_REG_FR_MID_TAP__A   0x1820028
 
#define CE_REG_FR_SQS_G00__A   0x1820029
 
#define CE_REG_FR_SQS_G01__A   0x182002A
 
#define CE_REG_FR_SQS_G02__A   0x182002B
 
#define CE_REG_FR_SQS_G03__A   0x182002C
 
#define CE_REG_FR_SQS_G04__A   0x182002D
 
#define CE_REG_FR_SQS_G05__A   0x182002E
 
#define CE_REG_FR_SQS_G06__A   0x182002F
 
#define CE_REG_FR_SQS_G07__A   0x1820030
 
#define CE_REG_FR_SQS_G08__A   0x1820031
 
#define CE_REG_FR_SQS_G09__A   0x1820032
 
#define CE_REG_FR_SQS_G10__A   0x1820033
 
#define CE_REG_FR_SQS_G11__A   0x1820034
 
#define CE_REG_FR_SQS_G12__A   0x1820035
 
#define CE_REG_FR_RIO_G00__A   0x1820036
 
#define CE_REG_FR_RIO_G01__A   0x1820037
 
#define CE_REG_FR_RIO_G02__A   0x1820038
 
#define CE_REG_FR_RIO_G03__A   0x1820039
 
#define CE_REG_FR_RIO_G04__A   0x182003A
 
#define CE_REG_FR_RIO_G05__A   0x182003B
 
#define CE_REG_FR_RIO_G06__A   0x182003C
 
#define CE_REG_FR_RIO_G07__A   0x182003D
 
#define CE_REG_FR_RIO_G08__A   0x182003E
 
#define CE_REG_FR_RIO_G09__A   0x182003F
 
#define CE_REG_FR_RIO_G10__A   0x1820040
 
#define CE_REG_FR_MODE__A   0x1820041
 
#define CE_REG_FR_SQS_TRH__A   0x1820042
 
#define CE_REG_FR_RIO_GAIN__A   0x1820043
 
#define CE_REG_FR_BYPASS__A   0x1820044
 
#define CE_REG_FR_PM_SET__A   0x1820045
 
#define CE_REG_FR_ERR_SH__A   0x1820046
 
#define CE_REG_FR_MAN_SH__A   0x1820047
 
#define CE_REG_FR_TAP_SH__A   0x1820048
 
#define EQ_COMM_EXEC__A   0x1C00000
 
#define EQ_REG_COMM_EXEC__A   0x1C10000
 
#define EQ_REG_COMM_MB__A   0x1C10002
 
#define EQ_REG_IS_GAIN_MAN__A   0x1C10015
 
#define EQ_REG_IS_GAIN_EXP__A   0x1C10016
 
#define EQ_REG_IS_CLIP_EXP__A   0x1C10017
 
#define EQ_REG_SN_CEGAIN__A   0x1C1002A
 
#define EQ_REG_SN_OFFSET__A   0x1C1002B
 
#define EQ_REG_RC_SEL_CAR__A   0x1C10032
 
#define EQ_REG_RC_SEL_CAR_INIT   0x0
 
#define EQ_REG_RC_SEL_CAR_DIV_ON   0x1
 
#define EQ_REG_RC_SEL_CAR_PASS_A_CC   0x0
 
#define EQ_REG_RC_SEL_CAR_PASS_B_CE   0x2
 
#define EQ_REG_RC_SEL_CAR_LOCAL_A_CC   0x0
 
#define EQ_REG_RC_SEL_CAR_LOCAL_B_CE   0x8
 
#define EQ_REG_RC_SEL_CAR_MEAS_A_CC   0x0
 
#define EQ_REG_RC_SEL_CAR_MEAS_B_CE   0x20
 
#define EQ_REG_OT_CONST__A   0x1C10046
 
#define EQ_REG_OT_ALPHA__A   0x1C10047
 
#define EQ_REG_OT_QNT_THRES0__A   0x1C10048
 
#define EQ_REG_OT_QNT_THRES1__A   0x1C10049
 
#define EQ_REG_OT_CSI_STEP__A   0x1C1004A
 
#define EQ_REG_OT_CSI_OFFSET__A   0x1C1004B
 
#define EQ_REG_TD_REQ_SMB_CNT__A   0x1C10061
 
#define EQ_REG_TD_TPS_PWR_OFS__A   0x1C10062
 
#define EC_SB_REG_COMM_EXEC__A   0x2010000
 
#define EC_SB_REG_TR_MODE__A   0x2010010
 
#define EC_SB_REG_TR_MODE_8K   0x0
 
#define EC_SB_REG_TR_MODE_2K   0x1
 
#define EC_SB_REG_CONST__A   0x2010011
 
#define EC_SB_REG_CONST_QPSK   0x0
 
#define EC_SB_REG_CONST_16QAM   0x1
 
#define EC_SB_REG_CONST_64QAM   0x2
 
#define EC_SB_REG_ALPHA__A   0x2010012
 
#define EC_SB_REG_PRIOR__A   0x2010013
 
#define EC_SB_REG_PRIOR_HI   0x0
 
#define EC_SB_REG_PRIOR_LO   0x1
 
#define EC_SB_REG_CSI_HI__A   0x2010014
 
#define EC_SB_REG_CSI_LO__A   0x2010015
 
#define EC_SB_REG_SMB_TGL__A   0x2010016
 
#define EC_SB_REG_SNR_HI__A   0x2010017
 
#define EC_SB_REG_SNR_MID__A   0x2010018
 
#define EC_SB_REG_SNR_LO__A   0x2010019
 
#define EC_SB_REG_SCALE_MSB__A   0x201001A
 
#define EC_SB_REG_SCALE_BIT2__A   0x201001B
 
#define EC_SB_REG_SCALE_LSB__A   0x201001C
 
#define EC_SB_REG_CSI_OFS__A   0x201001D
 
#define EC_VD_REG_COMM_EXEC__A   0x2090000
 
#define EC_VD_REG_FORCE__A   0x2090010
 
#define EC_VD_REG_SET_CODERATE__A   0x2090011
 
#define EC_VD_REG_SET_CODERATE_C1_2   0x0
 
#define EC_VD_REG_SET_CODERATE_C2_3   0x1
 
#define EC_VD_REG_SET_CODERATE_C3_4   0x2
 
#define EC_VD_REG_SET_CODERATE_C5_6   0x3
 
#define EC_VD_REG_SET_CODERATE_C7_8   0x4
 
#define EC_VD_REG_REQ_SMB_CNT__A   0x2090012
 
#define EC_VD_REG_RLK_ENA__A   0x2090014
 
#define EC_OD_REG_COMM_EXEC__A   0x2110000
 
#define EC_OD_REG_SYNC__A   0x2110010
 
#define EC_OD_DEINT_RAM__A   0x2120000
 
#define EC_RS_REG_COMM_EXEC__A   0x2130000
 
#define EC_RS_REG_REQ_PCK_CNT__A   0x2130010
 
#define EC_RS_REG_VAL__A   0x2130011
 
#define EC_RS_REG_VAL_PCK   0x1
 
#define EC_RS_EC_RAM__A   0x2140000
 
#define EC_OC_REG_COMM_EXEC__A   0x2150000
 
#define EC_OC_REG_COMM_EXEC_CTL_ACTIVE   0x1
 
#define EC_OC_REG_COMM_EXEC_CTL_HOLD   0x2
 
#define EC_OC_REG_COMM_INT_STA__A   0x2150007
 
#define EC_OC_REG_OC_MODE_LOP__A   0x2150010
 
#define EC_OC_REG_OC_MODE_LOP_PAR_ENA__M   0x1
 
#define EC_OC_REG_OC_MODE_LOP_PAR_ENA_ENABLE   0x0
 
#define EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE   0x1
 
#define EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC__M   0x4
 
#define EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC_STATIC   0x0
 
#define EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M   0x80
 
#define EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL   0x80
 
#define EC_OC_REG_OC_MODE_HIP__A   0x2150011
 
#define EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR   0x10
 
#define EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M   0x200
 
#define EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE   0x0
 
#define EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE   0x200
 
#define EC_OC_REG_OC_MPG_SIO__A   0x2150012
 
#define EC_OC_REG_OC_MPG_SIO__M   0xFFF
 
#define EC_OC_REG_OC_MON_SIO__A   0x2150013
 
#define EC_OC_REG_DTO_INC_LOP__A   0x2150014
 
#define EC_OC_REG_DTO_INC_HIP__A   0x2150015
 
#define EC_OC_REG_SNC_ISC_LVL__A   0x2150016
 
#define EC_OC_REG_SNC_ISC_LVL_OSC__M   0xF0
 
#define EC_OC_REG_TMD_TOP_MODE__A   0x215001D
 
#define EC_OC_REG_TMD_TOP_CNT__A   0x215001E
 
#define EC_OC_REG_TMD_HIL_MAR__A   0x215001F
 
#define EC_OC_REG_TMD_LOL_MAR__A   0x2150020
 
#define EC_OC_REG_TMD_CUR_CNT__A   0x2150021
 
#define EC_OC_REG_AVR_ASH_CNT__A   0x2150023
 
#define EC_OC_REG_AVR_BSH_CNT__A   0x2150024
 
#define EC_OC_REG_RCN_MODE__A   0x2150027
 
#define EC_OC_REG_RCN_CRA_LOP__A   0x2150028
 
#define EC_OC_REG_RCN_CRA_HIP__A   0x2150029
 
#define EC_OC_REG_RCN_CST_LOP__A   0x215002A
 
#define EC_OC_REG_RCN_CST_HIP__A   0x215002B
 
#define EC_OC_REG_RCN_SET_LVL__A   0x215002C
 
#define EC_OC_REG_RCN_GAI_LVL__A   0x215002D
 
#define EC_OC_REG_RCN_CLP_LOP__A   0x2150032
 
#define EC_OC_REG_RCN_CLP_HIP__A   0x2150033
 
#define EC_OC_REG_RCN_MAP_LOP__A   0x2150034
 
#define EC_OC_REG_RCN_MAP_HIP__A   0x2150035
 
#define EC_OC_REG_OCR_MPG_UOS__A   0x2150036
 
#define EC_OC_REG_OCR_MPG_UOS__M   0xFFF
 
#define EC_OC_REG_OCR_MPG_UOS_INIT   0x0
 
#define EC_OC_REG_OCR_MPG_USR_DAT__A   0x2150038
 
#define EC_OC_REG_OCR_MON_UOS__A   0x2150039
 
#define EC_OC_REG_OCR_MON_UOS_DAT_0_ENABLE   0x1
 
#define EC_OC_REG_OCR_MON_UOS_DAT_1_ENABLE   0x2
 
#define EC_OC_REG_OCR_MON_UOS_DAT_2_ENABLE   0x4
 
#define EC_OC_REG_OCR_MON_UOS_DAT_3_ENABLE   0x8
 
#define EC_OC_REG_OCR_MON_UOS_DAT_4_ENABLE   0x10
 
#define EC_OC_REG_OCR_MON_UOS_DAT_5_ENABLE   0x20
 
#define EC_OC_REG_OCR_MON_UOS_DAT_6_ENABLE   0x40
 
#define EC_OC_REG_OCR_MON_UOS_DAT_7_ENABLE   0x80
 
#define EC_OC_REG_OCR_MON_UOS_DAT_8_ENABLE   0x100
 
#define EC_OC_REG_OCR_MON_UOS_DAT_9_ENABLE   0x200
 
#define EC_OC_REG_OCR_MON_UOS_VAL_ENABLE   0x400
 
#define EC_OC_REG_OCR_MON_UOS_CLK_ENABLE   0x800
 
#define EC_OC_REG_OCR_MON_WRI__A   0x215003A
 
#define EC_OC_REG_OCR_MON_WRI_INIT   0x0
 
#define EC_OC_REG_IPR_INV_MPG__A   0x2150045
 
#define CC_REG_OSC_MODE__A   0x2410010
 
#define CC_REG_OSC_MODE_M20   0x1
 
#define CC_REG_PLL_MODE__A   0x2410011
 
#define CC_REG_PLL_MODE_BYPASS_PLL   0x1
 
#define CC_REG_PLL_MODE_PUMP_CUR_12   0x14
 
#define CC_REG_REF_DIVIDE__A   0x2410012
 
#define CC_REG_PWD_MODE__A   0x2410015
 
#define CC_REG_PWD_MODE_DOWN_PLL   0x2
 
#define CC_REG_UPDATE__A   0x2410017
 
#define CC_REG_UPDATE_KEY   0x3973
 
#define CC_REG_JTAGID_L__A   0x2410019
 
#define LC_COMM_EXEC__A   0x2800000
 
#define LC_RA_RAM_IFINCR_NOM_L__A   0x282000C
 
#define LC_RA_RAM_FILTER_SYM_SET__A   0x282001A
 
#define LC_RA_RAM_FILTER_SYM_SET__PRE   0x3E8
 
#define LC_RA_RAM_FILTER_CRMM_A__A   0x2820060
 
#define LC_RA_RAM_FILTER_CRMM_A__PRE   0x4
 
#define LC_RA_RAM_FILTER_CRMM_B__A   0x2820061
 
#define LC_RA_RAM_FILTER_CRMM_B__PRE   0x1
 
#define LC_RA_RAM_FILTER_SRMM_A__A   0x2820068
 
#define LC_RA_RAM_FILTER_SRMM_A__PRE   0x4
 
#define LC_RA_RAM_FILTER_SRMM_B__A   0x2820069
 
#define LC_RA_RAM_FILTER_SRMM_B__PRE   0x1
 
#define B_HI_COMM_EXEC__A   0x400000
 
#define B_HI_COMM_MB__A   0x400002
 
#define B_HI_CT_REG_COMM_STATE__A   0x410001
 
#define B_HI_RA_RAM_SRV_RES__A   0x420031
 
#define B_HI_RA_RAM_SRV_CMD__A   0x420032
 
#define B_HI_RA_RAM_SRV_CMD_RESET   0x2
 
#define B_HI_RA_RAM_SRV_CMD_CONFIG   0x3
 
#define B_HI_RA_RAM_SRV_CMD_EXECUTE   0x6
 
#define B_HI_RA_RAM_SRV_RST_KEY__A   0x420033
 
#define B_HI_RA_RAM_SRV_RST_KEY_ACT   0x3973
 
#define B_HI_RA_RAM_SRV_CFG_KEY__A   0x420033
 
#define B_HI_RA_RAM_SRV_CFG_DIV__A   0x420034
 
#define B_HI_RA_RAM_SRV_CFG_BDL__A   0x420035
 
#define B_HI_RA_RAM_SRV_CFG_WUP__A   0x420036
 
#define B_HI_RA_RAM_SRV_CFG_ACT__A   0x420037
 
#define B_HI_RA_RAM_SRV_CFG_ACT_SLV0_ON   0x1
 
#define B_HI_RA_RAM_SRV_CFG_ACT_BRD__M   0x4
 
#define B_HI_RA_RAM_SRV_CFG_ACT_BRD_OFF   0x0
 
#define B_HI_RA_RAM_SRV_CFG_ACT_BRD_ON   0x4
 
#define B_HI_RA_RAM_SRV_CFG_ACT_PWD_EXE   0x8
 
#define B_HI_RA_RAM_USR_BEGIN__A   0x420040
 
#define B_HI_IF_RAM_TRP_BPT0__AX   0x430000
 
#define B_HI_IF_RAM_USR_BEGIN__A   0x430200
 
#define B_SC_COMM_EXEC__A   0x800000
 
#define B_SC_COMM_EXEC_CTL_STOP   0x0
 
#define B_SC_COMM_STATE__A   0x800001
 
#define B_SC_RA_RAM_PARAM0__A   0x820040
 
#define B_SC_RA_RAM_PARAM1__A   0x820041
 
#define B_SC_RA_RAM_CMD_ADDR__A   0x820042
 
#define B_SC_RA_RAM_CMD__A   0x820043
 
#define B_SC_RA_RAM_CMD_PROC_START   0x1
 
#define B_SC_RA_RAM_CMD_SET_PREF_PARAM   0x3
 
#define B_SC_RA_RAM_CMD_GET_OP_PARAM   0x5
 
#define B_SC_RA_RAM_SW_EVENT_RUN_NMASK__M   0x1
 
#define B_SC_RA_RAM_LOCKTRACK_MIN   0x1
 
#define B_SC_RA_RAM_OP_PARAM_MODE_2K   0x0
 
#define B_SC_RA_RAM_OP_PARAM_MODE_8K   0x1
 
#define B_SC_RA_RAM_OP_PARAM_GUARD_32   0x0
 
#define B_SC_RA_RAM_OP_PARAM_GUARD_16   0x4
 
#define B_SC_RA_RAM_OP_PARAM_GUARD_8   0x8
 
#define B_SC_RA_RAM_OP_PARAM_GUARD_4   0xC
 
#define B_SC_RA_RAM_OP_PARAM_CONST_QPSK   0x0
 
#define B_SC_RA_RAM_OP_PARAM_CONST_QAM16   0x10
 
#define B_SC_RA_RAM_OP_PARAM_CONST_QAM64   0x20
 
#define B_SC_RA_RAM_OP_PARAM_HIER_NO   0x0
 
#define B_SC_RA_RAM_OP_PARAM_HIER_A1   0x40
 
#define B_SC_RA_RAM_OP_PARAM_HIER_A2   0x80
 
#define B_SC_RA_RAM_OP_PARAM_HIER_A4   0xC0
 
#define B_SC_RA_RAM_OP_PARAM_RATE_1_2   0x0
 
#define B_SC_RA_RAM_OP_PARAM_RATE_2_3   0x200
 
#define B_SC_RA_RAM_OP_PARAM_RATE_3_4   0x400
 
#define B_SC_RA_RAM_OP_PARAM_RATE_5_6   0x600
 
#define B_SC_RA_RAM_OP_PARAM_RATE_7_8   0x800
 
#define B_SC_RA_RAM_OP_PARAM_PRIO_HI   0x0
 
#define B_SC_RA_RAM_OP_PARAM_PRIO_LO   0x1000
 
#define B_SC_RA_RAM_OP_AUTO_MODE__M   0x1
 
#define B_SC_RA_RAM_OP_AUTO_GUARD__M   0x2
 
#define B_SC_RA_RAM_OP_AUTO_CONST__M   0x4
 
#define B_SC_RA_RAM_OP_AUTO_HIER__M   0x8
 
#define B_SC_RA_RAM_OP_AUTO_RATE__M   0x10
 
#define B_SC_RA_RAM_LOCK__A   0x82004B
 
#define B_SC_RA_RAM_LOCK_DEMOD__M   0x1
 
#define B_SC_RA_RAM_LOCK_FEC__M   0x2
 
#define B_SC_RA_RAM_LOCK_MPEG__M   0x4
 
#define B_SC_RA_RAM_BE_OPT_ENA__A   0x82004C
 
#define B_SC_RA_RAM_BE_OPT_ENA_CP_OPT   0x1
 
#define B_SC_RA_RAM_BE_OPT_DELAY__A   0x82004D
 
#define B_SC_RA_RAM_CONFIG__A   0x820050
 
#define B_SC_RA_RAM_CONFIG_FR_ENABLE__M   0x4
 
#define B_SC_RA_RAM_CONFIG_FREQSCAN__M   0x10
 
#define B_SC_RA_RAM_CONFIG_SLAVE__M   0x20
 
#define B_SC_RA_RAM_CONFIG_DIV_BLANK_ENABLE__M   0x200
 
#define B_SC_RA_RAM_CONFIG_DIV_ECHO_ENABLE__M   0x400
 
#define B_SC_RA_RAM_CO_TD_CAL_2K__A   0x82005D
 
#define B_SC_RA_RAM_CO_TD_CAL_8K__A   0x82005E
 
#define B_SC_RA_RAM_IF_SAVE__AX   0x82008E
 
#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_32__A   0x820098
 
#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_16__A   0x820099
 
#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_8__A   0x82009A
 
#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_4__A   0x82009B
 
#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_32__A   0x82009C
 
#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_16__A   0x82009D
 
#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_8__A   0x82009E
 
#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_4__A   0x82009F
 
#define B_SC_RA_RAM_IR_COARSE_2K_LENGTH__A   0x8200D1
 
#define B_SC_RA_RAM_IR_COARSE_2K_LENGTH__PRE   0x9
 
#define B_SC_RA_RAM_IR_COARSE_2K_FREQINC__A   0x8200D2
 
#define B_SC_RA_RAM_IR_COARSE_2K_FREQINC__PRE   0x4
 
#define B_SC_RA_RAM_IR_COARSE_2K_KAISINC__A   0x8200D3
 
#define B_SC_RA_RAM_IR_COARSE_2K_KAISINC__PRE   0x100
 
#define B_SC_RA_RAM_IR_COARSE_8K_LENGTH__A   0x8200D4
 
#define B_SC_RA_RAM_IR_COARSE_8K_LENGTH__PRE   0x8
 
#define B_SC_RA_RAM_IR_COARSE_8K_FREQINC__A   0x8200D5
 
#define B_SC_RA_RAM_IR_COARSE_8K_FREQINC__PRE   0x8
 
#define B_SC_RA_RAM_IR_COARSE_8K_KAISINC__A   0x8200D6
 
#define B_SC_RA_RAM_IR_COARSE_8K_KAISINC__PRE   0x200
 
#define B_SC_RA_RAM_IR_FINE_2K_LENGTH__A   0x8200D7
 
#define B_SC_RA_RAM_IR_FINE_2K_LENGTH__PRE   0x9
 
#define B_SC_RA_RAM_IR_FINE_2K_FREQINC__A   0x8200D8
 
#define B_SC_RA_RAM_IR_FINE_2K_FREQINC__PRE   0x4
 
#define B_SC_RA_RAM_IR_FINE_2K_KAISINC__A   0x8200D9
 
#define B_SC_RA_RAM_IR_FINE_2K_KAISINC__PRE   0x100
 
#define B_SC_RA_RAM_IR_FINE_8K_LENGTH__A   0x8200DA
 
#define B_SC_RA_RAM_IR_FINE_8K_LENGTH__PRE   0xB
 
#define B_SC_RA_RAM_IR_FINE_8K_FREQINC__A   0x8200DB
 
#define B_SC_RA_RAM_IR_FINE_8K_FREQINC__PRE   0x1
 
#define B_SC_RA_RAM_IR_FINE_8K_KAISINC__A   0x8200DC
 
#define B_SC_RA_RAM_IR_FINE_8K_KAISINC__PRE   0x40
 
#define B_SC_RA_RAM_ECHO_SHIFT_LIM__A   0x8200DD
 
#define B_SC_RA_RAM_SAMPLE_RATE_COUNT__A   0x8200E8
 
#define B_SC_RA_RAM_SAMPLE_RATE_STEP__A   0x8200E9
 
#define B_SC_RA_RAM_BAND__A   0x8200EC
 
#define B_SC_RA_RAM_LC_ABS_2K__A   0x8200F4
 
#define B_SC_RA_RAM_LC_ABS_2K__PRE   0x1F
 
#define B_SC_RA_RAM_LC_ABS_8K__A   0x8200F5
 
#define B_SC_RA_RAM_LC_ABS_8K__PRE   0x1F
 
#define B_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE   0x100
 
#define B_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE   0x4
 
#define B_SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE   0x1E2
 
#define B_SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE   0x4
 
#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE   0x10D
 
#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE   0x5
 
#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE   0x17D
 
#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE   0x4
 
#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE   0x133
 
#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE   0x5
 
#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE   0x114
 
#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE   0x5
 
#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE   0x14A
 
#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE   0x4
 
#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE   0x1BB
 
#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE   0x4
 
#define B_SC_RA_RAM_DRIVER_VERSION__AX   0x8201FE
 
#define B_SC_RA_RAM_PROC_LOCKTRACK   0x0
 
#define B_FE_COMM_EXEC__A   0xC00000
 
#define B_FE_AD_REG_COMM_EXEC__A   0xC10000
 
#define B_FE_AD_REG_FDB_IN__A   0xC10012
 
#define B_FE_AD_REG_PD__A   0xC10013
 
#define B_FE_AD_REG_INVEXT__A   0xC10014
 
#define B_FE_AD_REG_CLKNEG__A   0xC10015
 
#define B_FE_AG_REG_COMM_EXEC__A   0xC20000
 
#define B_FE_AG_REG_AG_MODE_LOP__A   0xC20010
 
#define B_FE_AG_REG_AG_MODE_LOP_MODE_4__M   0x10
 
#define B_FE_AG_REG_AG_MODE_LOP_MODE_4_STATIC   0x0
 
#define B_FE_AG_REG_AG_MODE_LOP_MODE_4_DYNAMIC   0x10
 
#define B_FE_AG_REG_AG_MODE_LOP_MODE_5__M   0x20
 
#define B_FE_AG_REG_AG_MODE_LOP_MODE_5_STATIC   0x0
 
#define B_FE_AG_REG_AG_MODE_LOP_MODE_C__M   0x1000
 
#define B_FE_AG_REG_AG_MODE_LOP_MODE_C_STATIC   0x0
 
#define B_FE_AG_REG_AG_MODE_LOP_MODE_C_DYNAMIC   0x1000
 
#define B_FE_AG_REG_AG_MODE_LOP_MODE_E__M   0x4000
 
#define B_FE_AG_REG_AG_MODE_LOP_MODE_E_STATIC   0x0
 
#define B_FE_AG_REG_AG_MODE_LOP_MODE_E_DYNAMIC   0x4000
 
#define B_FE_AG_REG_AG_MODE_HIP__A   0xC20011
 
#define B_FE_AG_REG_AG_MODE_HIP_MODE_J__M   0x8
 
#define B_FE_AG_REG_AG_MODE_HIP_MODE_J_STATIC   0x0
 
#define B_FE_AG_REG_AG_MODE_HIP_MODE_J_DYNAMIC   0x8
 
#define B_FE_AG_REG_AG_PGA_MODE__A   0xC20012
 
#define B_FE_AG_REG_AG_PGA_MODE_PFY_PCY_AFY_REN   0x0
 
#define B_FE_AG_REG_AG_PGA_MODE_PFN_PCN_AFY_REN   0x1
 
#define B_FE_AG_REG_AG_AGC_SIO__A   0xC20013
 
#define B_FE_AG_REG_AG_AGC_SIO_AGC_SIO_2__M   0x2
 
#define B_FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_OUTPUT   0x0
 
#define B_FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_INPUT   0x2
 
#define B_FE_AG_REG_AG_PWD__A   0xC20015
 
#define B_FE_AG_REG_AG_PWD_PWD_PD2__M   0x2
 
#define B_FE_AG_REG_AG_PWD_PWD_PD2_DISABLE   0x0
 
#define B_FE_AG_REG_AG_PWD_PWD_PD2_ENABLE   0x2
 
#define B_FE_AG_REG_DCE_AUR_CNT__A   0xC20016
 
#define B_FE_AG_REG_DCE_RUR_CNT__A   0xC20017
 
#define B_FE_AG_REG_ACE_AUR_CNT__A   0xC2001A
 
#define B_FE_AG_REG_ACE_RUR_CNT__A   0xC2001B
 
#define B_FE_AG_REG_CDR_RUR_CNT__A   0xC20020
 
#define B_FE_AG_REG_EGC_RUR_CNT__A   0xC20024
 
#define B_FE_AG_REG_EGC_SET_LVL__A   0xC20025
 
#define B_FE_AG_REG_EGC_SET_LVL__M   0x1FF
 
#define B_FE_AG_REG_EGC_FLA_RGN__A   0xC20026
 
#define B_FE_AG_REG_EGC_SLO_RGN__A   0xC20027
 
#define B_FE_AG_REG_EGC_JMP_PSN__A   0xC20028
 
#define B_FE_AG_REG_EGC_FLA_INC__A   0xC20029
 
#define B_FE_AG_REG_EGC_FLA_DEC__A   0xC2002A
 
#define B_FE_AG_REG_EGC_SLO_INC__A   0xC2002B
 
#define B_FE_AG_REG_EGC_SLO_DEC__A   0xC2002C
 
#define B_FE_AG_REG_EGC_FAS_INC__A   0xC2002D
 
#define B_FE_AG_REG_EGC_FAS_DEC__A   0xC2002E
 
#define B_FE_AG_REG_PM1_AGC_WRI__A   0xC20030
 
#define B_FE_AG_REG_PM1_AGC_WRI__M   0x7FF
 
#define B_FE_AG_REG_GC1_AGC_RIC__A   0xC20031
 
#define B_FE_AG_REG_GC1_AGC_OFF__A   0xC20032
 
#define B_FE_AG_REG_GC1_AGC_MAX__A   0xC20033
 
#define B_FE_AG_REG_GC1_AGC_MIN__A   0xC20034
 
#define B_FE_AG_REG_GC1_AGC_DAT__A   0xC20035
 
#define B_FE_AG_REG_GC1_AGC_DAT__M   0x3FF
 
#define B_FE_AG_REG_PM2_AGC_WRI__A   0xC20036
 
#define B_FE_AG_REG_IND_WIN__A   0xC2003C
 
#define B_FE_AG_REG_IND_THD_LOL__A   0xC2003D
 
#define B_FE_AG_REG_IND_THD_HIL__A   0xC2003E
 
#define B_FE_AG_REG_IND_DEL__A   0xC2003F
 
#define B_FE_AG_REG_IND_PD1_WRI__A   0xC20040
 
#define B_FE_AG_REG_PDA_AUR_CNT__A   0xC20041
 
#define B_FE_AG_REG_PDA_RUR_CNT__A   0xC20042
 
#define B_FE_AG_REG_PDA_AVE_DAT__A   0xC20043
 
#define B_FE_AG_REG_PDC_RUR_CNT__A   0xC20044
 
#define B_FE_AG_REG_PDC_SET_LVL__A   0xC20045
 
#define B_FE_AG_REG_PDC_FLA_RGN__A   0xC20046
 
#define B_FE_AG_REG_PDC_JMP_PSN__A   0xC20047
 
#define B_FE_AG_REG_PDC_FLA_STP__A   0xC20048
 
#define B_FE_AG_REG_PDC_SLO_STP__A   0xC20049
 
#define B_FE_AG_REG_PDC_PD2_WRI__A   0xC2004A
 
#define B_FE_AG_REG_PDC_MAP_DAT__A   0xC2004B
 
#define B_FE_AG_REG_PDC_MAX__A   0xC2004C
 
#define B_FE_AG_REG_TGA_AUR_CNT__A   0xC2004D
 
#define B_FE_AG_REG_TGA_RUR_CNT__A   0xC2004E
 
#define B_FE_AG_REG_TGA_AVE_DAT__A   0xC2004F
 
#define B_FE_AG_REG_TGC_RUR_CNT__A   0xC20050
 
#define B_FE_AG_REG_TGC_SET_LVL__A   0xC20051
 
#define B_FE_AG_REG_TGC_SET_LVL__M   0x3F
 
#define B_FE_AG_REG_TGC_FLA_RGN__A   0xC20052
 
#define B_FE_AG_REG_TGC_JMP_PSN__A   0xC20053
 
#define B_FE_AG_REG_TGC_FLA_STP__A   0xC20054
 
#define B_FE_AG_REG_TGC_SLO_STP__A   0xC20055
 
#define B_FE_AG_REG_TGC_MAP_DAT__A   0xC20056
 
#define B_FE_AG_REG_FGM_WRI__A   0xC20061
 
#define B_FE_AG_REG_BGC_FGC_WRI__A   0xC20068
 
#define B_FE_AG_REG_BGC_CGC_WRI__A   0xC20069
 
#define B_FE_FS_REG_COMM_EXEC__A   0xC30000
 
#define B_FE_FS_REG_ADD_INC_LOP__A   0xC30010
 
#define B_FE_FD_REG_COMM_EXEC__A   0xC40000
 
#define B_FE_FD_REG_SCL__A   0xC40010
 
#define B_FE_FD_REG_MAX_LEV__A   0xC40011
 
#define B_FE_FD_REG_NR__A   0xC40012
 
#define B_FE_FD_REG_MEAS_VAL__A   0xC40014
 
#define B_FE_IF_REG_COMM_EXEC__A   0xC50000
 
#define B_FE_IF_REG_INCR0__A   0xC50010
 
#define B_FE_IF_REG_INCR0__W   16
 
#define B_FE_IF_REG_INCR0__M   0xFFFF
 
#define B_FE_IF_REG_INCR1__A   0xC50011
 
#define B_FE_IF_REG_INCR1__M   0xFF
 
#define B_FE_CF_REG_COMM_EXEC__A   0xC60000
 
#define B_FE_CF_REG_SCL__A   0xC60010
 
#define B_FE_CF_REG_MAX_LEV__A   0xC60011
 
#define B_FE_CF_REG_NR__A   0xC60012
 
#define B_FE_CF_REG_IMP_VAL__A   0xC60013
 
#define B_FE_CF_REG_MEAS_VAL__A   0xC60014
 
#define B_FE_CU_REG_COMM_EXEC__A   0xC70000
 
#define B_FE_CU_REG_FRM_CNT_RST__A   0xC70011
 
#define B_FE_CU_REG_FRM_CNT_STR__A   0xC70012
 
#define B_FE_CU_REG_CTR_NFC_ICR__A   0xC70020
 
#define B_FE_CU_REG_CTR_NFC_OCR__A   0xC70021
 
#define B_FE_CU_REG_DIV_NFC_CLP__A   0xC70027
 
#define B_FT_COMM_EXEC__A   0x1000000
 
#define B_FT_REG_COMM_EXEC__A   0x1010000
 
#define B_CP_COMM_EXEC__A   0x1400000
 
#define B_CP_REG_COMM_EXEC__A   0x1410000
 
#define B_CP_REG_INTERVAL__A   0x1410011
 
#define B_CP_REG_BR_SPL_OFFSET__A   0x1410023
 
#define B_CP_REG_BR_STR_DEL__A   0x1410024
 
#define B_CP_REG_RT_ANG_INC0__A   0x1410030
 
#define B_CP_REG_RT_ANG_INC1__A   0x1410031
 
#define B_CP_REG_RT_DETECT_TRH__A   0x1410033
 
#define B_CP_REG_AC_NEXP_OFFS__A   0x1410040
 
#define B_CP_REG_AC_AVER_POW__A   0x1410041
 
#define B_CP_REG_AC_MAX_POW__A   0x1410042
 
#define B_CP_REG_AC_WEIGHT_MAN__A   0x1410043
 
#define B_CP_REG_AC_WEIGHT_EXP__A   0x1410044
 
#define B_CP_REG_AC_AMP_MODE__A   0x1410047
 
#define B_CP_REG_AC_AMP_FIX__A   0x1410048
 
#define B_CP_REG_AC_ANG_MODE__A   0x141004A
 
#define B_CE_COMM_EXEC__A   0x1800000
 
#define B_CE_REG_COMM_EXEC__A   0x1810000
 
#define B_CE_REG_TAPSET__A   0x1810011
 
#define B_CE_REG_AVG_POW__A   0x1810012
 
#define B_CE_REG_MAX_POW__A   0x1810013
 
#define B_CE_REG_ATT__A   0x1810014
 
#define B_CE_REG_NRED__A   0x1810015
 
#define B_CE_REG_NE_ERR_SELECT__A   0x1810043
 
#define B_CE_REG_NE_TD_CAL__A   0x1810044
 
#define B_CE_REG_NE_MIXAVG__A   0x1810046
 
#define B_CE_REG_NE_NUPD_OFS__A   0x1810047
 
#define B_CE_REG_PE_NEXP_OFFS__A   0x1810050
 
#define B_CE_REG_PE_TIMESHIFT__A   0x1810051
 
#define B_CE_REG_TP_A0_TAP_NEW__A   0x1810064
 
#define B_CE_REG_TP_A0_TAP_NEW_VALID__A   0x1810065
 
#define B_CE_REG_TP_A0_MU_LMS_STEP__A   0x1810066
 
#define B_CE_REG_TP_A1_TAP_NEW__A   0x1810068
 
#define B_CE_REG_TP_A1_TAP_NEW_VALID__A   0x1810069
 
#define B_CE_REG_TP_A1_MU_LMS_STEP__A   0x181006A
 
#define B_CE_REG_TI_PHN_ENABLE__A   0x1810073
 
#define B_CE_REG_FI_SHT_INCR__A   0x1810090
 
#define B_CE_REG_FI_EXP_NORM__A   0x1810091
 
#define B_CE_REG_IR_INPUTSEL__A   0x18100A0
 
#define B_CE_REG_IR_STARTPOS__A   0x18100A1
 
#define B_CE_REG_IR_NEXP_THRES__A   0x18100A2
 
#define B_CE_REG_FR_TREAL00__A   0x1820010
 
#define B_CE_REG_FR_TIMAG00__A   0x1820011
 
#define B_CE_REG_FR_TREAL01__A   0x1820012
 
#define B_CE_REG_FR_TIMAG01__A   0x1820013
 
#define B_CE_REG_FR_TREAL02__A   0x1820014
 
#define B_CE_REG_FR_TIMAG02__A   0x1820015
 
#define B_CE_REG_FR_TREAL03__A   0x1820016
 
#define B_CE_REG_FR_TIMAG03__A   0x1820017
 
#define B_CE_REG_FR_TREAL04__A   0x1820018
 
#define B_CE_REG_FR_TIMAG04__A   0x1820019
 
#define B_CE_REG_FR_TREAL05__A   0x182001A
 
#define B_CE_REG_FR_TIMAG05__A   0x182001B
 
#define B_CE_REG_FR_TREAL06__A   0x182001C
 
#define B_CE_REG_FR_TIMAG06__A   0x182001D
 
#define B_CE_REG_FR_TREAL07__A   0x182001E
 
#define B_CE_REG_FR_TIMAG07__A   0x182001F
 
#define B_CE_REG_FR_TREAL08__A   0x1820020
 
#define B_CE_REG_FR_TIMAG08__A   0x1820021
 
#define B_CE_REG_FR_TREAL09__A   0x1820022
 
#define B_CE_REG_FR_TIMAG09__A   0x1820023
 
#define B_CE_REG_FR_TREAL10__A   0x1820024
 
#define B_CE_REG_FR_TIMAG10__A   0x1820025
 
#define B_CE_REG_FR_TREAL11__A   0x1820026
 
#define B_CE_REG_FR_TIMAG11__A   0x1820027
 
#define B_CE_REG_FR_MID_TAP__A   0x1820028
 
#define B_CE_REG_FR_SQS_G00__A   0x1820029
 
#define B_CE_REG_FR_SQS_G01__A   0x182002A
 
#define B_CE_REG_FR_SQS_G02__A   0x182002B
 
#define B_CE_REG_FR_SQS_G03__A   0x182002C
 
#define B_CE_REG_FR_SQS_G04__A   0x182002D
 
#define B_CE_REG_FR_SQS_G05__A   0x182002E
 
#define B_CE_REG_FR_SQS_G06__A   0x182002F
 
#define B_CE_REG_FR_SQS_G07__A   0x1820030
 
#define B_CE_REG_FR_SQS_G08__A   0x1820031
 
#define B_CE_REG_FR_SQS_G09__A   0x1820032
 
#define B_CE_REG_FR_SQS_G10__A   0x1820033
 
#define B_CE_REG_FR_SQS_G11__A   0x1820034
 
#define B_CE_REG_FR_SQS_G12__A   0x1820035
 
#define B_CE_REG_FR_RIO_G00__A   0x1820036
 
#define B_CE_REG_FR_RIO_G01__A   0x1820037
 
#define B_CE_REG_FR_RIO_G02__A   0x1820038
 
#define B_CE_REG_FR_RIO_G03__A   0x1820039
 
#define B_CE_REG_FR_RIO_G04__A   0x182003A
 
#define B_CE_REG_FR_RIO_G05__A   0x182003B
 
#define B_CE_REG_FR_RIO_G06__A   0x182003C
 
#define B_CE_REG_FR_RIO_G07__A   0x182003D
 
#define B_CE_REG_FR_RIO_G08__A   0x182003E
 
#define B_CE_REG_FR_RIO_G09__A   0x182003F
 
#define B_CE_REG_FR_RIO_G10__A   0x1820040
 
#define B_CE_REG_FR_MODE__A   0x1820041
 
#define B_CE_REG_FR_SQS_TRH__A   0x1820042
 
#define B_CE_REG_FR_RIO_GAIN__A   0x1820043
 
#define B_CE_REG_FR_BYPASS__A   0x1820044
 
#define B_CE_REG_FR_PM_SET__A   0x1820045
 
#define B_CE_REG_FR_ERR_SH__A   0x1820046
 
#define B_CE_REG_FR_MAN_SH__A   0x1820047
 
#define B_CE_REG_FR_TAP_SH__A   0x1820048
 
#define B_EQ_COMM_EXEC__A   0x1C00000
 
#define B_EQ_REG_COMM_EXEC__A   0x1C10000
 
#define B_EQ_REG_COMM_MB__A   0x1C10002
 
#define B_EQ_REG_IS_GAIN_MAN__A   0x1C10015
 
#define B_EQ_REG_IS_GAIN_EXP__A   0x1C10016
 
#define B_EQ_REG_IS_CLIP_EXP__A   0x1C10017
 
#define B_EQ_REG_SN_CEGAIN__A   0x1C1002A
 
#define B_EQ_REG_SN_OFFSET__A   0x1C1002B
 
#define B_EQ_REG_RC_SEL_CAR__A   0x1C10032
 
#define B_EQ_REG_RC_SEL_CAR_INIT   0x2
 
#define B_EQ_REG_RC_SEL_CAR_DIV_ON   0x1
 
#define B_EQ_REG_RC_SEL_CAR_PASS_A_CC   0x0
 
#define B_EQ_REG_RC_SEL_CAR_PASS_B_CE   0x2
 
#define B_EQ_REG_RC_SEL_CAR_LOCAL_A_CC   0x0
 
#define B_EQ_REG_RC_SEL_CAR_LOCAL_B_CE   0x8
 
#define B_EQ_REG_RC_SEL_CAR_MEAS_A_CC   0x0
 
#define B_EQ_REG_RC_SEL_CAR_MEAS_B_CE   0x20
 
#define B_EQ_REG_RC_SEL_CAR_FFTMODE__M   0x80
 
#define B_EQ_REG_OT_CONST__A   0x1C10046
 
#define B_EQ_REG_OT_ALPHA__A   0x1C10047
 
#define B_EQ_REG_OT_QNT_THRES0__A   0x1C10048
 
#define B_EQ_REG_OT_QNT_THRES1__A   0x1C10049
 
#define B_EQ_REG_OT_CSI_STEP__A   0x1C1004A
 
#define B_EQ_REG_OT_CSI_OFFSET__A   0x1C1004B
 
#define B_EQ_REG_TD_REQ_SMB_CNT__A   0x1C10061
 
#define B_EQ_REG_TD_TPS_PWR_OFS__A   0x1C10062
 
#define B_EC_SB_REG_COMM_EXEC__A   0x2010000
 
#define B_EC_SB_REG_TR_MODE__A   0x2010010
 
#define B_EC_SB_REG_TR_MODE_8K   0x0
 
#define B_EC_SB_REG_TR_MODE_2K   0x1
 
#define B_EC_SB_REG_CONST__A   0x2010011
 
#define B_EC_SB_REG_CONST_QPSK   0x0
 
#define B_EC_SB_REG_CONST_16QAM   0x1
 
#define B_EC_SB_REG_CONST_64QAM   0x2
 
#define B_EC_SB_REG_ALPHA__A   0x2010012
 
#define B_EC_SB_REG_PRIOR__A   0x2010013
 
#define B_EC_SB_REG_PRIOR_HI   0x0
 
#define B_EC_SB_REG_PRIOR_LO   0x1
 
#define B_EC_SB_REG_CSI_HI__A   0x2010014
 
#define B_EC_SB_REG_CSI_LO__A   0x2010015
 
#define B_EC_SB_REG_SMB_TGL__A   0x2010016
 
#define B_EC_SB_REG_SNR_HI__A   0x2010017
 
#define B_EC_SB_REG_SNR_MID__A   0x2010018
 
#define B_EC_SB_REG_SNR_LO__A   0x2010019
 
#define B_EC_SB_REG_SCALE_MSB__A   0x201001A
 
#define B_EC_SB_REG_SCALE_BIT2__A   0x201001B
 
#define B_EC_SB_REG_SCALE_LSB__A   0x201001C
 
#define B_EC_SB_REG_CSI_OFS0__A   0x201001D
 
#define B_EC_SB_REG_CSI_OFS1__A   0x201001E
 
#define B_EC_SB_REG_CSI_OFS2__A   0x201001F
 
#define B_EC_VD_REG_COMM_EXEC__A   0x2090000
 
#define B_EC_VD_REG_FORCE__A   0x2090010
 
#define B_EC_VD_REG_SET_CODERATE__A   0x2090011
 
#define B_EC_VD_REG_SET_CODERATE_C1_2   0x0
 
#define B_EC_VD_REG_SET_CODERATE_C2_3   0x1
 
#define B_EC_VD_REG_SET_CODERATE_C3_4   0x2
 
#define B_EC_VD_REG_SET_CODERATE_C5_6   0x3
 
#define B_EC_VD_REG_SET_CODERATE_C7_8   0x4
 
#define B_EC_VD_REG_REQ_SMB_CNT__A   0x2090012
 
#define B_EC_VD_REG_RLK_ENA__A   0x2090014
 
#define B_EC_OD_REG_COMM_EXEC__A   0x2110000
 
#define B_EC_OD_REG_SYNC__A   0x2110664
 
#define B_EC_OD_DEINT_RAM__A   0x2120000
 
#define B_EC_RS_REG_COMM_EXEC__A   0x2130000
 
#define B_EC_RS_REG_REQ_PCK_CNT__A   0x2130010
 
#define B_EC_RS_REG_VAL__A   0x2130011
 
#define B_EC_RS_REG_VAL_PCK   0x1
 
#define B_EC_RS_EC_RAM__A   0x2140000
 
#define B_EC_OC_REG_COMM_EXEC__A   0x2150000
 
#define B_EC_OC_REG_COMM_EXEC_CTL_ACTIVE   0x1
 
#define B_EC_OC_REG_COMM_EXEC_CTL_HOLD   0x2
 
#define B_EC_OC_REG_COMM_INT_STA__A   0x2150007
 
#define B_EC_OC_REG_OC_MODE_LOP__A   0x2150010
 
#define B_EC_OC_REG_OC_MODE_LOP_PAR_ENA__M   0x1
 
#define B_EC_OC_REG_OC_MODE_LOP_PAR_ENA_ENABLE   0x0
 
#define B_EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE   0x1
 
#define B_EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC__M   0x4
 
#define B_EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC_STATIC   0x0
 
#define B_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M   0x80
 
#define B_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL   0x80
 
#define B_EC_OC_REG_OC_MODE_HIP__A   0x2150011
 
#define B_EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR   0x10
 
#define B_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M   0x200
 
#define B_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE   0x0
 
#define B_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE   0x200
 
#define B_EC_OC_REG_OC_MPG_SIO__A   0x2150012
 
#define B_EC_OC_REG_OC_MPG_SIO__M   0xFFF
 
#define B_EC_OC_REG_DTO_INC_LOP__A   0x2150014
 
#define B_EC_OC_REG_DTO_INC_HIP__A   0x2150015
 
#define B_EC_OC_REG_SNC_ISC_LVL__A   0x2150016
 
#define B_EC_OC_REG_SNC_ISC_LVL_OSC__M   0xF0
 
#define B_EC_OC_REG_TMD_TOP_MODE__A   0x215001D
 
#define B_EC_OC_REG_TMD_TOP_CNT__A   0x215001E
 
#define B_EC_OC_REG_TMD_HIL_MAR__A   0x215001F
 
#define B_EC_OC_REG_TMD_LOL_MAR__A   0x2150020
 
#define B_EC_OC_REG_TMD_CUR_CNT__A   0x2150021
 
#define B_EC_OC_REG_AVR_ASH_CNT__A   0x2150023
 
#define B_EC_OC_REG_AVR_BSH_CNT__A   0x2150024
 
#define B_EC_OC_REG_RCN_MODE__A   0x2150027
 
#define B_EC_OC_REG_RCN_CRA_LOP__A   0x2150028
 
#define B_EC_OC_REG_RCN_CRA_HIP__A   0x2150029
 
#define B_EC_OC_REG_RCN_CST_LOP__A   0x215002A
 
#define B_EC_OC_REG_RCN_CST_HIP__A   0x215002B
 
#define B_EC_OC_REG_RCN_SET_LVL__A   0x215002C
 
#define B_EC_OC_REG_RCN_GAI_LVL__A   0x215002D
 
#define B_EC_OC_REG_RCN_CLP_LOP__A   0x2150032
 
#define B_EC_OC_REG_RCN_CLP_HIP__A   0x2150033
 
#define B_EC_OC_REG_RCN_MAP_LOP__A   0x2150034
 
#define B_EC_OC_REG_RCN_MAP_HIP__A   0x2150035
 
#define B_EC_OC_REG_OCR_MPG_UOS__A   0x2150036
 
#define B_EC_OC_REG_OCR_MPG_UOS__M   0xFFF
 
#define B_EC_OC_REG_OCR_MPG_UOS_INIT   0x0
 
#define B_EC_OC_REG_OCR_MPG_USR_DAT__A   0x2150038
 
#define B_EC_OC_REG_IPR_INV_MPG__A   0x2150045
 
#define B_EC_OC_REG_DTO_CLKMODE__A   0x2150047
 
#define B_EC_OC_REG_DTO_PER__A   0x2150048
 
#define B_EC_OC_REG_DTO_BUR__A   0x2150049
 
#define B_EC_OC_REG_RCR_CLKMODE__A   0x215004A
 
#define B_CC_REG_OSC_MODE__A   0x2410010
 
#define B_CC_REG_OSC_MODE_M20   0x1
 
#define B_CC_REG_PLL_MODE__A   0x2410011
 
#define B_CC_REG_PLL_MODE_BYPASS_PLL   0x1
 
#define B_CC_REG_PLL_MODE_PUMP_CUR_12   0x14
 
#define B_CC_REG_REF_DIVIDE__A   0x2410012
 
#define B_CC_REG_PWD_MODE__A   0x2410015
 
#define B_CC_REG_PWD_MODE_DOWN_PLL   0x2
 
#define B_CC_REG_UPDATE__A   0x2410017
 
#define B_CC_REG_UPDATE_KEY   0x3973
 
#define B_CC_REG_JTAGID_L__A   0x2410019
 
#define B_CC_REG_DIVERSITY__A   0x241001B
 
#define B_LC_COMM_EXEC__A   0x2800000
 
#define B_LC_RA_RAM_IFINCR_NOM_L__A   0x282000C
 
#define B_LC_RA_RAM_FILTER_SYM_SET__A   0x282001A
 
#define B_LC_RA_RAM_FILTER_SYM_SET__PRE   0x3E8
 
#define B_LC_RA_RAM_FILTER_CRMM_A__A   0x2820060
 
#define B_LC_RA_RAM_FILTER_CRMM_A__PRE   0x4
 
#define B_LC_RA_RAM_FILTER_CRMM_B__A   0x2820061
 
#define B_LC_RA_RAM_FILTER_CRMM_B__PRE   0x1
 
#define B_LC_RA_RAM_FILTER_SRMM_A__A   0x2820068
 
#define B_LC_RA_RAM_FILTER_SRMM_A__PRE   0x4
 
#define B_LC_RA_RAM_FILTER_SRMM_B__A   0x2820069
 
#define B_LC_RA_RAM_FILTER_SRMM_B__PRE   0x1
 

Macro Definition Documentation

#define B_CC_REG_DIVERSITY__A   0x241001B

Definition at line 999 of file drxd_map_firm.h.

#define B_CC_REG_JTAGID_L__A   0x2410019

Definition at line 998 of file drxd_map_firm.h.

#define B_CC_REG_OSC_MODE__A   0x2410010

Definition at line 988 of file drxd_map_firm.h.

#define B_CC_REG_OSC_MODE_M20   0x1

Definition at line 989 of file drxd_map_firm.h.

#define B_CC_REG_PLL_MODE__A   0x2410011

Definition at line 990 of file drxd_map_firm.h.

#define B_CC_REG_PLL_MODE_BYPASS_PLL   0x1

Definition at line 991 of file drxd_map_firm.h.

#define B_CC_REG_PLL_MODE_PUMP_CUR_12   0x14

Definition at line 992 of file drxd_map_firm.h.

#define B_CC_REG_PWD_MODE__A   0x2410015

Definition at line 994 of file drxd_map_firm.h.

#define B_CC_REG_PWD_MODE_DOWN_PLL   0x2

Definition at line 995 of file drxd_map_firm.h.

#define B_CC_REG_REF_DIVIDE__A   0x2410012

Definition at line 993 of file drxd_map_firm.h.

#define B_CC_REG_UPDATE__A   0x2410017

Definition at line 996 of file drxd_map_firm.h.

#define B_CC_REG_UPDATE_KEY   0x3973

Definition at line 997 of file drxd_map_firm.h.

#define B_CE_COMM_EXEC__A   0x1800000

Definition at line 788 of file drxd_map_firm.h.

#define B_CE_REG_ATT__A   0x1810014

Definition at line 793 of file drxd_map_firm.h.

#define B_CE_REG_AVG_POW__A   0x1810012

Definition at line 791 of file drxd_map_firm.h.

#define B_CE_REG_COMM_EXEC__A   0x1810000

Definition at line 789 of file drxd_map_firm.h.

#define B_CE_REG_FI_EXP_NORM__A   0x1810091

Definition at line 809 of file drxd_map_firm.h.

#define B_CE_REG_FI_SHT_INCR__A   0x1810090

Definition at line 808 of file drxd_map_firm.h.

#define B_CE_REG_FR_BYPASS__A   0x1820044

Definition at line 865 of file drxd_map_firm.h.

#define B_CE_REG_FR_ERR_SH__A   0x1820046

Definition at line 867 of file drxd_map_firm.h.

#define B_CE_REG_FR_MAN_SH__A   0x1820047

Definition at line 868 of file drxd_map_firm.h.

#define B_CE_REG_FR_MID_TAP__A   0x1820028

Definition at line 837 of file drxd_map_firm.h.

#define B_CE_REG_FR_MODE__A   0x1820041

Definition at line 862 of file drxd_map_firm.h.

#define B_CE_REG_FR_PM_SET__A   0x1820045

Definition at line 866 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_G00__A   0x1820036

Definition at line 851 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_G01__A   0x1820037

Definition at line 852 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_G02__A   0x1820038

Definition at line 853 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_G03__A   0x1820039

Definition at line 854 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_G04__A   0x182003A

Definition at line 855 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_G05__A   0x182003B

Definition at line 856 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_G06__A   0x182003C

Definition at line 857 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_G07__A   0x182003D

Definition at line 858 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_G08__A   0x182003E

Definition at line 859 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_G09__A   0x182003F

Definition at line 860 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_G10__A   0x1820040

Definition at line 861 of file drxd_map_firm.h.

#define B_CE_REG_FR_RIO_GAIN__A   0x1820043

Definition at line 864 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G00__A   0x1820029

Definition at line 838 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G01__A   0x182002A

Definition at line 839 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G02__A   0x182002B

Definition at line 840 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G03__A   0x182002C

Definition at line 841 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G04__A   0x182002D

Definition at line 842 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G05__A   0x182002E

Definition at line 843 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G06__A   0x182002F

Definition at line 844 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G07__A   0x1820030

Definition at line 845 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G08__A   0x1820031

Definition at line 846 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G09__A   0x1820032

Definition at line 847 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G10__A   0x1820033

Definition at line 848 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G11__A   0x1820034

Definition at line 849 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_G12__A   0x1820035

Definition at line 850 of file drxd_map_firm.h.

#define B_CE_REG_FR_SQS_TRH__A   0x1820042

Definition at line 863 of file drxd_map_firm.h.

#define B_CE_REG_FR_TAP_SH__A   0x1820048

Definition at line 869 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG00__A   0x1820011

Definition at line 814 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG01__A   0x1820013

Definition at line 816 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG02__A   0x1820015

Definition at line 818 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG03__A   0x1820017

Definition at line 820 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG04__A   0x1820019

Definition at line 822 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG05__A   0x182001B

Definition at line 824 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG06__A   0x182001D

Definition at line 826 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG07__A   0x182001F

Definition at line 828 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG08__A   0x1820021

Definition at line 830 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG09__A   0x1820023

Definition at line 832 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG10__A   0x1820025

Definition at line 834 of file drxd_map_firm.h.

#define B_CE_REG_FR_TIMAG11__A   0x1820027

Definition at line 836 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL00__A   0x1820010

Definition at line 813 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL01__A   0x1820012

Definition at line 815 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL02__A   0x1820014

Definition at line 817 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL03__A   0x1820016

Definition at line 819 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL04__A   0x1820018

Definition at line 821 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL05__A   0x182001A

Definition at line 823 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL06__A   0x182001C

Definition at line 825 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL07__A   0x182001E

Definition at line 827 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL08__A   0x1820020

Definition at line 829 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL09__A   0x1820022

Definition at line 831 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL10__A   0x1820024

Definition at line 833 of file drxd_map_firm.h.

#define B_CE_REG_FR_TREAL11__A   0x1820026

Definition at line 835 of file drxd_map_firm.h.

#define B_CE_REG_IR_INPUTSEL__A   0x18100A0

Definition at line 810 of file drxd_map_firm.h.

#define B_CE_REG_IR_NEXP_THRES__A   0x18100A2

Definition at line 812 of file drxd_map_firm.h.

#define B_CE_REG_IR_STARTPOS__A   0x18100A1

Definition at line 811 of file drxd_map_firm.h.

#define B_CE_REG_MAX_POW__A   0x1810013

Definition at line 792 of file drxd_map_firm.h.

#define B_CE_REG_NE_ERR_SELECT__A   0x1810043

Definition at line 795 of file drxd_map_firm.h.

#define B_CE_REG_NE_MIXAVG__A   0x1810046

Definition at line 797 of file drxd_map_firm.h.

#define B_CE_REG_NE_NUPD_OFS__A   0x1810047

Definition at line 798 of file drxd_map_firm.h.

#define B_CE_REG_NE_TD_CAL__A   0x1810044

Definition at line 796 of file drxd_map_firm.h.

#define B_CE_REG_NRED__A   0x1810015

Definition at line 794 of file drxd_map_firm.h.

#define B_CE_REG_PE_NEXP_OFFS__A   0x1810050

Definition at line 799 of file drxd_map_firm.h.

#define B_CE_REG_PE_TIMESHIFT__A   0x1810051

Definition at line 800 of file drxd_map_firm.h.

#define B_CE_REG_TAPSET__A   0x1810011

Definition at line 790 of file drxd_map_firm.h.

#define B_CE_REG_TI_PHN_ENABLE__A   0x1810073

Definition at line 807 of file drxd_map_firm.h.

#define B_CE_REG_TP_A0_MU_LMS_STEP__A   0x1810066

Definition at line 803 of file drxd_map_firm.h.

#define B_CE_REG_TP_A0_TAP_NEW__A   0x1810064

Definition at line 801 of file drxd_map_firm.h.

#define B_CE_REG_TP_A0_TAP_NEW_VALID__A   0x1810065

Definition at line 802 of file drxd_map_firm.h.

#define B_CE_REG_TP_A1_MU_LMS_STEP__A   0x181006A

Definition at line 806 of file drxd_map_firm.h.

#define B_CE_REG_TP_A1_TAP_NEW__A   0x1810068

Definition at line 804 of file drxd_map_firm.h.

#define B_CE_REG_TP_A1_TAP_NEW_VALID__A   0x1810069

Definition at line 805 of file drxd_map_firm.h.

#define B_CP_COMM_EXEC__A   0x1400000

Definition at line 772 of file drxd_map_firm.h.

#define B_CP_REG_AC_AMP_FIX__A   0x1410048

Definition at line 786 of file drxd_map_firm.h.

#define B_CP_REG_AC_AMP_MODE__A   0x1410047

Definition at line 785 of file drxd_map_firm.h.

#define B_CP_REG_AC_ANG_MODE__A   0x141004A

Definition at line 787 of file drxd_map_firm.h.

#define B_CP_REG_AC_AVER_POW__A   0x1410041

Definition at line 781 of file drxd_map_firm.h.

#define B_CP_REG_AC_MAX_POW__A   0x1410042

Definition at line 782 of file drxd_map_firm.h.

#define B_CP_REG_AC_NEXP_OFFS__A   0x1410040

Definition at line 780 of file drxd_map_firm.h.

#define B_CP_REG_AC_WEIGHT_EXP__A   0x1410044

Definition at line 784 of file drxd_map_firm.h.

#define B_CP_REG_AC_WEIGHT_MAN__A   0x1410043

Definition at line 783 of file drxd_map_firm.h.

#define B_CP_REG_BR_SPL_OFFSET__A   0x1410023

Definition at line 775 of file drxd_map_firm.h.

#define B_CP_REG_BR_STR_DEL__A   0x1410024

Definition at line 776 of file drxd_map_firm.h.

#define B_CP_REG_COMM_EXEC__A   0x1410000

Definition at line 773 of file drxd_map_firm.h.

#define B_CP_REG_INTERVAL__A   0x1410011

Definition at line 774 of file drxd_map_firm.h.

#define B_CP_REG_RT_ANG_INC0__A   0x1410030

Definition at line 777 of file drxd_map_firm.h.

#define B_CP_REG_RT_ANG_INC1__A   0x1410031

Definition at line 778 of file drxd_map_firm.h.

#define B_CP_REG_RT_DETECT_TRH__A   0x1410033

Definition at line 779 of file drxd_map_firm.h.

#define B_EC_OC_REG_AVR_ASH_CNT__A   0x2150023

Definition at line 966 of file drxd_map_firm.h.

#define B_EC_OC_REG_AVR_BSH_CNT__A   0x2150024

Definition at line 967 of file drxd_map_firm.h.

#define B_EC_OC_REG_COMM_EXEC__A   0x2150000

Definition at line 938 of file drxd_map_firm.h.

#define B_EC_OC_REG_COMM_EXEC_CTL_ACTIVE   0x1

Definition at line 939 of file drxd_map_firm.h.

#define B_EC_OC_REG_COMM_EXEC_CTL_HOLD   0x2

Definition at line 940 of file drxd_map_firm.h.

#define B_EC_OC_REG_COMM_INT_STA__A   0x2150007

Definition at line 941 of file drxd_map_firm.h.

#define B_EC_OC_REG_DTO_BUR__A   0x2150049

Definition at line 986 of file drxd_map_firm.h.

#define B_EC_OC_REG_DTO_CLKMODE__A   0x2150047

Definition at line 984 of file drxd_map_firm.h.

#define B_EC_OC_REG_DTO_INC_HIP__A   0x2150015

Definition at line 958 of file drxd_map_firm.h.

#define B_EC_OC_REG_DTO_INC_LOP__A   0x2150014

Definition at line 957 of file drxd_map_firm.h.

#define B_EC_OC_REG_DTO_PER__A   0x2150048

Definition at line 985 of file drxd_map_firm.h.

#define B_EC_OC_REG_IPR_INV_MPG__A   0x2150045

Definition at line 983 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_HIP__A   0x2150011

Definition at line 950 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR   0x10

Definition at line 951 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M   0x200

Definition at line 952 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE   0x0

Definition at line 953 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE   0x200

Definition at line 954 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_LOP__A   0x2150010

Definition at line 942 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC__M   0x4

Definition at line 946 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC_STATIC   0x0

Definition at line 947 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M   0x80

Definition at line 948 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL   0x80

Definition at line 949 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_LOP_PAR_ENA__M   0x1

Definition at line 943 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE   0x1

Definition at line 945 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MODE_LOP_PAR_ENA_ENABLE   0x0

Definition at line 944 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MPG_SIO__A   0x2150012

Definition at line 955 of file drxd_map_firm.h.

#define B_EC_OC_REG_OC_MPG_SIO__M   0xFFF

Definition at line 956 of file drxd_map_firm.h.

#define B_EC_OC_REG_OCR_MPG_UOS__A   0x2150036

Definition at line 979 of file drxd_map_firm.h.

#define B_EC_OC_REG_OCR_MPG_UOS__M   0xFFF

Definition at line 980 of file drxd_map_firm.h.

#define B_EC_OC_REG_OCR_MPG_UOS_INIT   0x0

Definition at line 981 of file drxd_map_firm.h.

#define B_EC_OC_REG_OCR_MPG_USR_DAT__A   0x2150038

Definition at line 982 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCN_CLP_HIP__A   0x2150033

Definition at line 976 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCN_CLP_LOP__A   0x2150032

Definition at line 975 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCN_CRA_HIP__A   0x2150029

Definition at line 970 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCN_CRA_LOP__A   0x2150028

Definition at line 969 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCN_CST_HIP__A   0x215002B

Definition at line 972 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCN_CST_LOP__A   0x215002A

Definition at line 971 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCN_GAI_LVL__A   0x215002D

Definition at line 974 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCN_MAP_HIP__A   0x2150035

Definition at line 978 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCN_MAP_LOP__A   0x2150034

Definition at line 977 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCN_MODE__A   0x2150027

Definition at line 968 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCN_SET_LVL__A   0x215002C

Definition at line 973 of file drxd_map_firm.h.

#define B_EC_OC_REG_RCR_CLKMODE__A   0x215004A

Definition at line 987 of file drxd_map_firm.h.

#define B_EC_OC_REG_SNC_ISC_LVL__A   0x2150016

Definition at line 959 of file drxd_map_firm.h.

#define B_EC_OC_REG_SNC_ISC_LVL_OSC__M   0xF0

Definition at line 960 of file drxd_map_firm.h.

#define B_EC_OC_REG_TMD_CUR_CNT__A   0x2150021

Definition at line 965 of file drxd_map_firm.h.

#define B_EC_OC_REG_TMD_HIL_MAR__A   0x215001F

Definition at line 963 of file drxd_map_firm.h.

#define B_EC_OC_REG_TMD_LOL_MAR__A   0x2150020

Definition at line 964 of file drxd_map_firm.h.

#define B_EC_OC_REG_TMD_TOP_CNT__A   0x215001E

Definition at line 962 of file drxd_map_firm.h.

#define B_EC_OC_REG_TMD_TOP_MODE__A   0x215001D

Definition at line 961 of file drxd_map_firm.h.

#define B_EC_OD_DEINT_RAM__A   0x2120000

Definition at line 932 of file drxd_map_firm.h.

#define B_EC_OD_REG_COMM_EXEC__A   0x2110000

Definition at line 930 of file drxd_map_firm.h.

#define B_EC_OD_REG_SYNC__A   0x2110664

Definition at line 931 of file drxd_map_firm.h.

#define B_EC_RS_EC_RAM__A   0x2140000

Definition at line 937 of file drxd_map_firm.h.

#define B_EC_RS_REG_COMM_EXEC__A   0x2130000

Definition at line 933 of file drxd_map_firm.h.

#define B_EC_RS_REG_REQ_PCK_CNT__A   0x2130010

Definition at line 934 of file drxd_map_firm.h.

#define B_EC_RS_REG_VAL__A   0x2130011

Definition at line 935 of file drxd_map_firm.h.

#define B_EC_RS_REG_VAL_PCK   0x1

Definition at line 936 of file drxd_map_firm.h.

#define B_EC_SB_REG_ALPHA__A   0x2010012

Definition at line 904 of file drxd_map_firm.h.

#define B_EC_SB_REG_COMM_EXEC__A   0x2010000

Definition at line 896 of file drxd_map_firm.h.

#define B_EC_SB_REG_CONST_16QAM   0x1

Definition at line 902 of file drxd_map_firm.h.

#define B_EC_SB_REG_CONST_64QAM   0x2

Definition at line 903 of file drxd_map_firm.h.

#define B_EC_SB_REG_CONST__A   0x2010011

Definition at line 900 of file drxd_map_firm.h.

#define B_EC_SB_REG_CONST_QPSK   0x0

Definition at line 901 of file drxd_map_firm.h.

#define B_EC_SB_REG_CSI_HI__A   0x2010014

Definition at line 908 of file drxd_map_firm.h.

#define B_EC_SB_REG_CSI_LO__A   0x2010015

Definition at line 909 of file drxd_map_firm.h.

#define B_EC_SB_REG_CSI_OFS0__A   0x201001D

Definition at line 917 of file drxd_map_firm.h.

#define B_EC_SB_REG_CSI_OFS1__A   0x201001E

Definition at line 918 of file drxd_map_firm.h.

#define B_EC_SB_REG_CSI_OFS2__A   0x201001F

Definition at line 919 of file drxd_map_firm.h.

#define B_EC_SB_REG_PRIOR__A   0x2010013

Definition at line 905 of file drxd_map_firm.h.

#define B_EC_SB_REG_PRIOR_HI   0x0

Definition at line 906 of file drxd_map_firm.h.

#define B_EC_SB_REG_PRIOR_LO   0x1

Definition at line 907 of file drxd_map_firm.h.

#define B_EC_SB_REG_SCALE_BIT2__A   0x201001B

Definition at line 915 of file drxd_map_firm.h.

#define B_EC_SB_REG_SCALE_LSB__A   0x201001C

Definition at line 916 of file drxd_map_firm.h.

#define B_EC_SB_REG_SCALE_MSB__A   0x201001A

Definition at line 914 of file drxd_map_firm.h.

#define B_EC_SB_REG_SMB_TGL__A   0x2010016

Definition at line 910 of file drxd_map_firm.h.

#define B_EC_SB_REG_SNR_HI__A   0x2010017

Definition at line 911 of file drxd_map_firm.h.

#define B_EC_SB_REG_SNR_LO__A   0x2010019

Definition at line 913 of file drxd_map_firm.h.

#define B_EC_SB_REG_SNR_MID__A   0x2010018

Definition at line 912 of file drxd_map_firm.h.

#define B_EC_SB_REG_TR_MODE_2K   0x1

Definition at line 899 of file drxd_map_firm.h.

#define B_EC_SB_REG_TR_MODE_8K   0x0

Definition at line 898 of file drxd_map_firm.h.

#define B_EC_SB_REG_TR_MODE__A   0x2010010

Definition at line 897 of file drxd_map_firm.h.

#define B_EC_VD_REG_COMM_EXEC__A   0x2090000

Definition at line 920 of file drxd_map_firm.h.

#define B_EC_VD_REG_FORCE__A   0x2090010

Definition at line 921 of file drxd_map_firm.h.

#define B_EC_VD_REG_REQ_SMB_CNT__A   0x2090012

Definition at line 928 of file drxd_map_firm.h.

#define B_EC_VD_REG_RLK_ENA__A   0x2090014

Definition at line 929 of file drxd_map_firm.h.

#define B_EC_VD_REG_SET_CODERATE__A   0x2090011

Definition at line 922 of file drxd_map_firm.h.

#define B_EC_VD_REG_SET_CODERATE_C1_2   0x0

Definition at line 923 of file drxd_map_firm.h.

#define B_EC_VD_REG_SET_CODERATE_C2_3   0x1

Definition at line 924 of file drxd_map_firm.h.

#define B_EC_VD_REG_SET_CODERATE_C3_4   0x2

Definition at line 925 of file drxd_map_firm.h.

#define B_EC_VD_REG_SET_CODERATE_C5_6   0x3

Definition at line 926 of file drxd_map_firm.h.

#define B_EC_VD_REG_SET_CODERATE_C7_8   0x4

Definition at line 927 of file drxd_map_firm.h.

#define B_EQ_COMM_EXEC__A   0x1C00000

Definition at line 870 of file drxd_map_firm.h.

#define B_EQ_REG_COMM_EXEC__A   0x1C10000

Definition at line 871 of file drxd_map_firm.h.

#define B_EQ_REG_COMM_MB__A   0x1C10002

Definition at line 872 of file drxd_map_firm.h.

#define B_EQ_REG_IS_CLIP_EXP__A   0x1C10017

Definition at line 875 of file drxd_map_firm.h.

#define B_EQ_REG_IS_GAIN_EXP__A   0x1C10016

Definition at line 874 of file drxd_map_firm.h.

#define B_EQ_REG_IS_GAIN_MAN__A   0x1C10015

Definition at line 873 of file drxd_map_firm.h.

#define B_EQ_REG_OT_ALPHA__A   0x1C10047

Definition at line 889 of file drxd_map_firm.h.

#define B_EQ_REG_OT_CONST__A   0x1C10046

Definition at line 888 of file drxd_map_firm.h.

#define B_EQ_REG_OT_CSI_OFFSET__A   0x1C1004B

Definition at line 893 of file drxd_map_firm.h.

#define B_EQ_REG_OT_CSI_STEP__A   0x1C1004A

Definition at line 892 of file drxd_map_firm.h.

#define B_EQ_REG_OT_QNT_THRES0__A   0x1C10048

Definition at line 890 of file drxd_map_firm.h.

#define B_EQ_REG_OT_QNT_THRES1__A   0x1C10049

Definition at line 891 of file drxd_map_firm.h.

#define B_EQ_REG_RC_SEL_CAR__A   0x1C10032

Definition at line 878 of file drxd_map_firm.h.

#define B_EQ_REG_RC_SEL_CAR_DIV_ON   0x1

Definition at line 880 of file drxd_map_firm.h.

#define B_EQ_REG_RC_SEL_CAR_FFTMODE__M   0x80

Definition at line 887 of file drxd_map_firm.h.

#define B_EQ_REG_RC_SEL_CAR_INIT   0x2

Definition at line 879 of file drxd_map_firm.h.

#define B_EQ_REG_RC_SEL_CAR_LOCAL_A_CC   0x0

Definition at line 883 of file drxd_map_firm.h.

#define B_EQ_REG_RC_SEL_CAR_LOCAL_B_CE   0x8

Definition at line 884 of file drxd_map_firm.h.

#define B_EQ_REG_RC_SEL_CAR_MEAS_A_CC   0x0

Definition at line 885 of file drxd_map_firm.h.

#define B_EQ_REG_RC_SEL_CAR_MEAS_B_CE   0x20

Definition at line 886 of file drxd_map_firm.h.

#define B_EQ_REG_RC_SEL_CAR_PASS_A_CC   0x0

Definition at line 881 of file drxd_map_firm.h.

#define B_EQ_REG_RC_SEL_CAR_PASS_B_CE   0x2

Definition at line 882 of file drxd_map_firm.h.

#define B_EQ_REG_SN_CEGAIN__A   0x1C1002A

Definition at line 876 of file drxd_map_firm.h.

#define B_EQ_REG_SN_OFFSET__A   0x1C1002B

Definition at line 877 of file drxd_map_firm.h.

#define B_EQ_REG_TD_REQ_SMB_CNT__A   0x1C10061

Definition at line 894 of file drxd_map_firm.h.

#define B_EQ_REG_TD_TPS_PWR_OFS__A   0x1C10062

Definition at line 895 of file drxd_map_firm.h.

#define B_FE_AD_REG_CLKNEG__A   0xC10015

Definition at line 659 of file drxd_map_firm.h.

#define B_FE_AD_REG_COMM_EXEC__A   0xC10000

Definition at line 655 of file drxd_map_firm.h.

#define B_FE_AD_REG_FDB_IN__A   0xC10012

Definition at line 656 of file drxd_map_firm.h.

#define B_FE_AD_REG_INVEXT__A   0xC10014

Definition at line 658 of file drxd_map_firm.h.

#define B_FE_AD_REG_PD__A   0xC10013

Definition at line 657 of file drxd_map_firm.h.

#define B_FE_AG_REG_ACE_AUR_CNT__A   0xC2001A

Definition at line 690 of file drxd_map_firm.h.

#define B_FE_AG_REG_ACE_RUR_CNT__A   0xC2001B

Definition at line 691 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_AGC_SIO__A   0xC20013

Definition at line 680 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_AGC_SIO_AGC_SIO_2__M   0x2

Definition at line 681 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_INPUT   0x2

Definition at line 683 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_OUTPUT   0x0

Definition at line 682 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_HIP__A   0xC20011

Definition at line 673 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_HIP_MODE_J__M   0x8

Definition at line 674 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_HIP_MODE_J_DYNAMIC   0x8

Definition at line 676 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_HIP_MODE_J_STATIC   0x0

Definition at line 675 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP__A   0xC20010

Definition at line 661 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP_MODE_4__M   0x10

Definition at line 662 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP_MODE_4_DYNAMIC   0x10

Definition at line 664 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP_MODE_4_STATIC   0x0

Definition at line 663 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP_MODE_5__M   0x20

Definition at line 665 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP_MODE_5_STATIC   0x0

Definition at line 666 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP_MODE_C__M   0x1000

Definition at line 667 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP_MODE_C_DYNAMIC   0x1000

Definition at line 669 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP_MODE_C_STATIC   0x0

Definition at line 668 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP_MODE_E__M   0x4000

Definition at line 670 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP_MODE_E_DYNAMIC   0x4000

Definition at line 672 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_MODE_LOP_MODE_E_STATIC   0x0

Definition at line 671 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_PGA_MODE__A   0xC20012

Definition at line 677 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_PGA_MODE_PFN_PCN_AFY_REN   0x1

Definition at line 679 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_PGA_MODE_PFY_PCY_AFY_REN   0x0

Definition at line 678 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_PWD__A   0xC20015

Definition at line 684 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_PWD_PWD_PD2__M   0x2

Definition at line 685 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_PWD_PWD_PD2_DISABLE   0x0

Definition at line 686 of file drxd_map_firm.h.

#define B_FE_AG_REG_AG_PWD_PWD_PD2_ENABLE   0x2

Definition at line 687 of file drxd_map_firm.h.

#define B_FE_AG_REG_BGC_CGC_WRI__A   0xC20069

Definition at line 744 of file drxd_map_firm.h.

#define B_FE_AG_REG_BGC_FGC_WRI__A   0xC20068

Definition at line 743 of file drxd_map_firm.h.

#define B_FE_AG_REG_CDR_RUR_CNT__A   0xC20020

Definition at line 692 of file drxd_map_firm.h.

#define B_FE_AG_REG_COMM_EXEC__A   0xC20000

Definition at line 660 of file drxd_map_firm.h.

#define B_FE_AG_REG_DCE_AUR_CNT__A   0xC20016

Definition at line 688 of file drxd_map_firm.h.

#define B_FE_AG_REG_DCE_RUR_CNT__A   0xC20017

Definition at line 689 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_FAS_DEC__A   0xC2002E

Definition at line 704 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_FAS_INC__A   0xC2002D

Definition at line 703 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_FLA_DEC__A   0xC2002A

Definition at line 700 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_FLA_INC__A   0xC20029

Definition at line 699 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_FLA_RGN__A   0xC20026

Definition at line 696 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_JMP_PSN__A   0xC20028

Definition at line 698 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_RUR_CNT__A   0xC20024

Definition at line 693 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_SET_LVL__A   0xC20025

Definition at line 694 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_SET_LVL__M   0x1FF

Definition at line 695 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_SLO_DEC__A   0xC2002C

Definition at line 702 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_SLO_INC__A   0xC2002B

Definition at line 701 of file drxd_map_firm.h.

#define B_FE_AG_REG_EGC_SLO_RGN__A   0xC20027

Definition at line 697 of file drxd_map_firm.h.

#define B_FE_AG_REG_FGM_WRI__A   0xC20061

Definition at line 742 of file drxd_map_firm.h.

#define B_FE_AG_REG_GC1_AGC_DAT__A   0xC20035

Definition at line 711 of file drxd_map_firm.h.

#define B_FE_AG_REG_GC1_AGC_DAT__M   0x3FF

Definition at line 712 of file drxd_map_firm.h.

#define B_FE_AG_REG_GC1_AGC_MAX__A   0xC20033

Definition at line 709 of file drxd_map_firm.h.

#define B_FE_AG_REG_GC1_AGC_MIN__A   0xC20034

Definition at line 710 of file drxd_map_firm.h.

#define B_FE_AG_REG_GC1_AGC_OFF__A   0xC20032

Definition at line 708 of file drxd_map_firm.h.

#define B_FE_AG_REG_GC1_AGC_RIC__A   0xC20031

Definition at line 707 of file drxd_map_firm.h.

#define B_FE_AG_REG_IND_DEL__A   0xC2003F

Definition at line 717 of file drxd_map_firm.h.

#define B_FE_AG_REG_IND_PD1_WRI__A   0xC20040

Definition at line 718 of file drxd_map_firm.h.

#define B_FE_AG_REG_IND_THD_HIL__A   0xC2003E

Definition at line 716 of file drxd_map_firm.h.

#define B_FE_AG_REG_IND_THD_LOL__A   0xC2003D

Definition at line 715 of file drxd_map_firm.h.

#define B_FE_AG_REG_IND_WIN__A   0xC2003C

Definition at line 714 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDA_AUR_CNT__A   0xC20041

Definition at line 719 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDA_AVE_DAT__A   0xC20043

Definition at line 721 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDA_RUR_CNT__A   0xC20042

Definition at line 720 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDC_FLA_RGN__A   0xC20046

Definition at line 724 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDC_FLA_STP__A   0xC20048

Definition at line 726 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDC_JMP_PSN__A   0xC20047

Definition at line 725 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDC_MAP_DAT__A   0xC2004B

Definition at line 729 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDC_MAX__A   0xC2004C

Definition at line 730 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDC_PD2_WRI__A   0xC2004A

Definition at line 728 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDC_RUR_CNT__A   0xC20044

Definition at line 722 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDC_SET_LVL__A   0xC20045

Definition at line 723 of file drxd_map_firm.h.

#define B_FE_AG_REG_PDC_SLO_STP__A   0xC20049

Definition at line 727 of file drxd_map_firm.h.

#define B_FE_AG_REG_PM1_AGC_WRI__A   0xC20030

Definition at line 705 of file drxd_map_firm.h.

#define B_FE_AG_REG_PM1_AGC_WRI__M   0x7FF

Definition at line 706 of file drxd_map_firm.h.

#define B_FE_AG_REG_PM2_AGC_WRI__A   0xC20036

Definition at line 713 of file drxd_map_firm.h.

#define B_FE_AG_REG_TGA_AUR_CNT__A   0xC2004D

Definition at line 731 of file drxd_map_firm.h.

#define B_FE_AG_REG_TGA_AVE_DAT__A   0xC2004F

Definition at line 733 of file drxd_map_firm.h.

#define B_FE_AG_REG_TGA_RUR_CNT__A   0xC2004E

Definition at line 732 of file drxd_map_firm.h.

#define B_FE_AG_REG_TGC_FLA_RGN__A   0xC20052

Definition at line 737 of file drxd_map_firm.h.

#define B_FE_AG_REG_TGC_FLA_STP__A   0xC20054

Definition at line 739 of file drxd_map_firm.h.

#define B_FE_AG_REG_TGC_JMP_PSN__A   0xC20053

Definition at line 738 of file drxd_map_firm.h.

#define B_FE_AG_REG_TGC_MAP_DAT__A   0xC20056

Definition at line 741 of file drxd_map_firm.h.

#define B_FE_AG_REG_TGC_RUR_CNT__A   0xC20050

Definition at line 734 of file drxd_map_firm.h.

#define B_FE_AG_REG_TGC_SET_LVL__A   0xC20051

Definition at line 735 of file drxd_map_firm.h.

#define B_FE_AG_REG_TGC_SET_LVL__M   0x3F

Definition at line 736 of file drxd_map_firm.h.

#define B_FE_AG_REG_TGC_SLO_STP__A   0xC20055

Definition at line 740 of file drxd_map_firm.h.

#define B_FE_CF_REG_COMM_EXEC__A   0xC60000

Definition at line 758 of file drxd_map_firm.h.

#define B_FE_CF_REG_IMP_VAL__A   0xC60013

Definition at line 762 of file drxd_map_firm.h.

#define B_FE_CF_REG_MAX_LEV__A   0xC60011

Definition at line 760 of file drxd_map_firm.h.

#define B_FE_CF_REG_MEAS_VAL__A   0xC60014

Definition at line 763 of file drxd_map_firm.h.

#define B_FE_CF_REG_NR__A   0xC60012

Definition at line 761 of file drxd_map_firm.h.

#define B_FE_CF_REG_SCL__A   0xC60010

Definition at line 759 of file drxd_map_firm.h.

#define B_FE_COMM_EXEC__A   0xC00000

Definition at line 654 of file drxd_map_firm.h.

#define B_FE_CU_REG_COMM_EXEC__A   0xC70000

Definition at line 764 of file drxd_map_firm.h.

#define B_FE_CU_REG_CTR_NFC_ICR__A   0xC70020

Definition at line 767 of file drxd_map_firm.h.

#define B_FE_CU_REG_CTR_NFC_OCR__A   0xC70021

Definition at line 768 of file drxd_map_firm.h.

#define B_FE_CU_REG_DIV_NFC_CLP__A   0xC70027

Definition at line 769 of file drxd_map_firm.h.

#define B_FE_CU_REG_FRM_CNT_RST__A   0xC70011

Definition at line 765 of file drxd_map_firm.h.

#define B_FE_CU_REG_FRM_CNT_STR__A   0xC70012

Definition at line 766 of file drxd_map_firm.h.

#define B_FE_FD_REG_COMM_EXEC__A   0xC40000

Definition at line 747 of file drxd_map_firm.h.

#define B_FE_FD_REG_MAX_LEV__A   0xC40011

Definition at line 749 of file drxd_map_firm.h.

#define B_FE_FD_REG_MEAS_VAL__A   0xC40014

Definition at line 751 of file drxd_map_firm.h.

#define B_FE_FD_REG_NR__A   0xC40012

Definition at line 750 of file drxd_map_firm.h.

#define B_FE_FD_REG_SCL__A   0xC40010

Definition at line 748 of file drxd_map_firm.h.

#define B_FE_FS_REG_ADD_INC_LOP__A   0xC30010

Definition at line 746 of file drxd_map_firm.h.

#define B_FE_FS_REG_COMM_EXEC__A   0xC30000

Definition at line 745 of file drxd_map_firm.h.

#define B_FE_IF_REG_COMM_EXEC__A   0xC50000

Definition at line 752 of file drxd_map_firm.h.

#define B_FE_IF_REG_INCR0__A   0xC50010

Definition at line 753 of file drxd_map_firm.h.

#define B_FE_IF_REG_INCR0__M   0xFFFF

Definition at line 755 of file drxd_map_firm.h.

#define B_FE_IF_REG_INCR0__W   16

Definition at line 754 of file drxd_map_firm.h.

#define B_FE_IF_REG_INCR1__A   0xC50011

Definition at line 756 of file drxd_map_firm.h.

#define B_FE_IF_REG_INCR1__M   0xFF

Definition at line 757 of file drxd_map_firm.h.

#define B_FT_COMM_EXEC__A   0x1000000

Definition at line 770 of file drxd_map_firm.h.

#define B_FT_REG_COMM_EXEC__A   0x1010000

Definition at line 771 of file drxd_map_firm.h.

#define B_HI_COMM_EXEC__A   0x400000

Definition at line 520 of file drxd_map_firm.h.

#define B_HI_COMM_MB__A   0x400002

Definition at line 521 of file drxd_map_firm.h.

#define B_HI_CT_REG_COMM_STATE__A   0x410001

Definition at line 522 of file drxd_map_firm.h.

#define B_HI_IF_RAM_TRP_BPT0__AX   0x430000

Definition at line 541 of file drxd_map_firm.h.

#define B_HI_IF_RAM_USR_BEGIN__A   0x430200

Definition at line 542 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CFG_ACT__A   0x420037

Definition at line 534 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CFG_ACT_BRD__M   0x4

Definition at line 536 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CFG_ACT_BRD_OFF   0x0

Definition at line 537 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CFG_ACT_BRD_ON   0x4

Definition at line 538 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CFG_ACT_PWD_EXE   0x8

Definition at line 539 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CFG_ACT_SLV0_ON   0x1

Definition at line 535 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CFG_BDL__A   0x420035

Definition at line 532 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CFG_DIV__A   0x420034

Definition at line 531 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CFG_KEY__A   0x420033

Definition at line 530 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CFG_WUP__A   0x420036

Definition at line 533 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CMD__A   0x420032

Definition at line 524 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CMD_CONFIG   0x3

Definition at line 526 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CMD_EXECUTE   0x6

Definition at line 527 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_CMD_RESET   0x2

Definition at line 525 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_RES__A   0x420031

Definition at line 523 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_RST_KEY__A   0x420033

Definition at line 528 of file drxd_map_firm.h.

#define B_HI_RA_RAM_SRV_RST_KEY_ACT   0x3973

Definition at line 529 of file drxd_map_firm.h.

#define B_HI_RA_RAM_USR_BEGIN__A   0x420040

Definition at line 540 of file drxd_map_firm.h.

#define B_LC_COMM_EXEC__A   0x2800000

Definition at line 1000 of file drxd_map_firm.h.

#define B_LC_RA_RAM_FILTER_CRMM_A__A   0x2820060

Definition at line 1004 of file drxd_map_firm.h.

#define B_LC_RA_RAM_FILTER_CRMM_A__PRE   0x4

Definition at line 1005 of file drxd_map_firm.h.

#define B_LC_RA_RAM_FILTER_CRMM_B__A   0x2820061

Definition at line 1006 of file drxd_map_firm.h.

#define B_LC_RA_RAM_FILTER_CRMM_B__PRE   0x1

Definition at line 1007 of file drxd_map_firm.h.

#define B_LC_RA_RAM_FILTER_SRMM_A__A   0x2820068

Definition at line 1008 of file drxd_map_firm.h.

#define B_LC_RA_RAM_FILTER_SRMM_A__PRE   0x4

Definition at line 1009 of file drxd_map_firm.h.

#define B_LC_RA_RAM_FILTER_SRMM_B__A   0x2820069

Definition at line 1010 of file drxd_map_firm.h.

#define B_LC_RA_RAM_FILTER_SRMM_B__PRE   0x1

Definition at line 1011 of file drxd_map_firm.h.

#define B_LC_RA_RAM_FILTER_SYM_SET__A   0x282001A

Definition at line 1002 of file drxd_map_firm.h.

#define B_LC_RA_RAM_FILTER_SYM_SET__PRE   0x3E8

Definition at line 1003 of file drxd_map_firm.h.

#define B_LC_RA_RAM_IFINCR_NOM_L__A   0x282000C

Definition at line 1001 of file drxd_map_firm.h.

#define B_SC_COMM_EXEC__A   0x800000

Definition at line 543 of file drxd_map_firm.h.

#define B_SC_COMM_EXEC_CTL_STOP   0x0

Definition at line 544 of file drxd_map_firm.h.

#define B_SC_COMM_STATE__A   0x800001

Definition at line 545 of file drxd_map_firm.h.

#define B_SC_RA_RAM_BAND__A   0x8200EC

Definition at line 631 of file drxd_map_firm.h.

#define B_SC_RA_RAM_BE_OPT_DELAY__A   0x82004D

Definition at line 586 of file drxd_map_firm.h.

#define B_SC_RA_RAM_BE_OPT_ENA__A   0x82004C

Definition at line 584 of file drxd_map_firm.h.

#define B_SC_RA_RAM_BE_OPT_ENA_CP_OPT   0x1

Definition at line 585 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CMD__A   0x820043

Definition at line 549 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CMD_ADDR__A   0x820042

Definition at line 548 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CMD_GET_OP_PARAM   0x5

Definition at line 552 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CMD_PROC_START   0x1

Definition at line 550 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CMD_SET_PREF_PARAM   0x3

Definition at line 551 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CO_TD_CAL_2K__A   0x82005D

Definition at line 593 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CO_TD_CAL_8K__A   0x82005E

Definition at line 594 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CONFIG__A   0x820050

Definition at line 587 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CONFIG_DIV_BLANK_ENABLE__M   0x200

Definition at line 591 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CONFIG_DIV_ECHO_ENABLE__M   0x400

Definition at line 592 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CONFIG_FR_ENABLE__M   0x4

Definition at line 588 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CONFIG_FREQSCAN__M   0x10

Definition at line 589 of file drxd_map_firm.h.

#define B_SC_RA_RAM_CONFIG_SLAVE__M   0x20

Definition at line 590 of file drxd_map_firm.h.

#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_16__A   0x820099

Definition at line 597 of file drxd_map_firm.h.

#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_32__A   0x820098

Definition at line 596 of file drxd_map_firm.h.

#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_4__A   0x82009B

Definition at line 599 of file drxd_map_firm.h.

#define B_SC_RA_RAM_DIVERSITY_DELAY_2K_8__A   0x82009A

Definition at line 598 of file drxd_map_firm.h.

#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_16__A   0x82009D

Definition at line 601 of file drxd_map_firm.h.

#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_32__A   0x82009C

Definition at line 600 of file drxd_map_firm.h.

#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_4__A   0x82009F

Definition at line 603 of file drxd_map_firm.h.

#define B_SC_RA_RAM_DIVERSITY_DELAY_8K_8__A   0x82009E

Definition at line 602 of file drxd_map_firm.h.

#define B_SC_RA_RAM_DRIVER_VERSION__AX   0x8201FE

Definition at line 652 of file drxd_map_firm.h.

#define B_SC_RA_RAM_ECHO_SHIFT_LIM__A   0x8200DD

Definition at line 628 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE   0x4

Definition at line 643 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE   0x17D

Definition at line 642 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE   0x5

Definition at line 645 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE   0x133

Definition at line 644 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE   0x5

Definition at line 641 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE   0x10D

Definition at line 640 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE   0x4

Definition at line 649 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE   0x14A

Definition at line 648 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE   0x4

Definition at line 651 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE   0x1BB

Definition at line 650 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE   0x5

Definition at line 647 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE   0x114

Definition at line 646 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE   0x4

Definition at line 639 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE   0x1E2

Definition at line 638 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE   0x4

Definition at line 637 of file drxd_map_firm.h.

#define B_SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE   0x100

Definition at line 636 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IF_SAVE__AX   0x82008E

Definition at line 595 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_2K_FREQINC__A   0x8200D2

Definition at line 606 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_2K_FREQINC__PRE   0x4

Definition at line 607 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_2K_KAISINC__A   0x8200D3

Definition at line 608 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_2K_KAISINC__PRE   0x100

Definition at line 609 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_2K_LENGTH__A   0x8200D1

Definition at line 604 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_2K_LENGTH__PRE   0x9

Definition at line 605 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_8K_FREQINC__A   0x8200D5

Definition at line 612 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_8K_FREQINC__PRE   0x8

Definition at line 613 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_8K_KAISINC__A   0x8200D6

Definition at line 614 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_8K_KAISINC__PRE   0x200

Definition at line 615 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_8K_LENGTH__A   0x8200D4

Definition at line 610 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_COARSE_8K_LENGTH__PRE   0x8

Definition at line 611 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_2K_FREQINC__A   0x8200D8

Definition at line 618 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_2K_FREQINC__PRE   0x4

Definition at line 619 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_2K_KAISINC__A   0x8200D9

Definition at line 620 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_2K_KAISINC__PRE   0x100

Definition at line 621 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_2K_LENGTH__A   0x8200D7

Definition at line 616 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_2K_LENGTH__PRE   0x9

Definition at line 617 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_8K_FREQINC__A   0x8200DB

Definition at line 624 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_8K_FREQINC__PRE   0x1

Definition at line 625 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_8K_KAISINC__A   0x8200DC

Definition at line 626 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_8K_KAISINC__PRE   0x40

Definition at line 627 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_8K_LENGTH__A   0x8200DA

Definition at line 622 of file drxd_map_firm.h.

#define B_SC_RA_RAM_IR_FINE_8K_LENGTH__PRE   0xB

Definition at line 623 of file drxd_map_firm.h.

#define B_SC_RA_RAM_LC_ABS_2K__A   0x8200F4

Definition at line 632 of file drxd_map_firm.h.

#define B_SC_RA_RAM_LC_ABS_2K__PRE   0x1F

Definition at line 633 of file drxd_map_firm.h.

#define B_SC_RA_RAM_LC_ABS_8K__A   0x8200F5

Definition at line 634 of file drxd_map_firm.h.

#define B_SC_RA_RAM_LC_ABS_8K__PRE   0x1F

Definition at line 635 of file drxd_map_firm.h.

#define B_SC_RA_RAM_LOCK__A   0x82004B

Definition at line 580 of file drxd_map_firm.h.

#define B_SC_RA_RAM_LOCK_DEMOD__M   0x1

Definition at line 581 of file drxd_map_firm.h.

#define B_SC_RA_RAM_LOCK_FEC__M   0x2

Definition at line 582 of file drxd_map_firm.h.

#define B_SC_RA_RAM_LOCK_MPEG__M   0x4

Definition at line 583 of file drxd_map_firm.h.

#define B_SC_RA_RAM_LOCKTRACK_MIN   0x1

Definition at line 554 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_AUTO_CONST__M   0x4

Definition at line 577 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_AUTO_GUARD__M   0x2

Definition at line 576 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_AUTO_HIER__M   0x8

Definition at line 578 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_AUTO_MODE__M   0x1

Definition at line 575 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_AUTO_RATE__M   0x10

Definition at line 579 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_CONST_QAM16   0x10

Definition at line 562 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_CONST_QAM64   0x20

Definition at line 563 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_CONST_QPSK   0x0

Definition at line 561 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_GUARD_16   0x4

Definition at line 558 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_GUARD_32   0x0

Definition at line 557 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_GUARD_4   0xC

Definition at line 560 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_GUARD_8   0x8

Definition at line 559 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_HIER_A1   0x40

Definition at line 565 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_HIER_A2   0x80

Definition at line 566 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_HIER_A4   0xC0

Definition at line 567 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_HIER_NO   0x0

Definition at line 564 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_MODE_2K   0x0

Definition at line 555 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_MODE_8K   0x1

Definition at line 556 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_PRIO_HI   0x0

Definition at line 573 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_PRIO_LO   0x1000

Definition at line 574 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_RATE_1_2   0x0

Definition at line 568 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_RATE_2_3   0x200

Definition at line 569 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_RATE_3_4   0x400

Definition at line 570 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_RATE_5_6   0x600

Definition at line 571 of file drxd_map_firm.h.

#define B_SC_RA_RAM_OP_PARAM_RATE_7_8   0x800

Definition at line 572 of file drxd_map_firm.h.

#define B_SC_RA_RAM_PARAM0__A   0x820040

Definition at line 546 of file drxd_map_firm.h.

#define B_SC_RA_RAM_PARAM1__A   0x820041

Definition at line 547 of file drxd_map_firm.h.

#define B_SC_RA_RAM_PROC_LOCKTRACK   0x0

Definition at line 653 of file drxd_map_firm.h.

#define B_SC_RA_RAM_SAMPLE_RATE_COUNT__A   0x8200E8

Definition at line 629 of file drxd_map_firm.h.

#define B_SC_RA_RAM_SAMPLE_RATE_STEP__A   0x8200E9

Definition at line 630 of file drxd_map_firm.h.

#define B_SC_RA_RAM_SW_EVENT_RUN_NMASK__M   0x1

Definition at line 553 of file drxd_map_firm.h.

#define CC_REG_JTAGID_L__A   0x2410019

Definition at line 507 of file drxd_map_firm.h.

#define CC_REG_OSC_MODE__A   0x2410010

Definition at line 497 of file drxd_map_firm.h.

#define CC_REG_OSC_MODE_M20   0x1

Definition at line 498 of file drxd_map_firm.h.

#define CC_REG_PLL_MODE__A   0x2410011

Definition at line 499 of file drxd_map_firm.h.

#define CC_REG_PLL_MODE_BYPASS_PLL   0x1

Definition at line 500 of file drxd_map_firm.h.

#define CC_REG_PLL_MODE_PUMP_CUR_12   0x14

Definition at line 501 of file drxd_map_firm.h.

#define CC_REG_PWD_MODE__A   0x2410015

Definition at line 503 of file drxd_map_firm.h.

#define CC_REG_PWD_MODE_DOWN_PLL   0x2

Definition at line 504 of file drxd_map_firm.h.

#define CC_REG_REF_DIVIDE__A   0x2410012

Definition at line 502 of file drxd_map_firm.h.

#define CC_REG_UPDATE__A   0x2410017

Definition at line 505 of file drxd_map_firm.h.

#define CC_REG_UPDATE_KEY   0x3973

Definition at line 506 of file drxd_map_firm.h.

#define CE_COMM_EXEC__A   0x1800000

Definition at line 288 of file drxd_map_firm.h.

#define CE_REG_ATT__A   0x1810014

Definition at line 293 of file drxd_map_firm.h.

#define CE_REG_AVG_POW__A   0x1810012

Definition at line 291 of file drxd_map_firm.h.

#define CE_REG_COMM_EXEC__A   0x1810000

Definition at line 289 of file drxd_map_firm.h.

#define CE_REG_FI_EXP_NORM__A   0x1810091

Definition at line 309 of file drxd_map_firm.h.

#define CE_REG_FI_SHT_INCR__A   0x1810090

Definition at line 308 of file drxd_map_firm.h.

#define CE_REG_FR_BYPASS__A   0x1820044

Definition at line 365 of file drxd_map_firm.h.

#define CE_REG_FR_ERR_SH__A   0x1820046

Definition at line 367 of file drxd_map_firm.h.

#define CE_REG_FR_MAN_SH__A   0x1820047

Definition at line 368 of file drxd_map_firm.h.

#define CE_REG_FR_MID_TAP__A   0x1820028

Definition at line 337 of file drxd_map_firm.h.

#define CE_REG_FR_MODE__A   0x1820041

Definition at line 362 of file drxd_map_firm.h.

#define CE_REG_FR_PM_SET__A   0x1820045

Definition at line 366 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_G00__A   0x1820036

Definition at line 351 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_G01__A   0x1820037

Definition at line 352 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_G02__A   0x1820038

Definition at line 353 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_G03__A   0x1820039

Definition at line 354 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_G04__A   0x182003A

Definition at line 355 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_G05__A   0x182003B

Definition at line 356 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_G06__A   0x182003C

Definition at line 357 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_G07__A   0x182003D

Definition at line 358 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_G08__A   0x182003E

Definition at line 359 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_G09__A   0x182003F

Definition at line 360 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_G10__A   0x1820040

Definition at line 361 of file drxd_map_firm.h.

#define CE_REG_FR_RIO_GAIN__A   0x1820043

Definition at line 364 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G00__A   0x1820029

Definition at line 338 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G01__A   0x182002A

Definition at line 339 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G02__A   0x182002B

Definition at line 340 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G03__A   0x182002C

Definition at line 341 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G04__A   0x182002D

Definition at line 342 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G05__A   0x182002E

Definition at line 343 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G06__A   0x182002F

Definition at line 344 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G07__A   0x1820030

Definition at line 345 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G08__A   0x1820031

Definition at line 346 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G09__A   0x1820032

Definition at line 347 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G10__A   0x1820033

Definition at line 348 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G11__A   0x1820034

Definition at line 349 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_G12__A   0x1820035

Definition at line 350 of file drxd_map_firm.h.

#define CE_REG_FR_SQS_TRH__A   0x1820042

Definition at line 363 of file drxd_map_firm.h.

#define CE_REG_FR_TAP_SH__A   0x1820048

Definition at line 369 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG00__A   0x1820011

Definition at line 314 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG01__A   0x1820013

Definition at line 316 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG02__A   0x1820015

Definition at line 318 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG03__A   0x1820017

Definition at line 320 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG04__A   0x1820019

Definition at line 322 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG05__A   0x182001B

Definition at line 324 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG06__A   0x182001D

Definition at line 326 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG07__A   0x182001F

Definition at line 328 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG08__A   0x1820021

Definition at line 330 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG09__A   0x1820023

Definition at line 332 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG10__A   0x1820025

Definition at line 334 of file drxd_map_firm.h.

#define CE_REG_FR_TIMAG11__A   0x1820027

Definition at line 336 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL00__A   0x1820010

Definition at line 313 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL01__A   0x1820012

Definition at line 315 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL02__A   0x1820014

Definition at line 317 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL03__A   0x1820016

Definition at line 319 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL04__A   0x1820018

Definition at line 321 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL05__A   0x182001A

Definition at line 323 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL06__A   0x182001C

Definition at line 325 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL07__A   0x182001E

Definition at line 327 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL08__A   0x1820020

Definition at line 329 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL09__A   0x1820022

Definition at line 331 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL10__A   0x1820024

Definition at line 333 of file drxd_map_firm.h.

#define CE_REG_FR_TREAL11__A   0x1820026

Definition at line 335 of file drxd_map_firm.h.

#define CE_REG_IR_INPUTSEL__A   0x18100A0

Definition at line 310 of file drxd_map_firm.h.

#define CE_REG_IR_NEXP_THRES__A   0x18100A2

Definition at line 312 of file drxd_map_firm.h.

#define CE_REG_IR_STARTPOS__A   0x18100A1

Definition at line 311 of file drxd_map_firm.h.

#define CE_REG_MAX_POW__A   0x1810013

Definition at line 292 of file drxd_map_firm.h.

#define CE_REG_NE_ERR_SELECT__A   0x1810043

Definition at line 295 of file drxd_map_firm.h.

#define CE_REG_NE_MIXAVG__A   0x1810046

Definition at line 297 of file drxd_map_firm.h.

#define CE_REG_NE_NUPD_OFS__A   0x1810047

Definition at line 298 of file drxd_map_firm.h.

#define CE_REG_NE_TD_CAL__A   0x1810044

Definition at line 296 of file drxd_map_firm.h.

#define CE_REG_NRED__A   0x1810015

Definition at line 294 of file drxd_map_firm.h.

#define CE_REG_PE_NEXP_OFFS__A   0x1810050

Definition at line 299 of file drxd_map_firm.h.

#define CE_REG_PE_TIMESHIFT__A   0x1810051

Definition at line 300 of file drxd_map_firm.h.

#define CE_REG_TAPSET__A   0x1810011

Definition at line 290 of file drxd_map_firm.h.

#define CE_REG_TI_NEXP_OFFS__A   0x1810070

Definition at line 307 of file drxd_map_firm.h.

#define CE_REG_TP_A0_MU_LMS_STEP__A   0x1810066

Definition at line 303 of file drxd_map_firm.h.

#define CE_REG_TP_A0_TAP_NEW__A   0x1810064

Definition at line 301 of file drxd_map_firm.h.

#define CE_REG_TP_A0_TAP_NEW_VALID__A   0x1810065

Definition at line 302 of file drxd_map_firm.h.

#define CE_REG_TP_A1_MU_LMS_STEP__A   0x181006A

Definition at line 306 of file drxd_map_firm.h.

#define CE_REG_TP_A1_TAP_NEW__A   0x1810068

Definition at line 304 of file drxd_map_firm.h.

#define CE_REG_TP_A1_TAP_NEW_VALID__A   0x1810069

Definition at line 305 of file drxd_map_firm.h.

#define CP_COMM_EXEC__A   0x1400000

Definition at line 270 of file drxd_map_firm.h.

#define CP_REG_AC_AMP_FIX__A   0x1410048

Definition at line 286 of file drxd_map_firm.h.

#define CP_REG_AC_AMP_MODE__A   0x1410047

Definition at line 285 of file drxd_map_firm.h.

#define CP_REG_AC_ANG_MODE__A   0x141004A

Definition at line 287 of file drxd_map_firm.h.

#define CP_REG_AC_AVER_POW__A   0x1410041

Definition at line 281 of file drxd_map_firm.h.

#define CP_REG_AC_MAX_POW__A   0x1410042

Definition at line 282 of file drxd_map_firm.h.

#define CP_REG_AC_NEXP_OFFS__A   0x1410040

Definition at line 280 of file drxd_map_firm.h.

#define CP_REG_AC_WEIGHT_EXP__A   0x1410044

Definition at line 284 of file drxd_map_firm.h.

#define CP_REG_AC_WEIGHT_MAN__A   0x1410043

Definition at line 283 of file drxd_map_firm.h.

#define CP_REG_BR_SPL_OFFSET__A   0x1410023

Definition at line 273 of file drxd_map_firm.h.

#define CP_REG_BR_STR_DEL__A   0x1410024

Definition at line 274 of file drxd_map_firm.h.

#define CP_REG_COMM_EXEC__A   0x1410000

Definition at line 271 of file drxd_map_firm.h.

#define CP_REG_INTERVAL__A   0x1410011

Definition at line 272 of file drxd_map_firm.h.

#define CP_REG_RT_ANG_INC0__A   0x1410030

Definition at line 275 of file drxd_map_firm.h.

#define CP_REG_RT_ANG_INC1__A   0x1410031

Definition at line 276 of file drxd_map_firm.h.

#define CP_REG_RT_DETECT_ENA__A   0x1410032

Definition at line 277 of file drxd_map_firm.h.

#define CP_REG_RT_DETECT_TRH__A   0x1410033

Definition at line 278 of file drxd_map_firm.h.

#define CP_REG_RT_EXP_MARG__A   0x141003E

Definition at line 279 of file drxd_map_firm.h.

#define EC_OC_REG_AVR_ASH_CNT__A   0x2150023

Definition at line 464 of file drxd_map_firm.h.

#define EC_OC_REG_AVR_BSH_CNT__A   0x2150024

Definition at line 465 of file drxd_map_firm.h.

#define EC_OC_REG_COMM_EXEC__A   0x2150000

Definition at line 435 of file drxd_map_firm.h.

#define EC_OC_REG_COMM_EXEC_CTL_ACTIVE   0x1

Definition at line 436 of file drxd_map_firm.h.

#define EC_OC_REG_COMM_EXEC_CTL_HOLD   0x2

Definition at line 437 of file drxd_map_firm.h.

#define EC_OC_REG_COMM_INT_STA__A   0x2150007

Definition at line 438 of file drxd_map_firm.h.

#define EC_OC_REG_DTO_INC_HIP__A   0x2150015

Definition at line 456 of file drxd_map_firm.h.

#define EC_OC_REG_DTO_INC_LOP__A   0x2150014

Definition at line 455 of file drxd_map_firm.h.

#define EC_OC_REG_IPR_INV_MPG__A   0x2150045

Definition at line 496 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_HIP__A   0x2150011

Definition at line 447 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_HIP_MPG_BUS_SRC_MONITOR   0x10

Definition at line 448 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL__M   0x200

Definition at line 449 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_DISABLE   0x0

Definition at line 450 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_HIP_MPG_PAR_VAL_ENABLE   0x200

Definition at line 451 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_LOP__A   0x2150010

Definition at line 439 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC__M   0x4

Definition at line 443 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_LOP_DTO_CTR_SRC_STATIC   0x0

Definition at line 444 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE__M   0x80

Definition at line 445 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_LOP_MPG_TRM_MDE_SERIAL   0x80

Definition at line 446 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_LOP_PAR_ENA__M   0x1

Definition at line 440 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_LOP_PAR_ENA_DISABLE   0x1

Definition at line 442 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MODE_LOP_PAR_ENA_ENABLE   0x0

Definition at line 441 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MON_SIO__A   0x2150013

Definition at line 454 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MPG_SIO__A   0x2150012

Definition at line 452 of file drxd_map_firm.h.

#define EC_OC_REG_OC_MPG_SIO__M   0xFFF

Definition at line 453 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS__A   0x2150039

Definition at line 481 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_CLK_ENABLE   0x800

Definition at line 493 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_DAT_0_ENABLE   0x1

Definition at line 482 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_DAT_1_ENABLE   0x2

Definition at line 483 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_DAT_2_ENABLE   0x4

Definition at line 484 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_DAT_3_ENABLE   0x8

Definition at line 485 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_DAT_4_ENABLE   0x10

Definition at line 486 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_DAT_5_ENABLE   0x20

Definition at line 487 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_DAT_6_ENABLE   0x40

Definition at line 488 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_DAT_7_ENABLE   0x80

Definition at line 489 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_DAT_8_ENABLE   0x100

Definition at line 490 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_DAT_9_ENABLE   0x200

Definition at line 491 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_UOS_VAL_ENABLE   0x400

Definition at line 492 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_WRI__A   0x215003A

Definition at line 494 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MON_WRI_INIT   0x0

Definition at line 495 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MPG_UOS__A   0x2150036

Definition at line 477 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MPG_UOS__M   0xFFF

Definition at line 478 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MPG_UOS_INIT   0x0

Definition at line 479 of file drxd_map_firm.h.

#define EC_OC_REG_OCR_MPG_USR_DAT__A   0x2150038

Definition at line 480 of file drxd_map_firm.h.

#define EC_OC_REG_RCN_CLP_HIP__A   0x2150033

Definition at line 474 of file drxd_map_firm.h.

#define EC_OC_REG_RCN_CLP_LOP__A   0x2150032

Definition at line 473 of file drxd_map_firm.h.

#define EC_OC_REG_RCN_CRA_HIP__A   0x2150029

Definition at line 468 of file drxd_map_firm.h.

#define EC_OC_REG_RCN_CRA_LOP__A   0x2150028

Definition at line 467 of file drxd_map_firm.h.

#define EC_OC_REG_RCN_CST_HIP__A   0x215002B

Definition at line 470 of file drxd_map_firm.h.

#define EC_OC_REG_RCN_CST_LOP__A   0x215002A

Definition at line 469 of file drxd_map_firm.h.

#define EC_OC_REG_RCN_GAI_LVL__A   0x215002D

Definition at line 472 of file drxd_map_firm.h.

#define EC_OC_REG_RCN_MAP_HIP__A   0x2150035

Definition at line 476 of file drxd_map_firm.h.

#define EC_OC_REG_RCN_MAP_LOP__A   0x2150034

Definition at line 475 of file drxd_map_firm.h.

#define EC_OC_REG_RCN_MODE__A   0x2150027

Definition at line 466 of file drxd_map_firm.h.

#define EC_OC_REG_RCN_SET_LVL__A   0x215002C

Definition at line 471 of file drxd_map_firm.h.

#define EC_OC_REG_SNC_ISC_LVL__A   0x2150016

Definition at line 457 of file drxd_map_firm.h.

#define EC_OC_REG_SNC_ISC_LVL_OSC__M   0xF0

Definition at line 458 of file drxd_map_firm.h.

#define EC_OC_REG_TMD_CUR_CNT__A   0x2150021

Definition at line 463 of file drxd_map_firm.h.

#define EC_OC_REG_TMD_HIL_MAR__A   0x215001F

Definition at line 461 of file drxd_map_firm.h.

#define EC_OC_REG_TMD_LOL_MAR__A   0x2150020

Definition at line 462 of file drxd_map_firm.h.

#define EC_OC_REG_TMD_TOP_CNT__A   0x215001E

Definition at line 460 of file drxd_map_firm.h.

#define EC_OC_REG_TMD_TOP_MODE__A   0x215001D

Definition at line 459 of file drxd_map_firm.h.

#define EC_OD_DEINT_RAM__A   0x2120000

Definition at line 429 of file drxd_map_firm.h.

#define EC_OD_REG_COMM_EXEC__A   0x2110000

Definition at line 427 of file drxd_map_firm.h.

#define EC_OD_REG_SYNC__A   0x2110010

Definition at line 428 of file drxd_map_firm.h.

#define EC_RS_EC_RAM__A   0x2140000

Definition at line 434 of file drxd_map_firm.h.

#define EC_RS_REG_COMM_EXEC__A   0x2130000

Definition at line 430 of file drxd_map_firm.h.

#define EC_RS_REG_REQ_PCK_CNT__A   0x2130010

Definition at line 431 of file drxd_map_firm.h.

#define EC_RS_REG_VAL__A   0x2130011

Definition at line 432 of file drxd_map_firm.h.

#define EC_RS_REG_VAL_PCK   0x1

Definition at line 433 of file drxd_map_firm.h.

#define EC_SB_REG_ALPHA__A   0x2010012

Definition at line 403 of file drxd_map_firm.h.

#define EC_SB_REG_COMM_EXEC__A   0x2010000

Definition at line 395 of file drxd_map_firm.h.

#define EC_SB_REG_CONST_16QAM   0x1

Definition at line 401 of file drxd_map_firm.h.

#define EC_SB_REG_CONST_64QAM   0x2

Definition at line 402 of file drxd_map_firm.h.

#define EC_SB_REG_CONST__A   0x2010011

Definition at line 399 of file drxd_map_firm.h.

#define EC_SB_REG_CONST_QPSK   0x0

Definition at line 400 of file drxd_map_firm.h.

#define EC_SB_REG_CSI_HI__A   0x2010014

Definition at line 407 of file drxd_map_firm.h.

#define EC_SB_REG_CSI_LO__A   0x2010015

Definition at line 408 of file drxd_map_firm.h.

#define EC_SB_REG_CSI_OFS__A   0x201001D

Definition at line 416 of file drxd_map_firm.h.

#define EC_SB_REG_PRIOR__A   0x2010013

Definition at line 404 of file drxd_map_firm.h.

#define EC_SB_REG_PRIOR_HI   0x0

Definition at line 405 of file drxd_map_firm.h.

#define EC_SB_REG_PRIOR_LO   0x1

Definition at line 406 of file drxd_map_firm.h.

#define EC_SB_REG_SCALE_BIT2__A   0x201001B

Definition at line 414 of file drxd_map_firm.h.

#define EC_SB_REG_SCALE_LSB__A   0x201001C

Definition at line 415 of file drxd_map_firm.h.

#define EC_SB_REG_SCALE_MSB__A   0x201001A

Definition at line 413 of file drxd_map_firm.h.

#define EC_SB_REG_SMB_TGL__A   0x2010016

Definition at line 409 of file drxd_map_firm.h.

#define EC_SB_REG_SNR_HI__A   0x2010017

Definition at line 410 of file drxd_map_firm.h.

#define EC_SB_REG_SNR_LO__A   0x2010019

Definition at line 412 of file drxd_map_firm.h.

#define EC_SB_REG_SNR_MID__A   0x2010018

Definition at line 411 of file drxd_map_firm.h.

#define EC_SB_REG_TR_MODE_2K   0x1

Definition at line 398 of file drxd_map_firm.h.

#define EC_SB_REG_TR_MODE_8K   0x0

Definition at line 397 of file drxd_map_firm.h.

#define EC_SB_REG_TR_MODE__A   0x2010010

Definition at line 396 of file drxd_map_firm.h.

#define EC_VD_REG_COMM_EXEC__A   0x2090000

Definition at line 417 of file drxd_map_firm.h.

#define EC_VD_REG_FORCE__A   0x2090010

Definition at line 418 of file drxd_map_firm.h.

#define EC_VD_REG_REQ_SMB_CNT__A   0x2090012

Definition at line 425 of file drxd_map_firm.h.

#define EC_VD_REG_RLK_ENA__A   0x2090014

Definition at line 426 of file drxd_map_firm.h.

#define EC_VD_REG_SET_CODERATE__A   0x2090011

Definition at line 419 of file drxd_map_firm.h.

#define EC_VD_REG_SET_CODERATE_C1_2   0x0

Definition at line 420 of file drxd_map_firm.h.

#define EC_VD_REG_SET_CODERATE_C2_3   0x1

Definition at line 421 of file drxd_map_firm.h.

#define EC_VD_REG_SET_CODERATE_C3_4   0x2

Definition at line 422 of file drxd_map_firm.h.

#define EC_VD_REG_SET_CODERATE_C5_6   0x3

Definition at line 423 of file drxd_map_firm.h.

#define EC_VD_REG_SET_CODERATE_C7_8   0x4

Definition at line 424 of file drxd_map_firm.h.

#define EQ_COMM_EXEC__A   0x1C00000

Definition at line 370 of file drxd_map_firm.h.

#define EQ_REG_COMM_EXEC__A   0x1C10000

Definition at line 371 of file drxd_map_firm.h.

#define EQ_REG_COMM_MB__A   0x1C10002

Definition at line 372 of file drxd_map_firm.h.

#define EQ_REG_IS_CLIP_EXP__A   0x1C10017

Definition at line 375 of file drxd_map_firm.h.

#define EQ_REG_IS_GAIN_EXP__A   0x1C10016

Definition at line 374 of file drxd_map_firm.h.

#define EQ_REG_IS_GAIN_MAN__A   0x1C10015

Definition at line 373 of file drxd_map_firm.h.

#define EQ_REG_OT_ALPHA__A   0x1C10047

Definition at line 388 of file drxd_map_firm.h.

#define EQ_REG_OT_CONST__A   0x1C10046

Definition at line 387 of file drxd_map_firm.h.

#define EQ_REG_OT_CSI_OFFSET__A   0x1C1004B

Definition at line 392 of file drxd_map_firm.h.

#define EQ_REG_OT_CSI_STEP__A   0x1C1004A

Definition at line 391 of file drxd_map_firm.h.

#define EQ_REG_OT_QNT_THRES0__A   0x1C10048

Definition at line 389 of file drxd_map_firm.h.

#define EQ_REG_OT_QNT_THRES1__A   0x1C10049

Definition at line 390 of file drxd_map_firm.h.

#define EQ_REG_RC_SEL_CAR__A   0x1C10032

Definition at line 378 of file drxd_map_firm.h.

#define EQ_REG_RC_SEL_CAR_DIV_ON   0x1

Definition at line 380 of file drxd_map_firm.h.

#define EQ_REG_RC_SEL_CAR_INIT   0x0

Definition at line 379 of file drxd_map_firm.h.

#define EQ_REG_RC_SEL_CAR_LOCAL_A_CC   0x0

Definition at line 383 of file drxd_map_firm.h.

#define EQ_REG_RC_SEL_CAR_LOCAL_B_CE   0x8

Definition at line 384 of file drxd_map_firm.h.

#define EQ_REG_RC_SEL_CAR_MEAS_A_CC   0x0

Definition at line 385 of file drxd_map_firm.h.

#define EQ_REG_RC_SEL_CAR_MEAS_B_CE   0x20

Definition at line 386 of file drxd_map_firm.h.

#define EQ_REG_RC_SEL_CAR_PASS_A_CC   0x0

Definition at line 381 of file drxd_map_firm.h.

#define EQ_REG_RC_SEL_CAR_PASS_B_CE   0x2

Definition at line 382 of file drxd_map_firm.h.

#define EQ_REG_SN_CEGAIN__A   0x1C1002A

Definition at line 376 of file drxd_map_firm.h.

#define EQ_REG_SN_OFFSET__A   0x1C1002B

Definition at line 377 of file drxd_map_firm.h.

#define EQ_REG_TD_REQ_SMB_CNT__A   0x1C10061

Definition at line 393 of file drxd_map_firm.h.

#define EQ_REG_TD_TPS_PWR_OFS__A   0x1C10062

Definition at line 394 of file drxd_map_firm.h.

#define FE_AD_REG_CLKNEG__A   0xC10015

Definition at line 161 of file drxd_map_firm.h.

#define FE_AD_REG_COMM_EXEC__A   0xC10000

Definition at line 157 of file drxd_map_firm.h.

#define FE_AD_REG_FDB_IN__A   0xC10012

Definition at line 158 of file drxd_map_firm.h.

#define FE_AD_REG_INVEXT__A   0xC10014

Definition at line 160 of file drxd_map_firm.h.

#define FE_AD_REG_PD__A   0xC10013

Definition at line 159 of file drxd_map_firm.h.

#define FE_AG_REG_ACE_AUR_CNT__A   0xC2001A

Definition at line 189 of file drxd_map_firm.h.

#define FE_AG_REG_ACE_RUR_CNT__A   0xC2001B

Definition at line 190 of file drxd_map_firm.h.

#define FE_AG_REG_AG_AGC_SIO__A   0xC20013

Definition at line 179 of file drxd_map_firm.h.

#define FE_AG_REG_AG_AGC_SIO_AGC_SIO_2__M   0x2

Definition at line 180 of file drxd_map_firm.h.

#define FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_INPUT   0x2

Definition at line 182 of file drxd_map_firm.h.

#define FE_AG_REG_AG_AGC_SIO_AGC_SIO_2_OUTPUT   0x0

Definition at line 181 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_HIP__A   0xC20011

Definition at line 175 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP__A   0xC20010

Definition at line 163 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP_MODE_4__M   0x10

Definition at line 164 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP_MODE_4_DYNAMIC   0x10

Definition at line 166 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP_MODE_4_STATIC   0x0

Definition at line 165 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP_MODE_5__M   0x20

Definition at line 167 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP_MODE_5_STATIC   0x0

Definition at line 168 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP_MODE_C__M   0x1000

Definition at line 169 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP_MODE_C_DYNAMIC   0x1000

Definition at line 171 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP_MODE_C_STATIC   0x0

Definition at line 170 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP_MODE_E__M   0x4000

Definition at line 172 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP_MODE_E_DYNAMIC   0x4000

Definition at line 174 of file drxd_map_firm.h.

#define FE_AG_REG_AG_MODE_LOP_MODE_E_STATIC   0x0

Definition at line 173 of file drxd_map_firm.h.

#define FE_AG_REG_AG_PGA_MODE__A   0xC20012

Definition at line 176 of file drxd_map_firm.h.

#define FE_AG_REG_AG_PGA_MODE_PFN_PCN_AFY_REN   0x1

Definition at line 178 of file drxd_map_firm.h.

#define FE_AG_REG_AG_PGA_MODE_PFY_PCY_AFY_REN   0x0

Definition at line 177 of file drxd_map_firm.h.

#define FE_AG_REG_AG_PWD__A   0xC20015

Definition at line 183 of file drxd_map_firm.h.

#define FE_AG_REG_AG_PWD_PWD_PD2__M   0x2

Definition at line 184 of file drxd_map_firm.h.

#define FE_AG_REG_AG_PWD_PWD_PD2_DISABLE   0x0

Definition at line 185 of file drxd_map_firm.h.

#define FE_AG_REG_AG_PWD_PWD_PD2_ENABLE   0x2

Definition at line 186 of file drxd_map_firm.h.

#define FE_AG_REG_BGC_CGC_WRI__A   0xC20069

Definition at line 245 of file drxd_map_firm.h.

#define FE_AG_REG_BGC_FGC_WRI__A   0xC20068

Definition at line 244 of file drxd_map_firm.h.

#define FE_AG_REG_CDR_RUR_CNT__A   0xC20020

Definition at line 191 of file drxd_map_firm.h.

#define FE_AG_REG_COMM_EXEC__A   0xC20000

Definition at line 162 of file drxd_map_firm.h.

#define FE_AG_REG_DCE_AUR_CNT__A   0xC20016

Definition at line 187 of file drxd_map_firm.h.

#define FE_AG_REG_DCE_RUR_CNT__A   0xC20017

Definition at line 188 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_FAS_DEC__A   0xC2002E

Definition at line 203 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_FAS_INC__A   0xC2002D

Definition at line 202 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_FLA_DEC__A   0xC2002A

Definition at line 199 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_FLA_INC__A   0xC20029

Definition at line 198 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_FLA_RGN__A   0xC20026

Definition at line 195 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_JMP_PSN__A   0xC20028

Definition at line 197 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_RUR_CNT__A   0xC20024

Definition at line 192 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_SET_LVL__A   0xC20025

Definition at line 193 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_SET_LVL__M   0x1FF

Definition at line 194 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_SLO_DEC__A   0xC2002C

Definition at line 201 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_SLO_INC__A   0xC2002B

Definition at line 200 of file drxd_map_firm.h.

#define FE_AG_REG_EGC_SLO_RGN__A   0xC20027

Definition at line 196 of file drxd_map_firm.h.

#define FE_AG_REG_FGA_AUR_CNT__A   0xC20057

Definition at line 241 of file drxd_map_firm.h.

#define FE_AG_REG_FGA_RUR_CNT__A   0xC20058

Definition at line 242 of file drxd_map_firm.h.

#define FE_AG_REG_FGM_WRI__A   0xC20061

Definition at line 243 of file drxd_map_firm.h.

#define FE_AG_REG_GC1_AGC_DAT__A   0xC20035

Definition at line 210 of file drxd_map_firm.h.

#define FE_AG_REG_GC1_AGC_DAT__M   0x3FF

Definition at line 211 of file drxd_map_firm.h.

#define FE_AG_REG_GC1_AGC_MAX__A   0xC20033

Definition at line 208 of file drxd_map_firm.h.

#define FE_AG_REG_GC1_AGC_MIN__A   0xC20034

Definition at line 209 of file drxd_map_firm.h.

#define FE_AG_REG_GC1_AGC_OFF__A   0xC20032

Definition at line 207 of file drxd_map_firm.h.

#define FE_AG_REG_GC1_AGC_RIC__A   0xC20031

Definition at line 206 of file drxd_map_firm.h.

#define FE_AG_REG_IND_DEL__A   0xC2003F

Definition at line 216 of file drxd_map_firm.h.

#define FE_AG_REG_IND_PD1_WRI__A   0xC20040

Definition at line 217 of file drxd_map_firm.h.

#define FE_AG_REG_IND_THD_HIL__A   0xC2003E

Definition at line 215 of file drxd_map_firm.h.

#define FE_AG_REG_IND_THD_LOL__A   0xC2003D

Definition at line 214 of file drxd_map_firm.h.

#define FE_AG_REG_IND_WIN__A   0xC2003C

Definition at line 213 of file drxd_map_firm.h.

#define FE_AG_REG_PDA_AUR_CNT__A   0xC20041

Definition at line 218 of file drxd_map_firm.h.

#define FE_AG_REG_PDA_AVE_DAT__A   0xC20043

Definition at line 220 of file drxd_map_firm.h.

#define FE_AG_REG_PDA_RUR_CNT__A   0xC20042

Definition at line 219 of file drxd_map_firm.h.

#define FE_AG_REG_PDC_FLA_RGN__A   0xC20046

Definition at line 223 of file drxd_map_firm.h.

#define FE_AG_REG_PDC_FLA_STP__A   0xC20048

Definition at line 225 of file drxd_map_firm.h.

#define FE_AG_REG_PDC_JMP_PSN__A   0xC20047

Definition at line 224 of file drxd_map_firm.h.

#define FE_AG_REG_PDC_MAP_DAT__A   0xC2004B

Definition at line 228 of file drxd_map_firm.h.

#define FE_AG_REG_PDC_MAX__A   0xC2004C

Definition at line 229 of file drxd_map_firm.h.

#define FE_AG_REG_PDC_PD2_WRI__A   0xC2004A

Definition at line 227 of file drxd_map_firm.h.

#define FE_AG_REG_PDC_RUR_CNT__A   0xC20044

Definition at line 221 of file drxd_map_firm.h.

#define FE_AG_REG_PDC_SET_LVL__A   0xC20045

Definition at line 222 of file drxd_map_firm.h.

#define FE_AG_REG_PDC_SLO_STP__A   0xC20049

Definition at line 226 of file drxd_map_firm.h.

#define FE_AG_REG_PM1_AGC_WRI__A   0xC20030

Definition at line 204 of file drxd_map_firm.h.

#define FE_AG_REG_PM1_AGC_WRI__M   0x7FF

Definition at line 205 of file drxd_map_firm.h.

#define FE_AG_REG_PM2_AGC_WRI__A   0xC20036

Definition at line 212 of file drxd_map_firm.h.

#define FE_AG_REG_TGA_AUR_CNT__A   0xC2004D

Definition at line 230 of file drxd_map_firm.h.

#define FE_AG_REG_TGA_AVE_DAT__A   0xC2004F

Definition at line 232 of file drxd_map_firm.h.

#define FE_AG_REG_TGA_RUR_CNT__A   0xC2004E

Definition at line 231 of file drxd_map_firm.h.

#define FE_AG_REG_TGC_FLA_RGN__A   0xC20052

Definition at line 236 of file drxd_map_firm.h.

#define FE_AG_REG_TGC_FLA_STP__A   0xC20054

Definition at line 238 of file drxd_map_firm.h.

#define FE_AG_REG_TGC_JMP_PSN__A   0xC20053

Definition at line 237 of file drxd_map_firm.h.

#define FE_AG_REG_TGC_MAP_DAT__A   0xC20056

Definition at line 240 of file drxd_map_firm.h.

#define FE_AG_REG_TGC_RUR_CNT__A   0xC20050

Definition at line 233 of file drxd_map_firm.h.

#define FE_AG_REG_TGC_SET_LVL__A   0xC20051

Definition at line 234 of file drxd_map_firm.h.

#define FE_AG_REG_TGC_SET_LVL__M   0x3F

Definition at line 235 of file drxd_map_firm.h.

#define FE_AG_REG_TGC_SLO_STP__A   0xC20055

Definition at line 239 of file drxd_map_firm.h.

#define FE_CF_REG_COMM_EXEC__A   0xC60000

Definition at line 259 of file drxd_map_firm.h.

#define FE_CF_REG_IMP_VAL__A   0xC60013

Definition at line 263 of file drxd_map_firm.h.

#define FE_CF_REG_MAX_LEV__A   0xC60011

Definition at line 261 of file drxd_map_firm.h.

#define FE_CF_REG_MEAS_VAL__A   0xC60014

Definition at line 264 of file drxd_map_firm.h.

#define FE_CF_REG_NR__A   0xC60012

Definition at line 262 of file drxd_map_firm.h.

#define FE_CF_REG_SCL__A   0xC60010

Definition at line 260 of file drxd_map_firm.h.

#define FE_COMM_EXEC__A   0xC00000

Definition at line 156 of file drxd_map_firm.h.

#define FE_CU_REG_COMM_EXEC__A   0xC70000

Definition at line 265 of file drxd_map_firm.h.

#define FE_CU_REG_FRM_CNT_RST__A   0xC70011

Definition at line 266 of file drxd_map_firm.h.

#define FE_CU_REG_FRM_CNT_STR__A   0xC70012

Definition at line 267 of file drxd_map_firm.h.

#define FE_FD_REG_COMM_EXEC__A   0xC40000

Definition at line 248 of file drxd_map_firm.h.

#define FE_FD_REG_MAX_LEV__A   0xC40011

Definition at line 250 of file drxd_map_firm.h.

#define FE_FD_REG_MEAS_VAL__A   0xC40014

Definition at line 252 of file drxd_map_firm.h.

#define FE_FD_REG_NR__A   0xC40012

Definition at line 251 of file drxd_map_firm.h.

#define FE_FD_REG_SCL__A   0xC40010

Definition at line 249 of file drxd_map_firm.h.

#define FE_FS_REG_ADD_INC_LOP__A   0xC30010

Definition at line 247 of file drxd_map_firm.h.

#define FE_FS_REG_COMM_EXEC__A   0xC30000

Definition at line 246 of file drxd_map_firm.h.

#define FE_IF_REG_COMM_EXEC__A   0xC50000

Definition at line 253 of file drxd_map_firm.h.

#define FE_IF_REG_INCR0__A   0xC50010

Definition at line 254 of file drxd_map_firm.h.

#define FE_IF_REG_INCR0__M   0xFFFF

Definition at line 256 of file drxd_map_firm.h.

#define FE_IF_REG_INCR0__W   16

Definition at line 255 of file drxd_map_firm.h.

#define FE_IF_REG_INCR1__A   0xC50011

Definition at line 257 of file drxd_map_firm.h.

#define FE_IF_REG_INCR1__M   0xFF

Definition at line 258 of file drxd_map_firm.h.

#define FT_COMM_EXEC__A   0x1000000

Definition at line 268 of file drxd_map_firm.h.

#define FT_REG_COMM_EXEC__A   0x1010000

Definition at line 269 of file drxd_map_firm.h.

#define HI_COMM_EXEC__A   0x400000

Definition at line 34 of file drxd_map_firm.h.

#define HI_COMM_MB__A   0x400002

Definition at line 35 of file drxd_map_firm.h.

#define HI_CT_REG_COMM_STATE__A   0x410001

Definition at line 36 of file drxd_map_firm.h.

#define HI_IF_RAM_TRP_BPT0__AX   0x430000

Definition at line 55 of file drxd_map_firm.h.

#define HI_IF_RAM_USR_BEGIN__A   0x430200

Definition at line 56 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CFG_ACT__A   0x420037

Definition at line 48 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CFG_ACT_BRD__M   0x4

Definition at line 50 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CFG_ACT_BRD_OFF   0x0

Definition at line 51 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CFG_ACT_BRD_ON   0x4

Definition at line 52 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CFG_ACT_PWD_EXE   0x8

Definition at line 53 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CFG_ACT_SLV0_ON   0x1

Definition at line 49 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CFG_BDL__A   0x420035

Definition at line 46 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CFG_DIV__A   0x420034

Definition at line 45 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CFG_KEY__A   0x420033

Definition at line 44 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CFG_WUP__A   0x420036

Definition at line 47 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CMD__A   0x420032

Definition at line 38 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CMD_CONFIG   0x3

Definition at line 40 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CMD_EXECUTE   0x6

Definition at line 41 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_CMD_RESET   0x2

Definition at line 39 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_RES__A   0x420031

Definition at line 37 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_RST_KEY__A   0x420033

Definition at line 42 of file drxd_map_firm.h.

#define HI_RA_RAM_SRV_RST_KEY_ACT   0x3973

Definition at line 43 of file drxd_map_firm.h.

#define HI_RA_RAM_USR_BEGIN__A   0x420040

Definition at line 54 of file drxd_map_firm.h.

#define LC_COMM_EXEC__A   0x2800000

Definition at line 508 of file drxd_map_firm.h.

#define LC_RA_RAM_FILTER_CRMM_A__A   0x2820060

Definition at line 512 of file drxd_map_firm.h.

#define LC_RA_RAM_FILTER_CRMM_A__PRE   0x4

Definition at line 513 of file drxd_map_firm.h.

#define LC_RA_RAM_FILTER_CRMM_B__A   0x2820061

Definition at line 514 of file drxd_map_firm.h.

#define LC_RA_RAM_FILTER_CRMM_B__PRE   0x1

Definition at line 515 of file drxd_map_firm.h.

#define LC_RA_RAM_FILTER_SRMM_A__A   0x2820068

Definition at line 516 of file drxd_map_firm.h.

#define LC_RA_RAM_FILTER_SRMM_A__PRE   0x4

Definition at line 517 of file drxd_map_firm.h.

#define LC_RA_RAM_FILTER_SRMM_B__A   0x2820069

Definition at line 518 of file drxd_map_firm.h.

#define LC_RA_RAM_FILTER_SRMM_B__PRE   0x1

Definition at line 519 of file drxd_map_firm.h.

#define LC_RA_RAM_FILTER_SYM_SET__A   0x282001A

Definition at line 510 of file drxd_map_firm.h.

#define LC_RA_RAM_FILTER_SYM_SET__PRE   0x3E8

Definition at line 511 of file drxd_map_firm.h.

#define LC_RA_RAM_IFINCR_NOM_L__A   0x282000C

Definition at line 509 of file drxd_map_firm.h.

#define SC_COMM_EXEC__A   0x800000

Definition at line 57 of file drxd_map_firm.h.

#define SC_COMM_EXEC_CTL_STOP   0x0

Definition at line 58 of file drxd_map_firm.h.

#define SC_COMM_STATE__A   0x800001

Definition at line 59 of file drxd_map_firm.h.

#define SC_RA_RAM_BAND__A   0x8200EC

Definition at line 133 of file drxd_map_firm.h.

#define SC_RA_RAM_BE_OPT_DELAY__A   0x82004D

Definition at line 100 of file drxd_map_firm.h.

#define SC_RA_RAM_BE_OPT_ENA__A   0x82004C

Definition at line 98 of file drxd_map_firm.h.

#define SC_RA_RAM_BE_OPT_ENA_CP_OPT   0x1

Definition at line 99 of file drxd_map_firm.h.

#define SC_RA_RAM_CMD__A   0x820043

Definition at line 63 of file drxd_map_firm.h.

#define SC_RA_RAM_CMD_ADDR__A   0x820042

Definition at line 62 of file drxd_map_firm.h.

#define SC_RA_RAM_CMD_GET_OP_PARAM   0x5

Definition at line 66 of file drxd_map_firm.h.

#define SC_RA_RAM_CMD_PROC_START   0x1

Definition at line 64 of file drxd_map_firm.h.

#define SC_RA_RAM_CMD_SET_PREF_PARAM   0x3

Definition at line 65 of file drxd_map_firm.h.

#define SC_RA_RAM_CONFIG__A   0x820050

Definition at line 101 of file drxd_map_firm.h.

#define SC_RA_RAM_CONFIG_FR_ENABLE__M   0x4

Definition at line 102 of file drxd_map_firm.h.

#define SC_RA_RAM_CONFIG_FREQSCAN__M   0x10

Definition at line 103 of file drxd_map_firm.h.

#define SC_RA_RAM_CONFIG_SLAVE__M   0x20

Definition at line 104 of file drxd_map_firm.h.

#define SC_RA_RAM_DRIVER_VERSION__AX   0x8201FE

Definition at line 154 of file drxd_map_firm.h.

#define SC_RA_RAM_ECHO_SHIFT_LIM__A   0x8200DD

Definition at line 130 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_EXP__PRE   0x5

Definition at line 145 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A2_MAN__PRE   0x15E

Definition at line 144 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_EXP__PRE   0x6

Definition at line 147 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_16QAM_A4_MAN__PRE   0x11A

Definition at line 146 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_16QAM_EXP__PRE   0x5

Definition at line 143 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_16QAM_MAN__PRE   0x1EF

Definition at line 142 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_EXP__PRE   0x5

Definition at line 151 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A2_MAN__PRE   0x12F

Definition at line 150 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_EXP__PRE   0x5

Definition at line 153 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_64QAM_A4_MAN__PRE   0x197

Definition at line 152 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_64QAM_EXP__PRE   0x5

Definition at line 149 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_64QAM_MAN__PRE   0x1FB

Definition at line 148 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_QPSK_EXP__PRE   0x5

Definition at line 141 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_QPSK_MAN__PRE   0x1BB

Definition at line 140 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_EXP__PRE   0x4

Definition at line 139 of file drxd_map_firm.h.

#define SC_RA_RAM_EQ_IS_GAIN_UNKNOWN_MAN__PRE   0x1D6

Definition at line 138 of file drxd_map_firm.h.

#define SC_RA_RAM_IF_SAVE__AX   0x82008E

Definition at line 105 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_2K_FREQINC__A   0x8200D2

Definition at line 108 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_2K_FREQINC__PRE   0x4

Definition at line 109 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_2K_KAISINC__A   0x8200D3

Definition at line 110 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_2K_KAISINC__PRE   0x100

Definition at line 111 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_2K_LENGTH__A   0x8200D1

Definition at line 106 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_2K_LENGTH__PRE   0x9

Definition at line 107 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_8K_FREQINC__A   0x8200D5

Definition at line 114 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_8K_FREQINC__PRE   0x8

Definition at line 115 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_8K_KAISINC__A   0x8200D6

Definition at line 116 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_8K_KAISINC__PRE   0x200

Definition at line 117 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_8K_LENGTH__A   0x8200D4

Definition at line 112 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_COARSE_8K_LENGTH__PRE   0x8

Definition at line 113 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_2K_FREQINC__A   0x8200D8

Definition at line 120 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_2K_FREQINC__PRE   0x4

Definition at line 121 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_2K_KAISINC__A   0x8200D9

Definition at line 122 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_2K_KAISINC__PRE   0x100

Definition at line 123 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_2K_LENGTH__A   0x8200D7

Definition at line 118 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_2K_LENGTH__PRE   0x9

Definition at line 119 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_8K_FREQINC__A   0x8200DB

Definition at line 126 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_8K_FREQINC__PRE   0x1

Definition at line 127 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_8K_KAISINC__A   0x8200DC

Definition at line 128 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_8K_KAISINC__PRE   0x40

Definition at line 129 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_8K_LENGTH__A   0x8200DA

Definition at line 124 of file drxd_map_firm.h.

#define SC_RA_RAM_IR_FINE_8K_LENGTH__PRE   0xB

Definition at line 125 of file drxd_map_firm.h.

#define SC_RA_RAM_LC_ABS_2K__A   0x8200F4

Definition at line 134 of file drxd_map_firm.h.

#define SC_RA_RAM_LC_ABS_2K__PRE   0x1F

Definition at line 135 of file drxd_map_firm.h.

#define SC_RA_RAM_LC_ABS_8K__A   0x8200F5

Definition at line 136 of file drxd_map_firm.h.

#define SC_RA_RAM_LC_ABS_8K__PRE   0x1F

Definition at line 137 of file drxd_map_firm.h.

#define SC_RA_RAM_LOCK__A   0x82004B

Definition at line 94 of file drxd_map_firm.h.

#define SC_RA_RAM_LOCK_DEMOD__M   0x1

Definition at line 95 of file drxd_map_firm.h.

#define SC_RA_RAM_LOCK_FEC__M   0x2

Definition at line 96 of file drxd_map_firm.h.

#define SC_RA_RAM_LOCK_MPEG__M   0x4

Definition at line 97 of file drxd_map_firm.h.

#define SC_RA_RAM_LOCKTRACK_MIN   0x1

Definition at line 68 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_AUTO_CONST__M   0x4

Definition at line 91 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_AUTO_GUARD__M   0x2

Definition at line 90 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_AUTO_HIER__M   0x8

Definition at line 92 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_AUTO_MODE__M   0x1

Definition at line 89 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_AUTO_RATE__M   0x10

Definition at line 93 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_CONST_QAM16   0x10

Definition at line 76 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_CONST_QAM64   0x20

Definition at line 77 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_CONST_QPSK   0x0

Definition at line 75 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_GUARD_16   0x4

Definition at line 72 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_GUARD_32   0x0

Definition at line 71 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_GUARD_4   0xC

Definition at line 74 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_GUARD_8   0x8

Definition at line 73 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_HIER_A1   0x40

Definition at line 79 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_HIER_A2   0x80

Definition at line 80 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_HIER_A4   0xC0

Definition at line 81 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_HIER_NO   0x0

Definition at line 78 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_MODE_2K   0x0

Definition at line 69 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_MODE_8K   0x1

Definition at line 70 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_PRIO_HI   0x0

Definition at line 87 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_PRIO_LO   0x1000

Definition at line 88 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_RATE_1_2   0x0

Definition at line 82 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_RATE_2_3   0x200

Definition at line 83 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_RATE_3_4   0x400

Definition at line 84 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_RATE_5_6   0x600

Definition at line 85 of file drxd_map_firm.h.

#define SC_RA_RAM_OP_PARAM_RATE_7_8   0x800

Definition at line 86 of file drxd_map_firm.h.

#define SC_RA_RAM_PARAM0__A   0x820040

Definition at line 60 of file drxd_map_firm.h.

#define SC_RA_RAM_PARAM1__A   0x820041

Definition at line 61 of file drxd_map_firm.h.

#define SC_RA_RAM_PROC_LOCKTRACK   0x0

Definition at line 155 of file drxd_map_firm.h.

#define SC_RA_RAM_SAMPLE_RATE_COUNT__A   0x8200E8

Definition at line 131 of file drxd_map_firm.h.

#define SC_RA_RAM_SAMPLE_RATE_STEP__A   0x8200E9

Definition at line 132 of file drxd_map_firm.h.

#define SC_RA_RAM_SW_EVENT_RUN_NMASK__M   0x1

Definition at line 67 of file drxd_map_firm.h.

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