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25 #ifndef __DWMAC_DMA_H__
26 #define __DWMAC_DMA_H__
29 #define DMA_BUS_MODE 0x00001000
30 #define DMA_XMT_POLL_DEMAND 0x00001004
31 #define DMA_RCV_POLL_DEMAND 0x00001008
32 #define DMA_RCV_BASE_ADDR 0x0000100c
33 #define DMA_TX_BASE_ADDR 0x00001010
34 #define DMA_STATUS 0x00001014
35 #define DMA_CONTROL 0x00001018
36 #define DMA_INTR_ENA 0x0000101c
37 #define DMA_MISSED_FRAME_CTR 0x00001020
38 #define DMA_AXI_BUS_MODE 0x00001028
39 #define DMA_CUR_TX_BUF_ADDR 0x00001050
40 #define DMA_CUR_RX_BUF_ADDR 0x00001054
41 #define DMA_HW_FEATURE 0x00001058
44 #define DMA_CONTROL_ST 0x00002000
45 #define DMA_CONTROL_SR 0x00000002
48 #define DMA_INTR_ENA_NIE 0x00010000
49 #define DMA_INTR_ENA_TIE 0x00000001
50 #define DMA_INTR_ENA_TUE 0x00000004
51 #define DMA_INTR_ENA_RIE 0x00000040
52 #define DMA_INTR_ENA_ERE 0x00004000
54 #define DMA_INTR_NORMAL (DMA_INTR_ENA_NIE | DMA_INTR_ENA_RIE | \
58 #define DMA_INTR_ENA_AIE 0x00008000
59 #define DMA_INTR_ENA_FBE 0x00002000
60 #define DMA_INTR_ENA_ETE 0x00000400
61 #define DMA_INTR_ENA_RWE 0x00000200
62 #define DMA_INTR_ENA_RSE 0x00000100
63 #define DMA_INTR_ENA_RUE 0x00000080
64 #define DMA_INTR_ENA_UNE 0x00000020
65 #define DMA_INTR_ENA_OVE 0x00000010
66 #define DMA_INTR_ENA_TJE 0x00000008
67 #define DMA_INTR_ENA_TSE 0x00000002
69 #define DMA_INTR_ABNORMAL (DMA_INTR_ENA_AIE | DMA_INTR_ENA_FBE | \
73 #define DMA_INTR_DEFAULT_MASK (DMA_INTR_NORMAL | DMA_INTR_ABNORMAL)
76 #define DMA_STATUS_GLPII 0x40000000
77 #define DMA_STATUS_GPI 0x10000000
78 #define DMA_STATUS_GMI 0x08000000
79 #define DMA_STATUS_GLI 0x04000000
80 #define DMA_STATUS_GMI 0x08000000
81 #define DMA_STATUS_GLI 0x04000000
82 #define DMA_STATUS_EB_MASK 0x00380000
83 #define DMA_STATUS_EB_TX_ABORT 0x00080000
84 #define DMA_STATUS_EB_RX_ABORT 0x00100000
85 #define DMA_STATUS_TS_MASK 0x00700000
86 #define DMA_STATUS_TS_SHIFT 20
87 #define DMA_STATUS_RS_MASK 0x000e0000
88 #define DMA_STATUS_RS_SHIFT 17
89 #define DMA_STATUS_NIS 0x00010000
90 #define DMA_STATUS_AIS 0x00008000
91 #define DMA_STATUS_ERI 0x00004000
92 #define DMA_STATUS_FBI 0x00002000
93 #define DMA_STATUS_ETI 0x00000400
94 #define DMA_STATUS_RWT 0x00000200
95 #define DMA_STATUS_RPS 0x00000100
96 #define DMA_STATUS_RU 0x00000080
97 #define DMA_STATUS_RI 0x00000040
98 #define DMA_STATUS_UNF 0x00000020
99 #define DMA_STATUS_OVF 0x00000010
100 #define DMA_STATUS_TJT 0x00000008
101 #define DMA_STATUS_TU 0x00000004
102 #define DMA_STATUS_TPS 0x00000002
103 #define DMA_STATUS_TI 0x00000001
104 #define DMA_CONTROL_FTF 0x00100000