ehci-fsl.h File Reference

Go to the source code of this file.

Macros
#define	FSL_SOC_USB_SBUSCFG   0x90
#define	SBUSCFG_INCR8   0x02 /* INCR8, specified */
#define	FSL_SOC_USB_ULPIVP   0x170
#define	FSL_SOC_USB_PORTSC1   0x184
#define	PORT_PTS_MSK   (3<<30)
#define	PORT_PTS_UTMI   (0<<30)
#define	PORT_PTS_ULPI   (2<<30)
#define	PORT_PTS_SERIAL   (3<<30)
#define	PORT_PTS_PTW   (1<<28)
#define	FSL_SOC_USB_PORTSC2   0x188
#define	FSL_SOC_USB_USBMODE   0x1a8
#define	USBMODE_CM_MASK   (3 << 0) /* controller mode mask */
#define	USBMODE_CM_HOST   (3 << 0) /* controller mode: host */
#define	USBMODE_ES   (1 << 2) /* (Big) Endian Select */
#define	FSL_SOC_USB_USBGENCTRL   0x200
#define	USBGENCTRL_PPP   (1 << 3)
#define	USBGENCTRL_PFP   (1 << 2)
#define	FSL_SOC_USB_ISIPHYCTRL   0x204
#define	ISIPHYCTRL_PXE   (1)
#define	ISIPHYCTRL_PHYE   (1 << 4)
#define	FSL_SOC_USB_SNOOP1   0x400 /* NOTE: big-endian */
#define	FSL_SOC_USB_SNOOP2   0x404 /* NOTE: big-endian */
#define	FSL_SOC_USB_AGECNTTHRSH   0x408 /* NOTE: big-endian */
#define	FSL_SOC_USB_PRICTRL   0x40c /* NOTE: big-endian */
#define	FSL_SOC_USB_SICTRL   0x410 /* NOTE: big-endian */
#define	FSL_SOC_USB_CTRL   0x500 /* NOTE: big-endian */
#define	CTRL_UTMI_PHY_EN   (1<<9)
#define	CTRL_PHY_CLK_VALID   (1 << 17)
#define	SNOOP_SIZE_2GB   0x1e
#define	ULPI_INT_EN   (1<<0)
#define	WU_INT_EN   (1<<1)
#define	USB_CTRL_USB_EN   (1<<2)
#define	LINE_STATE_FILTER__EN   (1<<3)
#define	KEEP_OTG_ON   (1<<4)
#define	OTG_PORT   (1<<5)
#define	PLL_RESET   (1<<8)
#define	UTMI_PHY_EN   (1<<9)
#define	ULPI_PHY_CLK_SEL   (1<<10)
#define	PHY_CLK_VALID   (1<<17)

Macro Definition Documentation

#define CTRL_PHY_CLK_VALID   (1 << 17)

Definition at line 51 of file ehci-fsl.h.

#define CTRL_UTMI_PHY_EN   (1<<9)

Definition at line 50 of file ehci-fsl.h.

#define FSL_SOC_USB_AGECNTTHRSH   0x408 /* NOTE: big-endian */

Definition at line 46 of file ehci-fsl.h.

#define FSL_SOC_USB_CTRL   0x500 /* NOTE: big-endian */

Definition at line 49 of file ehci-fsl.h.

#define FSL_SOC_USB_ISIPHYCTRL   0x204

Definition at line 40 of file ehci-fsl.h.

#define FSL_SOC_USB_PORTSC1   0x184

Definition at line 25 of file ehci-fsl.h.

#define FSL_SOC_USB_PORTSC2   0x188

Definition at line 31 of file ehci-fsl.h.

#define FSL_SOC_USB_PRICTRL   0x40c /* NOTE: big-endian */

Definition at line 47 of file ehci-fsl.h.

#define FSL_SOC_USB_SBUSCFG   0x90

Definition at line 22 of file ehci-fsl.h.

#define FSL_SOC_USB_SICTRL   0x410 /* NOTE: big-endian */

Definition at line 48 of file ehci-fsl.h.

#define FSL_SOC_USB_SNOOP1   0x400 /* NOTE: big-endian */

Definition at line 44 of file ehci-fsl.h.

#define FSL_SOC_USB_SNOOP2   0x404 /* NOTE: big-endian */

Definition at line 45 of file ehci-fsl.h.

#define FSL_SOC_USB_ULPIVP   0x170

Definition at line 24 of file ehci-fsl.h.

#define FSL_SOC_USB_USBGENCTRL   0x200

Definition at line 37 of file ehci-fsl.h.

#define FSL_SOC_USB_USBMODE   0x1a8

Definition at line 32 of file ehci-fsl.h.

#define ISIPHYCTRL_PHYE   (1 << 4)

Definition at line 42 of file ehci-fsl.h.

#define ISIPHYCTRL_PXE   (1)

Definition at line 41 of file ehci-fsl.h.

#define KEEP_OTG_ON   (1<<4)

Definition at line 59 of file ehci-fsl.h.

#define LINE_STATE_FILTER__EN   (1<<3)

Definition at line 58 of file ehci-fsl.h.

#define OTG_PORT   (1<<5)

Definition at line 60 of file ehci-fsl.h.

#define PHY_CLK_VALID   (1<<17)

Definition at line 64 of file ehci-fsl.h.

#define PLL_RESET   (1<<8)

Definition at line 61 of file ehci-fsl.h.

#define PORT_PTS_MSK   (3<<30)

Definition at line 26 of file ehci-fsl.h.

#define PORT_PTS_PTW   (1<<28)

Definition at line 30 of file ehci-fsl.h.

#define PORT_PTS_SERIAL   (3<<30)

Definition at line 29 of file ehci-fsl.h.

#define PORT_PTS_ULPI   (2<<30)

Definition at line 28 of file ehci-fsl.h.

#define PORT_PTS_UTMI   (0<<30)

Definition at line 27 of file ehci-fsl.h.

#define SBUSCFG_INCR8   0x02 /* INCR8, specified */

Definition at line 23 of file ehci-fsl.h.

#define SNOOP_SIZE_2GB   0x1e

Definition at line 52 of file ehci-fsl.h.

#define ULPI_INT_EN   (1<<0)

Definition at line 55 of file ehci-fsl.h.

#define ULPI_PHY_CLK_SEL   (1<<10)

Definition at line 63 of file ehci-fsl.h.

#define USB_CTRL_USB_EN   (1<<2)

Definition at line 57 of file ehci-fsl.h.

#define USBGENCTRL_PFP   (1 << 2)

Definition at line 39 of file ehci-fsl.h.

#define USBGENCTRL_PPP   (1 << 3)

Definition at line 38 of file ehci-fsl.h.

#define USBMODE_CM_HOST   (3 << 0) /* controller mode: host */

Definition at line 34 of file ehci-fsl.h.

#define USBMODE_CM_MASK   (3 << 0) /* controller mode mask */

Definition at line 33 of file ehci-fsl.h.

#define USBMODE_ES   (1 << 2) /* (Big) Endian Select */

Definition at line 35 of file ehci-fsl.h.

#define UTMI_PHY_EN   (1<<9)

Definition at line 62 of file ehci-fsl.h.

#define WU_INT_EN   (1<<1)

Definition at line 56 of file ehci-fsl.h.