Linux Kernel
3.7.1
|
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <sound/core.h>
#include <sound/initval.h>
#include <sound/pcm.h>
#include <sound/ac97_codec.h>
#include <sound/info.h>
#include <sound/rawmidi.h>
Go to the source code of this file.
Data Structures | |
struct | emu10k1x_voice |
struct | emu10k1x_pcm |
struct | emu10k1x_midi |
struct | emu10k1x |
Macros | |
#define | PTR 0x00 /* Indexed register set pointer register */ |
#define | DATA 0x04 /* Indexed register set data register */ |
#define | IPR 0x08 /* Global interrupt pending register */ |
#define | IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */ |
#define | IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */ |
#define | IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */ |
#define | IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */ |
#define | IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */ |
#define | IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */ |
#define | INTE 0x0c /* Interrupt enable register */ |
#define | INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */ |
#define | INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */ |
#define | INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */ |
#define | INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */ |
#define | INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */ |
#define | INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */ |
#define | HCFG 0x14 /* Hardware config register */ |
#define | HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */ |
#define | HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */ |
#define | GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */ |
#define | AC97DATA 0x1c /* AC97 register set data register (16 bit) */ |
#define | AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */ |
#define | PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */ |
#define | PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */ |
#define | PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */ |
#define | PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */ |
#define | PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */ |
#define | PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */ |
#define | PLAYBACK_UNKNOWN1 0x07 |
#define | PLAYBACK_UNKNOWN2 0x08 |
#define | CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */ |
#define | CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */ |
#define | CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */ |
#define | CAPTURE_UNKNOWN 0x13 |
#define | TRIGGER_CHANNEL 0x40 /* Trigger channel playback */ |
#define | TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */ |
#define | TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */ |
#define | TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */ |
#define | TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */ |
#define | ROUTING 0x41 /* Setup sound routing ? */ |
#define | ROUTING_FRONT_LEFT 0x00000001 |
#define | ROUTING_FRONT_RIGHT 0x00000002 |
#define | ROUTING_REAR_LEFT 0x00000004 |
#define | ROUTING_REAR_RIGHT 0x00000008 |
#define | ROUTING_CENTER_LFE 0x00010000 |
#define | SPCS0 0x42 /* SPDIF output Channel Status 0 register */ |
#define | SPCS1 0x43 /* SPDIF output Channel Status 1 register */ |
#define | SPCS2 0x44 /* SPDIF output Channel Status 2 register */ |
#define | SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */ |
#define | SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */ |
#define | SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */ |
#define | SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */ |
#define | SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */ |
#define | SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */ |
#define | SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */ |
#define | SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */ |
#define | SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */ |
#define | SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */ |
#define | SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */ |
#define | SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */ |
#define | SPCS_SOURCENUMMASK 0x000f0000 /* Source number */ |
#define | SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */ |
#define | SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */ |
#define | SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */ |
#define | SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */ |
#define | SPCS_EMPHASISMASK 0x00000038 /* Emphasis */ |
#define | SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */ |
#define | SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */ |
#define | SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */ |
#define | SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */ |
#define | SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */ |
#define | SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */ |
#define | MUDATA 0x47 |
#define | MUCMD 0x48 |
#define | MUSTAT MUCMD |
#define | snd_emu10k1x_shared_spdif_info snd_ctl_boolean_mono_info |
#define | EMU10K1X_MIDI_MODE_INPUT (1<<0) |
#define | EMU10K1X_MIDI_MODE_OUTPUT (1<<1) |
#define | mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0) |
#define | mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1) |
#define | mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0) |
#define | mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1) |
#define | mpu401_input_avail(emu, mpu) (!(mpu401_read_stat(emu,mpu) & 0x80)) |
#define | mpu401_output_ready(emu, mpu) (!(mpu401_read_stat(emu,mpu) & 0x40)) |
#define | MPU401_RESET 0xff |
#define | MPU401_ENTER_UART 0x3f |
#define | MPU401_ACK 0xfe |
Functions | |
MODULE_AUTHOR ("Francisco Moraes <[email protected]>") | |
MODULE_DESCRIPTION ("EMU10K1X") | |
MODULE_LICENSE ("GPL") | |
MODULE_SUPPORTED_DEVICE ("{{Dell Creative Labs,SB Live!}") | |
module_param_array (index, int, NULL, 0444) | |
MODULE_PARM_DESC (index,"Index value for the EMU10K1X soundcard.") | |
module_param_array (id, charp, NULL, 0444) | |
MODULE_PARM_DESC (id,"ID string for the EMU10K1X soundcard.") | |
module_param_array (enable, bool, NULL, 0444) | |
MODULE_PARM_DESC (enable,"Enable the EMU10K1X soundcard.") | |
MODULE_DEVICE_TABLE (pci, snd_emu10k1x_ids) | |
module_pci_driver (emu10k1x_driver) | |
#define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */ |
Definition at line 104 of file emu10k1x.c.
#define AC97DATA 0x1c /* AC97 register set data register (16 bit) */ |
Definition at line 102 of file emu10k1x.c.
#define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */ |
Definition at line 125 of file emu10k1x.c.
#define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */ |
Definition at line 124 of file emu10k1x.c.
#define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */ |
Definition at line 126 of file emu10k1x.c.
#define CAPTURE_UNKNOWN 0x13 |
Definition at line 127 of file emu10k1x.c.
#define DATA 0x04 /* Indexed register set data register */ |
Definition at line 72 of file emu10k1x.c.
#define EMU10K1X_MIDI_MODE_INPUT (1<<0) |
Definition at line 1219 of file emu10k1x.c.
#define EMU10K1X_MIDI_MODE_OUTPUT (1<<1) |
Definition at line 1220 of file emu10k1x.c.
#define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */ |
Definition at line 99 of file emu10k1x.c.
#define HCFG 0x14 /* Hardware config register */ |
Definition at line 92 of file emu10k1x.c.
#define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */ |
Definition at line 96 of file emu10k1x.c.
#define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */ |
Definition at line 94 of file emu10k1x.c.
#define INTE 0x0c /* Interrupt enable register */ |
Definition at line 84 of file emu10k1x.c.
#define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */ |
Definition at line 90 of file emu10k1x.c.
#define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */ |
Definition at line 89 of file emu10k1x.c.
#define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */ |
Definition at line 88 of file emu10k1x.c.
#define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */ |
Definition at line 87 of file emu10k1x.c.
#define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */ |
Definition at line 86 of file emu10k1x.c.
#define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */ |
Definition at line 85 of file emu10k1x.c.
#define IPR 0x08 /* Global interrupt pending register */ |
Definition at line 74 of file emu10k1x.c.
#define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */ |
Definition at line 82 of file emu10k1x.c.
#define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */ |
Definition at line 81 of file emu10k1x.c.
#define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */ |
Definition at line 80 of file emu10k1x.c.
#define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */ |
Definition at line 79 of file emu10k1x.c.
#define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */ |
Definition at line 78 of file emu10k1x.c.
#define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */ |
Definition at line 77 of file emu10k1x.c.
#define MPU401_ACK 0xfe |
Definition at line 1242 of file emu10k1x.c.
#define MPU401_ENTER_UART 0x3f |
Definition at line 1241 of file emu10k1x.c.
#define mpu401_input_avail | ( | emu, | |
mpu | |||
) | (!(mpu401_read_stat(emu,mpu) & 0x80)) |
Definition at line 1237 of file emu10k1x.c.
#define mpu401_output_ready | ( | emu, | |
mpu | |||
) | (!(mpu401_read_stat(emu,mpu) & 0x40)) |
Definition at line 1238 of file emu10k1x.c.
Definition at line 1234 of file emu10k1x.c.
Definition at line 1235 of file emu10k1x.c.
#define MPU401_RESET 0xff |
Definition at line 1240 of file emu10k1x.c.
Definition at line 1233 of file emu10k1x.c.
Definition at line 1232 of file emu10k1x.c.
#define MUCMD 0x48 |
Definition at line 178 of file emu10k1x.c.
#define MUDATA 0x47 |
Definition at line 177 of file emu10k1x.c.
#define MUSTAT MUCMD |
Definition at line 179 of file emu10k1x.c.
#define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */ |
Definition at line 117 of file emu10k1x.c.
#define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */ |
Definition at line 109 of file emu10k1x.c.
#define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */ |
Definition at line 116 of file emu10k1x.c.
#define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */ |
Definition at line 115 of file emu10k1x.c.
#define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */ |
Definition at line 118 of file emu10k1x.c.
#define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */ |
Definition at line 119 of file emu10k1x.c.
#define PLAYBACK_UNKNOWN1 0x07 |
Definition at line 120 of file emu10k1x.c.
#define PLAYBACK_UNKNOWN2 0x08 |
Definition at line 121 of file emu10k1x.c.
#define PTR 0x00 /* Indexed register set pointer register */ |
Definition at line 68 of file emu10k1x.c.
#define ROUTING 0x41 /* Setup sound routing ? */ |
Definition at line 137 of file emu10k1x.c.
#define ROUTING_CENTER_LFE 0x00010000 |
Definition at line 142 of file emu10k1x.c.
#define ROUTING_FRONT_LEFT 0x00000001 |
Definition at line 138 of file emu10k1x.c.
#define ROUTING_FRONT_RIGHT 0x00000002 |
Definition at line 139 of file emu10k1x.c.
#define ROUTING_REAR_LEFT 0x00000004 |
Definition at line 140 of file emu10k1x.c.
#define ROUTING_REAR_RIGHT 0x00000008 |
Definition at line 141 of file emu10k1x.c.
#define snd_emu10k1x_shared_spdif_info snd_ctl_boolean_mono_info |
Definition at line 1083 of file emu10k1x.c.
#define SPCS0 0x42 /* SPDIF output Channel Status 0 register */ |
Definition at line 144 of file emu10k1x.c.
#define SPCS1 0x43 /* SPDIF output Channel Status 1 register */ |
Definition at line 146 of file emu10k1x.c.
#define SPCS2 0x44 /* SPDIF output Channel Status 2 register */ |
Definition at line 148 of file emu10k1x.c.
#define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */ |
Definition at line 165 of file emu10k1x.c.
#define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */ |
Definition at line 160 of file emu10k1x.c.
#define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */ |
Definition at line 161 of file emu10k1x.c.
#define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */ |
Definition at line 159 of file emu10k1x.c.
#define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */ |
Definition at line 158 of file emu10k1x.c.
#define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */ |
Definition at line 151 of file emu10k1x.c.
#define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */ |
Definition at line 152 of file emu10k1x.c.
#define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */ |
Definition at line 153 of file emu10k1x.c.
#define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */ |
Definition at line 150 of file emu10k1x.c.
#define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */ |
Definition at line 170 of file emu10k1x.c.
#define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */ |
Definition at line 169 of file emu10k1x.c.
#define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */ |
Definition at line 168 of file emu10k1x.c.
#define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */ |
Definition at line 167 of file emu10k1x.c.
#define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */ |
Definition at line 164 of file emu10k1x.c.
#define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */ |
Definition at line 166 of file emu10k1x.c.
#define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */ |
Definition at line 171 of file emu10k1x.c.
#define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */ |
Definition at line 172 of file emu10k1x.c.
#define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */ |
Definition at line 157 of file emu10k1x.c.
#define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */ |
Definition at line 155 of file emu10k1x.c.
#define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */ |
Definition at line 156 of file emu10k1x.c.
#define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */ |
Definition at line 154 of file emu10k1x.c.
#define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */ |
Definition at line 163 of file emu10k1x.c.
#define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */ |
Definition at line 162 of file emu10k1x.c.
#define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */ |
Definition at line 174 of file emu10k1x.c.
#define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */ |
Definition at line 135 of file emu10k1x.c.
#define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */ |
Definition at line 131 of file emu10k1x.c.
#define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */ |
Definition at line 132 of file emu10k1x.c.
#define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */ |
Definition at line 133 of file emu10k1x.c.
#define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */ |
Definition at line 134 of file emu10k1x.c.
MODULE_AUTHOR | ( | "Francisco Moraes <[email protected]>" | ) |
MODULE_DESCRIPTION | ( | "EMU10K1X" | ) |
MODULE_DEVICE_TABLE | ( | pci | , |
snd_emu10k1x_ids | |||
) |
MODULE_LICENSE | ( | "GPL" | ) |
module_pci_driver | ( | emu10k1x_driver | ) |
MODULE_SUPPORTED_DEVICE | ( | ) |