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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Macros | |
| #define | ADDR_MASK 0x1F |
| #define | BANK_MASK 0x60 |
| #define | SPRD_MASK 0x80 |
| #define | EIE 0x1B |
| #define | EIR 0x1C |
| #define | ESTAT 0x1D |
| #define | ECON2 0x1E |
| #define | ECON1 0x1F |
| #define | ERDPTL (0x00|0x00) |
| #define | ERDPTH (0x01|0x00) |
| #define | EWRPTL (0x02|0x00) |
| #define | EWRPTH (0x03|0x00) |
| #define | ETXSTL (0x04|0x00) |
| #define | ETXSTH (0x05|0x00) |
| #define | ETXNDL (0x06|0x00) |
| #define | ETXNDH (0x07|0x00) |
| #define | ERXSTL (0x08|0x00) |
| #define | ERXSTH (0x09|0x00) |
| #define | ERXNDL (0x0A|0x00) |
| #define | ERXNDH (0x0B|0x00) |
| #define | ERXRDPTL (0x0C|0x00) |
| #define | ERXRDPTH (0x0D|0x00) |
| #define | ERXWRPTL (0x0E|0x00) |
| #define | ERXWRPTH (0x0F|0x00) |
| #define | EDMASTL (0x10|0x00) |
| #define | EDMASTH (0x11|0x00) |
| #define | EDMANDL (0x12|0x00) |
| #define | EDMANDH (0x13|0x00) |
| #define | EDMADSTL (0x14|0x00) |
| #define | EDMADSTH (0x15|0x00) |
| #define | EDMACSL (0x16|0x00) |
| #define | EDMACSH (0x17|0x00) |
| #define | EHT0 (0x00|0x20) |
| #define | EHT1 (0x01|0x20) |
| #define | EHT2 (0x02|0x20) |
| #define | EHT3 (0x03|0x20) |
| #define | EHT4 (0x04|0x20) |
| #define | EHT5 (0x05|0x20) |
| #define | EHT6 (0x06|0x20) |
| #define | EHT7 (0x07|0x20) |
| #define | EPMM0 (0x08|0x20) |
| #define | EPMM1 (0x09|0x20) |
| #define | EPMM2 (0x0A|0x20) |
| #define | EPMM3 (0x0B|0x20) |
| #define | EPMM4 (0x0C|0x20) |
| #define | EPMM5 (0x0D|0x20) |
| #define | EPMM6 (0x0E|0x20) |
| #define | EPMM7 (0x0F|0x20) |
| #define | EPMCSL (0x10|0x20) |
| #define | EPMCSH (0x11|0x20) |
| #define | EPMOL (0x14|0x20) |
| #define | EPMOH (0x15|0x20) |
| #define | EWOLIE (0x16|0x20) |
| #define | EWOLIR (0x17|0x20) |
| #define | ERXFCON (0x18|0x20) |
| #define | EPKTCNT (0x19|0x20) |
| #define | MACON1 (0x00|0x40|SPRD_MASK) |
| #define | MACON3 (0x02|0x40|SPRD_MASK) |
| #define | MACON4 (0x03|0x40|SPRD_MASK) |
| #define | MABBIPG (0x04|0x40|SPRD_MASK) |
| #define | MAIPGL (0x06|0x40|SPRD_MASK) |
| #define | MAIPGH (0x07|0x40|SPRD_MASK) |
| #define | MACLCON1 (0x08|0x40|SPRD_MASK) |
| #define | MACLCON2 (0x09|0x40|SPRD_MASK) |
| #define | MAMXFLL (0x0A|0x40|SPRD_MASK) |
| #define | MAMXFLH (0x0B|0x40|SPRD_MASK) |
| #define | MAPHSUP (0x0D|0x40|SPRD_MASK) |
| #define | MICON (0x11|0x40|SPRD_MASK) |
| #define | MICMD (0x12|0x40|SPRD_MASK) |
| #define | MIREGADR (0x14|0x40|SPRD_MASK) |
| #define | MIWRL (0x16|0x40|SPRD_MASK) |
| #define | MIWRH (0x17|0x40|SPRD_MASK) |
| #define | MIRDL (0x18|0x40|SPRD_MASK) |
| #define | MIRDH (0x19|0x40|SPRD_MASK) |
| #define | MAADR1 (0x00|0x60|SPRD_MASK) |
| #define | MAADR0 (0x01|0x60|SPRD_MASK) |
| #define | MAADR3 (0x02|0x60|SPRD_MASK) |
| #define | MAADR2 (0x03|0x60|SPRD_MASK) |
| #define | MAADR5 (0x04|0x60|SPRD_MASK) |
| #define | MAADR4 (0x05|0x60|SPRD_MASK) |
| #define | EBSTSD (0x06|0x60) |
| #define | EBSTCON (0x07|0x60) |
| #define | EBSTCSL (0x08|0x60) |
| #define | EBSTCSH (0x09|0x60) |
| #define | MISTAT (0x0A|0x60|SPRD_MASK) |
| #define | EREVID (0x12|0x60) |
| #define | ECOCON (0x15|0x60) |
| #define | EFLOCON (0x17|0x60) |
| #define | EPAUSL (0x18|0x60) |
| #define | EPAUSH (0x19|0x60) |
| #define | PHCON1 0x00 |
| #define | PHSTAT1 0x01 |
| #define | PHHID1 0x02 |
| #define | PHHID2 0x03 |
| #define | PHCON2 0x10 |
| #define | PHSTAT2 0x11 |
| #define | PHIE 0x12 |
| #define | PHIR 0x13 |
| #define | PHLCON 0x14 |
| #define | EIE_INTIE 0x80 |
| #define | EIE_PKTIE 0x40 |
| #define | EIE_DMAIE 0x20 |
| #define | EIE_LINKIE 0x10 |
| #define | EIE_TXIE 0x08 |
| #define | EIE_TXERIE 0x02 |
| #define | EIE_RXERIE 0x01 |
| #define | EIR_PKTIF 0x40 |
| #define | EIR_DMAIF 0x20 |
| #define | EIR_LINKIF 0x10 |
| #define | EIR_TXIF 0x08 |
| #define | EIR_TXERIF 0x02 |
| #define | EIR_RXERIF 0x01 |
| #define | ESTAT_INT 0x80 |
| #define | ESTAT_LATECOL 0x10 |
| #define | ESTAT_RXBUSY 0x04 |
| #define | ESTAT_TXABRT 0x02 |
| #define | ESTAT_CLKRDY 0x01 |
| #define | ECON2_AUTOINC 0x80 |
| #define | ECON2_PKTDEC 0x40 |
| #define | ECON2_PWRSV 0x20 |
| #define | ECON2_VRPS 0x08 |
| #define | ECON1_TXRST 0x80 |
| #define | ECON1_RXRST 0x40 |
| #define | ECON1_DMAST 0x20 |
| #define | ECON1_CSUMEN 0x10 |
| #define | ECON1_TXRTS 0x08 |
| #define | ECON1_RXEN 0x04 |
| #define | ECON1_BSEL1 0x02 |
| #define | ECON1_BSEL0 0x01 |
| #define | MACON1_LOOPBK 0x10 |
| #define | MACON1_TXPAUS 0x08 |
| #define | MACON1_RXPAUS 0x04 |
| #define | MACON1_PASSALL 0x02 |
| #define | MACON1_MARXEN 0x01 |
| #define | MACON2_MARST 0x80 |
| #define | MACON2_RNDRST 0x40 |
| #define | MACON2_MARXRST 0x08 |
| #define | MACON2_RFUNRST 0x04 |
| #define | MACON2_MATXRST 0x02 |
| #define | MACON2_TFUNRST 0x01 |
| #define | MACON3_PADCFG2 0x80 |
| #define | MACON3_PADCFG1 0x40 |
| #define | MACON3_PADCFG0 0x20 |
| #define | MACON3_TXCRCEN 0x10 |
| #define | MACON3_PHDRLEN 0x08 |
| #define | MACON3_HFRMLEN 0x04 |
| #define | MACON3_FRMLNEN 0x02 |
| #define | MACON3_FULDPX 0x01 |
| #define | MICMD_MIISCAN 0x02 |
| #define | MICMD_MIIRD 0x01 |
| #define | MISTAT_NVALID 0x04 |
| #define | MISTAT_SCAN 0x02 |
| #define | MISTAT_BUSY 0x01 |
| #define | ERXFCON_UCEN 0x80 |
| #define | ERXFCON_ANDOR 0x40 |
| #define | ERXFCON_CRCEN 0x20 |
| #define | ERXFCON_PMEN 0x10 |
| #define | ERXFCON_MPEN 0x08 |
| #define | ERXFCON_HTEN 0x04 |
| #define | ERXFCON_MCEN 0x02 |
| #define | ERXFCON_BCEN 0x01 |
| #define | PHCON1_PRST 0x8000 |
| #define | PHCON1_PLOOPBK 0x4000 |
| #define | PHCON1_PPWRSV 0x0800 |
| #define | PHCON1_PDPXMD 0x0100 |
| #define | PHSTAT1_PFDPX 0x1000 |
| #define | PHSTAT1_PHDPX 0x0800 |
| #define | PHSTAT1_LLSTAT 0x0004 |
| #define | PHSTAT1_JBSTAT 0x0002 |
| #define | PHSTAT2_TXSTAT (1 << 13) |
| #define | PHSTAT2_RXSTAT (1 << 12) |
| #define | PHSTAT2_COLSTAT (1 << 11) |
| #define | PHSTAT2_LSTAT (1 << 10) |
| #define | PHSTAT2_DPXSTAT (1 << 9) |
| #define | PHSTAT2_PLRITY (1 << 5) |
| #define | PHCON2_FRCLINK 0x4000 |
| #define | PHCON2_TXDIS 0x2000 |
| #define | PHCON2_JABBER 0x0400 |
| #define | PHCON2_HDLDIS 0x0100 |
| #define | PHIE_PLNKIE (1 << 4) |
| #define | PHIE_PGEIE (1 << 1) |
| #define | PHIR_PLNKIF (1 << 4) |
| #define | PHIR_PGEIF (1 << 1) |
| #define | PKTCTRL_PHUGEEN 0x08 |
| #define | PKTCTRL_PPADEN 0x04 |
| #define | PKTCTRL_PCRCEN 0x02 |
| #define | PKTCTRL_POVERRIDE 0x01 |
| #define | TSV_TXBYTECNT 0 |
| #define | TSV_TXCOLLISIONCNT 16 |
| #define | TSV_TXCRCERROR 20 |
| #define | TSV_TXLENCHKERROR 21 |
| #define | TSV_TXLENOUTOFRANGE 22 |
| #define | TSV_TXDONE 23 |
| #define | TSV_TXMULTICAST 24 |
| #define | TSV_TXBROADCAST 25 |
| #define | TSV_TXPACKETDEFER 26 |
| #define | TSV_TXEXDEFER 27 |
| #define | TSV_TXEXCOLLISION 28 |
| #define | TSV_TXLATECOLLISION 29 |
| #define | TSV_TXGIANT 30 |
| #define | TSV_TXUNDERRUN 31 |
| #define | TSV_TOTBYTETXONWIRE 32 |
| #define | TSV_TXCONTROLFRAME 48 |
| #define | TSV_TXPAUSEFRAME 49 |
| #define | TSV_BACKPRESSUREAPP 50 |
| #define | TSV_TXVLANTAGFRAME 51 |
| #define | TSV_SIZE 7 |
| #define | TSV_BYTEOF(x) ((x) / 8) |
| #define | TSV_BITMASK(x) (1 << ((x) % 8)) |
| #define | TSV_GETBIT(x, y) (((x)[TSV_BYTEOF(y)] & TSV_BITMASK(y)) ? 1 : 0) |
| #define | RSV_RXLONGEVDROPEV 16 |
| #define | RSV_CARRIEREV 18 |
| #define | RSV_CRCERROR 20 |
| #define | RSV_LENCHECKERR 21 |
| #define | RSV_LENOUTOFRANGE 22 |
| #define | RSV_RXOK 23 |
| #define | RSV_RXMULTICAST 24 |
| #define | RSV_RXBROADCAST 25 |
| #define | RSV_DRIBBLENIBBLE 26 |
| #define | RSV_RXCONTROLFRAME 27 |
| #define | RSV_RXPAUSEFRAME 28 |
| #define | RSV_RXUNKNOWNOPCODE 29 |
| #define | RSV_RXTYPEVLAN 30 |
| #define | RSV_SIZE 6 |
| #define | RSV_BITMASK(x) (1 << ((x) - 16)) |
| #define | RSV_GETBIT(x, y) (((x) & RSV_BITMASK(y)) ? 1 : 0) |
| #define | ENC28J60_READ_CTRL_REG 0x00 |
| #define | ENC28J60_READ_BUF_MEM 0x3A |
| #define | ENC28J60_WRITE_CTRL_REG 0x40 |
| #define | ENC28J60_WRITE_BUF_MEM 0x7A |
| #define | ENC28J60_BIT_FIELD_SET 0x80 |
| #define | ENC28J60_BIT_FIELD_CLR 0xA0 |
| #define | ENC28J60_SOFT_RESET 0xFF |
| #define | TXSTART_INIT 0x1A00 |
| #define | TXEND_INIT 0x1FFF |
| #define | RXSTART_INIT 0x0000 |
| #define | RXEND_INIT 0x19FF |
| #define | MAX_FRAMELEN 1518 |
| #define | ENC28J60_LAMPS_MODE 0x3476 |
| #define ADDR_MASK 0x1F |
Definition at line 18 of file enc28j60_hw.h.
| #define BANK_MASK 0x60 |
Definition at line 19 of file enc28j60_hw.h.
| #define EBSTCON (0x07|0x60) |
Definition at line 105 of file enc28j60_hw.h.
| #define EBSTCSH (0x09|0x60) |
Definition at line 107 of file enc28j60_hw.h.
| #define EBSTCSL (0x08|0x60) |
Definition at line 106 of file enc28j60_hw.h.
| #define EBSTSD (0x06|0x60) |
Definition at line 104 of file enc28j60_hw.h.
| #define ECOCON (0x15|0x60) |
Definition at line 110 of file enc28j60_hw.h.
| #define ECON1 0x1F |
Definition at line 26 of file enc28j60_hw.h.
| #define ECON1_BSEL0 0x01 |
Definition at line 161 of file enc28j60_hw.h.
| #define ECON1_BSEL1 0x02 |
Definition at line 160 of file enc28j60_hw.h.
| #define ECON1_CSUMEN 0x10 |
Definition at line 157 of file enc28j60_hw.h.
| #define ECON1_DMAST 0x20 |
Definition at line 156 of file enc28j60_hw.h.
| #define ECON1_RXEN 0x04 |
Definition at line 159 of file enc28j60_hw.h.
| #define ECON1_RXRST 0x40 |
Definition at line 155 of file enc28j60_hw.h.
| #define ECON1_TXRST 0x80 |
Definition at line 154 of file enc28j60_hw.h.
| #define ECON1_TXRTS 0x08 |
Definition at line 158 of file enc28j60_hw.h.
| #define ECON2 0x1E |
Definition at line 25 of file enc28j60_hw.h.
| #define ECON2_AUTOINC 0x80 |
Definition at line 149 of file enc28j60_hw.h.
| #define ECON2_PKTDEC 0x40 |
Definition at line 150 of file enc28j60_hw.h.
| #define ECON2_PWRSV 0x20 |
Definition at line 151 of file enc28j60_hw.h.
| #define ECON2_VRPS 0x08 |
Definition at line 152 of file enc28j60_hw.h.
| #define EDMACSH (0x17|0x00) |
Definition at line 51 of file enc28j60_hw.h.
| #define EDMACSL (0x16|0x00) |
Definition at line 50 of file enc28j60_hw.h.
| #define EDMADSTH (0x15|0x00) |
Definition at line 49 of file enc28j60_hw.h.
| #define EDMADSTL (0x14|0x00) |
Definition at line 48 of file enc28j60_hw.h.
| #define EDMANDH (0x13|0x00) |
Definition at line 47 of file enc28j60_hw.h.
| #define EDMANDL (0x12|0x00) |
Definition at line 46 of file enc28j60_hw.h.
| #define EDMASTH (0x11|0x00) |
Definition at line 45 of file enc28j60_hw.h.
| #define EDMASTL (0x10|0x00) |
Definition at line 44 of file enc28j60_hw.h.
| #define EFLOCON (0x17|0x60) |
Definition at line 111 of file enc28j60_hw.h.
| #define EHT0 (0x00|0x20) |
Definition at line 53 of file enc28j60_hw.h.
| #define EHT1 (0x01|0x20) |
Definition at line 54 of file enc28j60_hw.h.
| #define EHT2 (0x02|0x20) |
Definition at line 55 of file enc28j60_hw.h.
| #define EHT3 (0x03|0x20) |
Definition at line 56 of file enc28j60_hw.h.
| #define EHT4 (0x04|0x20) |
Definition at line 57 of file enc28j60_hw.h.
| #define EHT5 (0x05|0x20) |
Definition at line 58 of file enc28j60_hw.h.
| #define EHT6 (0x06|0x20) |
Definition at line 59 of file enc28j60_hw.h.
| #define EHT7 (0x07|0x20) |
Definition at line 60 of file enc28j60_hw.h.
| #define EIE 0x1B |
Definition at line 22 of file enc28j60_hw.h.
| #define EIE_DMAIE 0x20 |
Definition at line 128 of file enc28j60_hw.h.
| #define EIE_INTIE 0x80 |
Definition at line 126 of file enc28j60_hw.h.
| #define EIE_LINKIE 0x10 |
Definition at line 129 of file enc28j60_hw.h.
| #define EIE_PKTIE 0x40 |
Definition at line 127 of file enc28j60_hw.h.
| #define EIE_RXERIE 0x01 |
Definition at line 133 of file enc28j60_hw.h.
| #define EIE_TXERIE 0x02 |
Definition at line 132 of file enc28j60_hw.h.
| #define EIE_TXIE 0x08 |
Definition at line 130 of file enc28j60_hw.h.
| #define EIR 0x1C |
Definition at line 23 of file enc28j60_hw.h.
| #define EIR_DMAIF 0x20 |
Definition at line 136 of file enc28j60_hw.h.
| #define EIR_LINKIF 0x10 |
Definition at line 137 of file enc28j60_hw.h.
| #define EIR_PKTIF 0x40 |
Definition at line 135 of file enc28j60_hw.h.
| #define EIR_RXERIF 0x01 |
Definition at line 141 of file enc28j60_hw.h.
| #define EIR_TXERIF 0x02 |
Definition at line 140 of file enc28j60_hw.h.
| #define EIR_TXIF 0x08 |
Definition at line 138 of file enc28j60_hw.h.
| #define ENC28J60_BIT_FIELD_CLR 0xA0 |
Definition at line 288 of file enc28j60_hw.h.
| #define ENC28J60_BIT_FIELD_SET 0x80 |
Definition at line 287 of file enc28j60_hw.h.
| #define ENC28J60_LAMPS_MODE 0x3476 |
Definition at line 307 of file enc28j60_hw.h.
| #define ENC28J60_READ_BUF_MEM 0x3A |
Definition at line 284 of file enc28j60_hw.h.
| #define ENC28J60_READ_CTRL_REG 0x00 |
Definition at line 283 of file enc28j60_hw.h.
| #define ENC28J60_SOFT_RESET 0xFF |
Definition at line 289 of file enc28j60_hw.h.
| #define ENC28J60_WRITE_BUF_MEM 0x7A |
Definition at line 286 of file enc28j60_hw.h.
| #define ENC28J60_WRITE_CTRL_REG 0x40 |
Definition at line 285 of file enc28j60_hw.h.
| #define EPAUSH (0x19|0x60) |
Definition at line 113 of file enc28j60_hw.h.
| #define EPAUSL (0x18|0x60) |
Definition at line 112 of file enc28j60_hw.h.
| #define EPKTCNT (0x19|0x20) |
Definition at line 76 of file enc28j60_hw.h.
| #define EPMCSH (0x11|0x20) |
Definition at line 70 of file enc28j60_hw.h.
| #define EPMCSL (0x10|0x20) |
Definition at line 69 of file enc28j60_hw.h.
| #define EPMM0 (0x08|0x20) |
Definition at line 61 of file enc28j60_hw.h.
| #define EPMM1 (0x09|0x20) |
Definition at line 62 of file enc28j60_hw.h.
| #define EPMM2 (0x0A|0x20) |
Definition at line 63 of file enc28j60_hw.h.
| #define EPMM3 (0x0B|0x20) |
Definition at line 64 of file enc28j60_hw.h.
| #define EPMM4 (0x0C|0x20) |
Definition at line 65 of file enc28j60_hw.h.
| #define EPMM5 (0x0D|0x20) |
Definition at line 66 of file enc28j60_hw.h.
| #define EPMM6 (0x0E|0x20) |
Definition at line 67 of file enc28j60_hw.h.
| #define EPMM7 (0x0F|0x20) |
Definition at line 68 of file enc28j60_hw.h.
| #define EPMOH (0x15|0x20) |
Definition at line 72 of file enc28j60_hw.h.
| #define EPMOL (0x14|0x20) |
Definition at line 71 of file enc28j60_hw.h.
| #define ERDPTH (0x01|0x00) |
Definition at line 29 of file enc28j60_hw.h.
| #define ERDPTL (0x00|0x00) |
Definition at line 28 of file enc28j60_hw.h.
| #define EREVID (0x12|0x60) |
Definition at line 109 of file enc28j60_hw.h.
| #define ERXFCON (0x18|0x20) |
Definition at line 75 of file enc28j60_hw.h.
| #define ERXFCON_ANDOR 0x40 |
Definition at line 193 of file enc28j60_hw.h.
| #define ERXFCON_BCEN 0x01 |
Definition at line 199 of file enc28j60_hw.h.
| #define ERXFCON_CRCEN 0x20 |
Definition at line 194 of file enc28j60_hw.h.
| #define ERXFCON_HTEN 0x04 |
Definition at line 197 of file enc28j60_hw.h.
| #define ERXFCON_MCEN 0x02 |
Definition at line 198 of file enc28j60_hw.h.
| #define ERXFCON_MPEN 0x08 |
Definition at line 196 of file enc28j60_hw.h.
| #define ERXFCON_PMEN 0x10 |
Definition at line 195 of file enc28j60_hw.h.
| #define ERXFCON_UCEN 0x80 |
Definition at line 192 of file enc28j60_hw.h.
| #define ERXNDH (0x0B|0x00) |
Definition at line 39 of file enc28j60_hw.h.
| #define ERXNDL (0x0A|0x00) |
Definition at line 38 of file enc28j60_hw.h.
| #define ERXRDPTH (0x0D|0x00) |
Definition at line 41 of file enc28j60_hw.h.
| #define ERXRDPTL (0x0C|0x00) |
Definition at line 40 of file enc28j60_hw.h.
| #define ERXSTH (0x09|0x00) |
Definition at line 37 of file enc28j60_hw.h.
| #define ERXSTL (0x08|0x00) |
Definition at line 36 of file enc28j60_hw.h.
| #define ERXWRPTH (0x0F|0x00) |
Definition at line 43 of file enc28j60_hw.h.
| #define ERXWRPTL (0x0E|0x00) |
Definition at line 42 of file enc28j60_hw.h.
| #define ESTAT 0x1D |
Definition at line 24 of file enc28j60_hw.h.
| #define ESTAT_CLKRDY 0x01 |
Definition at line 147 of file enc28j60_hw.h.
| #define ESTAT_INT 0x80 |
Definition at line 143 of file enc28j60_hw.h.
| #define ESTAT_LATECOL 0x10 |
Definition at line 144 of file enc28j60_hw.h.
| #define ESTAT_RXBUSY 0x04 |
Definition at line 145 of file enc28j60_hw.h.
| #define ESTAT_TXABRT 0x02 |
Definition at line 146 of file enc28j60_hw.h.
| #define ETXNDH (0x07|0x00) |
Definition at line 35 of file enc28j60_hw.h.
| #define ETXNDL (0x06|0x00) |
Definition at line 34 of file enc28j60_hw.h.
| #define ETXSTH (0x05|0x00) |
Definition at line 33 of file enc28j60_hw.h.
| #define ETXSTL (0x04|0x00) |
Definition at line 32 of file enc28j60_hw.h.
| #define EWOLIE (0x16|0x20) |
Definition at line 73 of file enc28j60_hw.h.
| #define EWOLIR (0x17|0x20) |
Definition at line 74 of file enc28j60_hw.h.
| #define EWRPTH (0x03|0x00) |
Definition at line 31 of file enc28j60_hw.h.
| #define EWRPTL (0x02|0x00) |
Definition at line 30 of file enc28j60_hw.h.
| #define MAADR0 (0x01|0x60|SPRD_MASK) |
Definition at line 99 of file enc28j60_hw.h.
| #define MAADR1 (0x00|0x60|SPRD_MASK) |
Definition at line 98 of file enc28j60_hw.h.
| #define MAADR2 (0x03|0x60|SPRD_MASK) |
Definition at line 101 of file enc28j60_hw.h.
| #define MAADR3 (0x02|0x60|SPRD_MASK) |
Definition at line 100 of file enc28j60_hw.h.
| #define MAADR4 (0x05|0x60|SPRD_MASK) |
Definition at line 103 of file enc28j60_hw.h.
| #define MAADR5 (0x04|0x60|SPRD_MASK) |
Definition at line 102 of file enc28j60_hw.h.
| #define MABBIPG (0x04|0x40|SPRD_MASK) |
Definition at line 82 of file enc28j60_hw.h.
| #define MACLCON1 (0x08|0x40|SPRD_MASK) |
Definition at line 85 of file enc28j60_hw.h.
| #define MACLCON2 (0x09|0x40|SPRD_MASK) |
Definition at line 86 of file enc28j60_hw.h.
| #define MACON1 (0x00|0x40|SPRD_MASK) |
Definition at line 78 of file enc28j60_hw.h.
| #define MACON1_LOOPBK 0x10 |
Definition at line 163 of file enc28j60_hw.h.
| #define MACON1_MARXEN 0x01 |
Definition at line 167 of file enc28j60_hw.h.
| #define MACON1_PASSALL 0x02 |
Definition at line 166 of file enc28j60_hw.h.
| #define MACON1_RXPAUS 0x04 |
Definition at line 165 of file enc28j60_hw.h.
| #define MACON1_TXPAUS 0x08 |
Definition at line 164 of file enc28j60_hw.h.
| #define MACON2_MARST 0x80 |
Definition at line 169 of file enc28j60_hw.h.
| #define MACON2_MARXRST 0x08 |
Definition at line 171 of file enc28j60_hw.h.
| #define MACON2_MATXRST 0x02 |
Definition at line 173 of file enc28j60_hw.h.
| #define MACON2_RFUNRST 0x04 |
Definition at line 172 of file enc28j60_hw.h.
| #define MACON2_RNDRST 0x40 |
Definition at line 170 of file enc28j60_hw.h.
| #define MACON2_TFUNRST 0x01 |
Definition at line 174 of file enc28j60_hw.h.
| #define MACON3 (0x02|0x40|SPRD_MASK) |
Definition at line 80 of file enc28j60_hw.h.
| #define MACON3_FRMLNEN 0x02 |
Definition at line 182 of file enc28j60_hw.h.
| #define MACON3_FULDPX 0x01 |
Definition at line 183 of file enc28j60_hw.h.
| #define MACON3_HFRMLEN 0x04 |
Definition at line 181 of file enc28j60_hw.h.
| #define MACON3_PADCFG0 0x20 |
Definition at line 178 of file enc28j60_hw.h.
| #define MACON3_PADCFG1 0x40 |
Definition at line 177 of file enc28j60_hw.h.
| #define MACON3_PADCFG2 0x80 |
Definition at line 176 of file enc28j60_hw.h.
| #define MACON3_PHDRLEN 0x08 |
Definition at line 180 of file enc28j60_hw.h.
| #define MACON3_TXCRCEN 0x10 |
Definition at line 179 of file enc28j60_hw.h.
| #define MACON4 (0x03|0x40|SPRD_MASK) |
Definition at line 81 of file enc28j60_hw.h.
| #define MAIPGH (0x07|0x40|SPRD_MASK) |
Definition at line 84 of file enc28j60_hw.h.
| #define MAIPGL (0x06|0x40|SPRD_MASK) |
Definition at line 83 of file enc28j60_hw.h.
| #define MAMXFLH (0x0B|0x40|SPRD_MASK) |
Definition at line 88 of file enc28j60_hw.h.
| #define MAMXFLL (0x0A|0x40|SPRD_MASK) |
Definition at line 87 of file enc28j60_hw.h.
| #define MAPHSUP (0x0D|0x40|SPRD_MASK) |
Definition at line 89 of file enc28j60_hw.h.
| #define MAX_FRAMELEN 1518 |
Definition at line 304 of file enc28j60_hw.h.
| #define MICMD (0x12|0x40|SPRD_MASK) |
Definition at line 91 of file enc28j60_hw.h.
| #define MICMD_MIIRD 0x01 |
Definition at line 186 of file enc28j60_hw.h.
| #define MICMD_MIISCAN 0x02 |
Definition at line 185 of file enc28j60_hw.h.
| #define MICON (0x11|0x40|SPRD_MASK) |
Definition at line 90 of file enc28j60_hw.h.
| #define MIRDH (0x19|0x40|SPRD_MASK) |
Definition at line 96 of file enc28j60_hw.h.
| #define MIRDL (0x18|0x40|SPRD_MASK) |
Definition at line 95 of file enc28j60_hw.h.
| #define MIREGADR (0x14|0x40|SPRD_MASK) |
Definition at line 92 of file enc28j60_hw.h.
| #define MISTAT (0x0A|0x60|SPRD_MASK) |
Definition at line 108 of file enc28j60_hw.h.
| #define MISTAT_BUSY 0x01 |
Definition at line 190 of file enc28j60_hw.h.
| #define MISTAT_NVALID 0x04 |
Definition at line 188 of file enc28j60_hw.h.
| #define MISTAT_SCAN 0x02 |
Definition at line 189 of file enc28j60_hw.h.
| #define MIWRH (0x17|0x40|SPRD_MASK) |
Definition at line 94 of file enc28j60_hw.h.
| #define MIWRL (0x16|0x40|SPRD_MASK) |
Definition at line 93 of file enc28j60_hw.h.
| #define PHCON1 0x00 |
Definition at line 115 of file enc28j60_hw.h.
| #define PHCON1_PDPXMD 0x0100 |
Definition at line 205 of file enc28j60_hw.h.
| #define PHCON1_PLOOPBK 0x4000 |
Definition at line 203 of file enc28j60_hw.h.
| #define PHCON1_PPWRSV 0x0800 |
Definition at line 204 of file enc28j60_hw.h.
| #define PHCON1_PRST 0x8000 |
Definition at line 202 of file enc28j60_hw.h.
| #define PHCON2 0x10 |
Definition at line 119 of file enc28j60_hw.h.
| #define PHCON2_FRCLINK 0x4000 |
Definition at line 219 of file enc28j60_hw.h.
| #define PHCON2_HDLDIS 0x0100 |
Definition at line 222 of file enc28j60_hw.h.
| #define PHCON2_JABBER 0x0400 |
Definition at line 221 of file enc28j60_hw.h.
| #define PHCON2_TXDIS 0x2000 |
Definition at line 220 of file enc28j60_hw.h.
| #define PHHID1 0x02 |
Definition at line 117 of file enc28j60_hw.h.
| #define PHHID2 0x03 |
Definition at line 118 of file enc28j60_hw.h.
| #define PHIE 0x12 |
Definition at line 121 of file enc28j60_hw.h.
| #define PHIE_PGEIE (1 << 1) |
Definition at line 225 of file enc28j60_hw.h.
| #define PHIE_PLNKIE (1 << 4) |
Definition at line 224 of file enc28j60_hw.h.
| #define PHIR 0x13 |
Definition at line 122 of file enc28j60_hw.h.
| #define PHIR_PGEIF (1 << 1) |
Definition at line 228 of file enc28j60_hw.h.
| #define PHIR_PLNKIF (1 << 4) |
Definition at line 227 of file enc28j60_hw.h.
| #define PHLCON 0x14 |
Definition at line 123 of file enc28j60_hw.h.
| #define PHSTAT1 0x01 |
Definition at line 116 of file enc28j60_hw.h.
| #define PHSTAT1_JBSTAT 0x0002 |
Definition at line 210 of file enc28j60_hw.h.
| #define PHSTAT1_LLSTAT 0x0004 |
Definition at line 209 of file enc28j60_hw.h.
| #define PHSTAT1_PFDPX 0x1000 |
Definition at line 207 of file enc28j60_hw.h.
| #define PHSTAT1_PHDPX 0x0800 |
Definition at line 208 of file enc28j60_hw.h.
| #define PHSTAT2 0x11 |
Definition at line 120 of file enc28j60_hw.h.
| #define PHSTAT2_COLSTAT (1 << 11) |
Definition at line 214 of file enc28j60_hw.h.
| #define PHSTAT2_DPXSTAT (1 << 9) |
Definition at line 216 of file enc28j60_hw.h.
| #define PHSTAT2_LSTAT (1 << 10) |
Definition at line 215 of file enc28j60_hw.h.
| #define PHSTAT2_PLRITY (1 << 5) |
Definition at line 217 of file enc28j60_hw.h.
| #define PHSTAT2_RXSTAT (1 << 12) |
Definition at line 213 of file enc28j60_hw.h.
| #define PHSTAT2_TXSTAT (1 << 13) |
Definition at line 212 of file enc28j60_hw.h.
| #define PKTCTRL_PCRCEN 0x02 |
Definition at line 233 of file enc28j60_hw.h.
| #define PKTCTRL_PHUGEEN 0x08 |
Definition at line 231 of file enc28j60_hw.h.
| #define PKTCTRL_POVERRIDE 0x01 |
Definition at line 234 of file enc28j60_hw.h.
| #define PKTCTRL_PPADEN 0x04 |
Definition at line 232 of file enc28j60_hw.h.
Definition at line 278 of file enc28j60_hw.h.
| #define RSV_CARRIEREV 18 |
Definition at line 264 of file enc28j60_hw.h.
| #define RSV_CRCERROR 20 |
Definition at line 265 of file enc28j60_hw.h.
| #define RSV_DRIBBLENIBBLE 26 |
Definition at line 271 of file enc28j60_hw.h.
| #define RSV_GETBIT | ( | x, | |
| y | |||
| ) | (((x) & RSV_BITMASK(y)) ? 1 : 0) |
Definition at line 279 of file enc28j60_hw.h.
| #define RSV_LENCHECKERR 21 |
Definition at line 266 of file enc28j60_hw.h.
| #define RSV_LENOUTOFRANGE 22 |
Definition at line 267 of file enc28j60_hw.h.
| #define RSV_RXBROADCAST 25 |
Definition at line 270 of file enc28j60_hw.h.
| #define RSV_RXCONTROLFRAME 27 |
Definition at line 272 of file enc28j60_hw.h.
| #define RSV_RXLONGEVDROPEV 16 |
Definition at line 263 of file enc28j60_hw.h.
| #define RSV_RXMULTICAST 24 |
Definition at line 269 of file enc28j60_hw.h.
| #define RSV_RXOK 23 |
Definition at line 268 of file enc28j60_hw.h.
| #define RSV_RXPAUSEFRAME 28 |
Definition at line 273 of file enc28j60_hw.h.
| #define RSV_RXTYPEVLAN 30 |
Definition at line 275 of file enc28j60_hw.h.
| #define RSV_RXUNKNOWNOPCODE 29 |
Definition at line 274 of file enc28j60_hw.h.
| #define RSV_SIZE 6 |
Definition at line 277 of file enc28j60_hw.h.
| #define RXEND_INIT 0x19FF |
Definition at line 301 of file enc28j60_hw.h.
| #define RXSTART_INIT 0x0000 |
Definition at line 300 of file enc28j60_hw.h.
| #define SPRD_MASK 0x80 |
Definition at line 20 of file enc28j60_hw.h.
| #define TSV_BACKPRESSUREAPP 50 |
Definition at line 254 of file enc28j60_hw.h.
Definition at line 259 of file enc28j60_hw.h.
Definition at line 258 of file enc28j60_hw.h.
| #define TSV_GETBIT | ( | x, | |
| y | |||
| ) | (((x)[TSV_BYTEOF(y)] & TSV_BITMASK(y)) ? 1 : 0) |
Definition at line 260 of file enc28j60_hw.h.
| #define TSV_SIZE 7 |
Definition at line 257 of file enc28j60_hw.h.
| #define TSV_TOTBYTETXONWIRE 32 |
Definition at line 251 of file enc28j60_hw.h.
| #define TSV_TXBROADCAST 25 |
Definition at line 244 of file enc28j60_hw.h.
| #define TSV_TXBYTECNT 0 |
Definition at line 237 of file enc28j60_hw.h.
| #define TSV_TXCOLLISIONCNT 16 |
Definition at line 238 of file enc28j60_hw.h.
| #define TSV_TXCONTROLFRAME 48 |
Definition at line 252 of file enc28j60_hw.h.
| #define TSV_TXCRCERROR 20 |
Definition at line 239 of file enc28j60_hw.h.
| #define TSV_TXDONE 23 |
Definition at line 242 of file enc28j60_hw.h.
| #define TSV_TXEXCOLLISION 28 |
Definition at line 247 of file enc28j60_hw.h.
| #define TSV_TXEXDEFER 27 |
Definition at line 246 of file enc28j60_hw.h.
| #define TSV_TXGIANT 30 |
Definition at line 249 of file enc28j60_hw.h.
| #define TSV_TXLATECOLLISION 29 |
Definition at line 248 of file enc28j60_hw.h.
| #define TSV_TXLENCHKERROR 21 |
Definition at line 240 of file enc28j60_hw.h.
| #define TSV_TXLENOUTOFRANGE 22 |
Definition at line 241 of file enc28j60_hw.h.
| #define TSV_TXMULTICAST 24 |
Definition at line 243 of file enc28j60_hw.h.
| #define TSV_TXPACKETDEFER 26 |
Definition at line 245 of file enc28j60_hw.h.
| #define TSV_TXPAUSEFRAME 49 |
Definition at line 253 of file enc28j60_hw.h.
| #define TSV_TXUNDERRUN 31 |
Definition at line 250 of file enc28j60_hw.h.
| #define TSV_TXVLANTAGFRAME 51 |
Definition at line 255 of file enc28j60_hw.h.
| #define TXEND_INIT 0x1FFF |
Definition at line 297 of file enc28j60_hw.h.
| #define TXSTART_INIT 0x1A00 |
Definition at line 296 of file enc28j60_hw.h.
1.8.2