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nv50.c
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1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 
25 #include <subdev/bar.h>
26 
27 #include <engine/software.h>
28 #include <engine/disp.h>
29 
32 };
33 
34 static struct nouveau_oclass
35 nv50_disp_sclass[] = {
36  {},
37 };
38 
39 static void
40 nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc)
41 {
42  struct nouveau_bar *bar = nouveau_bar(priv);
43  struct nouveau_disp *disp = &priv->base;
45  unsigned long flags;
46 
47  spin_lock_irqsave(&disp->vblank.lock, flags);
48  list_for_each_entry_safe(chan, temp, &disp->vblank.list, vblank.head) {
49  if (chan->vblank.crtc != crtc)
50  continue;
51 
52  if (nv_device(priv)->chipset >= 0xc0) {
53  nv_wr32(priv, 0x001718, 0x80000000 | chan->vblank.channel);
54  bar->flush(bar);
55  nv_wr32(priv, 0x06000c,
56  upper_32_bits(chan->vblank.offset));
57  nv_wr32(priv, 0x060010,
58  lower_32_bits(chan->vblank.offset));
59  nv_wr32(priv, 0x060014, chan->vblank.value);
60  } else {
61  nv_wr32(priv, 0x001704, chan->vblank.channel);
62  nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma);
63  bar->flush(bar);
64  if (nv_device(priv)->chipset == 0x50) {
65  nv_wr32(priv, 0x001570, chan->vblank.offset);
66  nv_wr32(priv, 0x001574, chan->vblank.value);
67  } else {
68  nv_wr32(priv, 0x060010, chan->vblank.offset);
69  nv_wr32(priv, 0x060014, chan->vblank.value);
70  }
71  }
72 
73  list_del(&chan->vblank.head);
74  if (disp->vblank.put)
75  disp->vblank.put(disp->vblank.data, crtc);
76  }
77  spin_unlock_irqrestore(&disp->vblank.lock, flags);
78 
79  if (disp->vblank.notify)
80  disp->vblank.notify(disp->vblank.data, crtc);
81 }
82 
83 static void
84 nv50_disp_intr(struct nouveau_subdev *subdev)
85 {
86  struct nv50_disp_priv *priv = (void *)subdev;
87  u32 stat1 = nv_rd32(priv, 0x610024);
88 
89  if (stat1 & 0x00000004) {
90  nv50_disp_intr_vblank(priv, 0);
91  nv_wr32(priv, 0x610024, 0x00000004);
92  stat1 &= ~0x00000004;
93  }
94 
95  if (stat1 & 0x00000008) {
96  nv50_disp_intr_vblank(priv, 1);
97  nv_wr32(priv, 0x610024, 0x00000008);
98  stat1 &= ~0x00000008;
99  }
100 
101 }
102 
103 static int
104 nv50_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
105  struct nouveau_oclass *oclass, void *data, u32 size,
106  struct nouveau_object **pobject)
107 {
108  struct nv50_disp_priv *priv;
109  int ret;
110 
111  ret = nouveau_disp_create(parent, engine, oclass, "PDISP",
112  "display", &priv);
113  *pobject = nv_object(priv);
114  if (ret)
115  return ret;
116 
117  nv_engine(priv)->sclass = nv50_disp_sclass;
118  nv_subdev(priv)->intr = nv50_disp_intr;
119 
120  INIT_LIST_HEAD(&priv->base.vblank.list);
121  spin_lock_init(&priv->base.vblank.lock);
122  return 0;
123 }
124 
125 struct nouveau_oclass
127  .handle = NV_ENGINE(DISP, 0x50),
128  .ofuncs = &(struct nouveau_ofuncs) {
129  .ctor = nv50_disp_ctor,
130  .dtor = _nouveau_disp_dtor,
131  .init = _nouveau_disp_init,
132  .fini = _nouveau_disp_fini,
133  },
134 };