10 #include <linux/sched.h>
13 #include <asm/irq_regs.h>
23 ev6_parse_ibox(
u64 i_stat,
int print)
27 #define EV6__I_STAT__PAR (1UL << 29)
28 #define EV6__I_STAT__ERRMASK (EV6__I_STAT__PAR)
30 if (!(i_stat & EV6__I_STAT__ERRMASK))
36 if (i_stat & EV6__I_STAT__PAR)
43 ev6_parse_mbox(
u64 mm_stat,
u64 d_stat,
u64 c_stat,
int print)
47 #define EV6__MM_STAT__DC_TAG_PERR (1UL << 10)
48 #define EV6__MM_STAT__ERRMASK (EV6__MM_STAT__DC_TAG_PERR)
49 #define EV6__D_STAT__TPERR_P0 (1UL << 0)
50 #define EV6__D_STAT__TPERR_P1 (1UL << 1)
51 #define EV6__D_STAT__ECC_ERR_ST (1UL << 2)
52 #define EV6__D_STAT__ECC_ERR_LD (1UL << 3)
53 #define EV6__D_STAT__SEO (1UL << 4)
54 #define EV6__D_STAT__ERRMASK (EV6__D_STAT__TPERR_P0 | \
55 EV6__D_STAT__TPERR_P1 | \
56 EV6__D_STAT__ECC_ERR_ST | \
57 EV6__D_STAT__ECC_ERR_LD | \
60 if (!(d_stat & EV6__D_STAT__ERRMASK) &&
61 !(mm_stat & EV6__MM_STAT__ERRMASK))
67 if (mm_stat & EV6__MM_STAT__DC_TAG_PERR)
68 printk(
"%s Dcache tag parity error on probe\n",
70 if (d_stat & EV6__D_STAT__TPERR_P0)
71 printk(
"%s Dcache tag parity error - pipe 0\n",
73 if (d_stat & EV6__D_STAT__TPERR_P1)
74 printk(
"%s Dcache tag parity error - pipe 1\n",
76 if (d_stat & EV6__D_STAT__ECC_ERR_ST)
77 printk(
"%s ECC error occurred on a store\n",
79 if (d_stat & EV6__D_STAT__ECC_ERR_LD)
80 printk(
"%s ECC error occurred on a %s load\n",
82 c_stat ?
"" :
"speculative ");
83 if (d_stat & EV6__D_STAT__SEO)
90 ev6_parse_cbox(
u64 c_addr,
u64 c1_syn,
u64 c2_syn,
91 u64 c_stat,
u64 c_sts,
int print)
93 static const char *
const sourcename[] = {
94 "UNKNOWN",
"UNKNOWN",
"UNKNOWN",
95 "MEMORY",
"BCACHE",
"DCACHE",
96 "BCACHE PROBE",
"BCACHE PROBE"
98 static const char *
const streamname[] = {
"D",
"I" };
99 static const char *
const bitsname[] = {
"SINGLE",
"DOUBLE" };
103 #define EV6__C_STAT__BC_PERR (0x01)
104 #define EV6__C_STAT__DC_PERR (0x02)
105 #define EV6__C_STAT__DSTREAM_MEM_ERR (0x03)
106 #define EV6__C_STAT__DSTREAM_BC_ERR (0x04)
107 #define EV6__C_STAT__DSTREAM_DC_ERR (0x05)
108 #define EV6__C_STAT__PROBE_BC_ERR0 (0x06)
109 #define EV6__C_STAT__PROBE_BC_ERR1 (0x07)
110 #define EV6__C_STAT__ISTREAM_MEM_ERR (0x0B)
111 #define EV6__C_STAT__ISTREAM_BC_ERR (0x0C)
112 #define EV6__C_STAT__DSTREAM_MEM_DBL (0x13)
113 #define EV6__C_STAT__DSTREAM_BC_DBL (0x14)
114 #define EV6__C_STAT__ISTREAM_MEM_DBL (0x1B)
115 #define EV6__C_STAT__ISTREAM_BC_DBL (0x1C)
116 #define EV6__C_STAT__SOURCE_MEMORY (0x03)
117 #define EV6__C_STAT__SOURCE_BCACHE (0x04)
118 #define EV6__C_STAT__SOURCE__S (0)
119 #define EV6__C_STAT__SOURCE__M (0x07)
120 #define EV6__C_STAT__ISTREAM__S (3)
121 #define EV6__C_STAT__ISTREAM__M (0x01)
122 #define EV6__C_STAT__DOUBLE__S (4)
123 #define EV6__C_STAT__DOUBLE__M (0x01)
124 #define EV6__C_STAT__ERRMASK (0x1F)
125 #define EV6__C_STS__SHARED (1 << 0)
126 #define EV6__C_STS__DIRTY (1 << 1)
127 #define EV6__C_STS__VALID (1 << 2)
128 #define EV6__C_STS__PARITY (1 << 3)
130 if (!(c_stat & EV6__C_STAT__ERRMASK))
136 source =
EXTRACT(c_stat, EV6__C_STAT__SOURCE);
140 if (c_stat & EV6__C_STAT__BC_PERR) {
145 if (c_stat & EV6__C_STAT__DC_PERR) {
150 if (c_stat == EV6__C_STAT__PROBE_BC_ERR0 ||
151 c_stat == EV6__C_STAT__PROBE_BC_ERR1) {
152 printk(
"%s Bcache single-bit error on a probe hit\n",
158 printk(
"%s %s-STREAM %s-BIT ECC error from %s\n",
160 streamname[stream], bitsname[
bits], sourcename[source]);
162 printk(
"%s Address: 0x%016llx\n"
163 " Syndrome[upper.lower]: %02llx.%02llx\n",
168 if (source == EV6__C_STAT__SOURCE_MEMORY ||
169 source == EV6__C_STAT__SOURCE_BCACHE)
170 printk(
"%s Block status: %s%s%s%s\n",
172 (c_sts & EV6__C_STS__SHARED) ?
"SHARED " :
"",
173 (c_sts & EV6__C_STS__DIRTY) ?
"DIRTY " :
"",
174 (c_sts & EV6__C_STS__VALID) ?
"VALID " :
"",
175 (c_sts & EV6__C_STS__PARITY) ?
"PARITY " :
"");
193 status |= ev6_parse_ibox(ev6mchk->
I_STAT, print);
198 ev6mchk->
C_STS, print);
209 printk(
"%s EXC_ADDR: 0x%016lx IER_CM: 0x%016lx"
211 " PAL_BASE: 0x%016lx I_CTL: 0x%016lx"
218 printk(
"%s UNKNOWN error, frame follows:\n",
259 printk(
"%s*CPU %s Error (Vector 0x%x) reported on CPU %d:\n",