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| #define | __hc32 __le32 |
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| #define | __hc16 __le16 |
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| #define | EHCI_MAX_ROOT_PORTS 15 /* see HCS_N_PORTS */ |
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| #define | EHCI_HRTIMER_NO_EVENT 99 |
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| #define | DEFAULT_I_TDPS 1024 /* some HCs can do less */ |
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| #define | OHCI_CTRL_HCFS (3 << 6) |
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| #define | OHCI_USB_OPER (2 << 6) |
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| #define | OHCI_USB_SUSPEND (3 << 6) |
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| #define | OHCI_HCCTRL_OFFSET 0x4 |
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| #define | OHCI_HCCTRL_LEN 0x4 |
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| #define | COUNT(x) do {} while (0) |
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| #define | QTD_NEXT(ehci, dma) cpu_to_hc32(ehci, (u32)dma) |
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| #define | QTD_TOGGLE (1 << 31) /* data toggle */ |
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| #define | QTD_LENGTH(tok) (((tok)>>16) & 0x7fff) |
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| #define | QTD_IOC (1 << 15) /* interrupt on complete */ |
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| #define | QTD_CERR(tok) (((tok)>>10) & 0x3) |
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| #define | QTD_PID(tok) (((tok)>>8) & 0x3) |
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| #define | QTD_STS_ACTIVE (1 << 7) /* HC may execute this */ |
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| #define | QTD_STS_HALT (1 << 6) /* halted on error */ |
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| #define | QTD_STS_DBE (1 << 5) /* data buffer error (in HC) */ |
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| #define | QTD_STS_BABBLE (1 << 4) /* device was babbling (qtd halted) */ |
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| #define | QTD_STS_XACT (1 << 3) /* device gave illegal response */ |
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| #define | QTD_STS_MMF (1 << 2) /* incomplete split transaction */ |
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| #define | QTD_STS_STS (1 << 1) /* split transaction state */ |
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| #define | QTD_STS_PING (1 << 0) /* issue PING? */ |
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| #define | ACTIVE_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_ACTIVE) |
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| #define | HALT_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_HALT) |
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| #define | STATUS_BIT(ehci) cpu_to_hc32(ehci, QTD_STS_STS) |
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| #define | QTD_MASK(ehci) cpu_to_hc32 (ehci, ~0x1f) |
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| #define | IS_SHORT_READ(token) (QTD_LENGTH (token) != 0 && QTD_PID (token) == 1) |
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| #define | Q_NEXT_TYPE(ehci, dma) ((dma) & cpu_to_hc32(ehci, 3 << 1)) |
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| #define | Q_TYPE_ITD (0 << 1) |
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| #define | Q_TYPE_QH (1 << 1) |
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| #define | Q_TYPE_SITD (2 << 1) |
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| #define | Q_TYPE_FSTN (3 << 1) |
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| #define | QH_NEXT(ehci, dma) (cpu_to_hc32(ehci, (((u32)dma)&~0x01f)|Q_TYPE_QH)) |
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| #define | EHCI_LIST_END(ehci) cpu_to_hc32(ehci, 1) /* "null pointer" to hw */ |
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| #define | QH_CONTROL_EP (1 << 27) /* FS/LS control endpoint */ |
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| #define | QH_HEAD (1 << 15) /* Head of async reclamation list */ |
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| #define | QH_TOGGLE_CTL (1 << 14) /* Data toggle control */ |
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| #define | QH_HIGH_SPEED (2 << 12) /* Endpoint speed */ |
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| #define | QH_LOW_SPEED (1 << 12) |
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| #define | QH_FULL_SPEED (0 << 12) |
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| #define | QH_INACTIVATE (1 << 7) /* Inactivate on next transaction */ |
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| #define | QH_SMASK 0x000000ff |
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| #define | QH_CMASK 0x0000ff00 |
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| #define | QH_HUBADDR 0x007f0000 |
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| #define | QH_HUBPORT 0x3f800000 |
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| #define | QH_MULT 0xc0000000 |
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| #define | QH_STATE_LINKED 1 /* HC sees this */ |
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| #define | QH_STATE_UNLINK 2 /* HC may still see this */ |
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| #define | QH_STATE_IDLE 3 /* HC doesn't see this */ |
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| #define | QH_STATE_UNLINK_WAIT 4 /* LINKED and on unlink q */ |
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| #define | QH_STATE_COMPLETING 5 /* don't touch token.HALT */ |
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| #define | QH_XACTERR_MAX 32 /* XactErr retry limit */ |
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| #define | NO_FRAME ((unsigned short)~0) /* pick new start */ |
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| #define | EHCI_ISOC_ACTIVE (1<<31) /* activate transfer this slot */ |
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| #define | EHCI_ISOC_BUF_ERR (1<<30) /* Data buffer error */ |
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| #define | EHCI_ISOC_BABBLE (1<<29) /* babble detected */ |
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| #define | EHCI_ISOC_XACTERR (1<<28) /* XactErr - transaction error */ |
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| #define | EHCI_ITD_LENGTH(tok) (((tok)>>16) & 0x0fff) |
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| #define | EHCI_ITD_IOC (1 << 15) /* interrupt on complete */ |
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| #define | ITD_ACTIVE(ehci) cpu_to_hc32(ehci, EHCI_ISOC_ACTIVE) |
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| #define | SITD_IOC (1 << 31) /* interrupt on completion */ |
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| #define | SITD_PAGE (1 << 30) /* buffer 0/1 */ |
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| #define | SITD_LENGTH(x) (0x3ff & ((x)>>16)) |
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| #define | SITD_STS_ACTIVE (1 << 7) /* HC may execute this */ |
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| #define | SITD_STS_ERR (1 << 6) /* error from TT */ |
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| #define | SITD_STS_DBE (1 << 5) /* data buffer error (in HC) */ |
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| #define | SITD_STS_BABBLE (1 << 4) /* device was babbling */ |
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| #define | SITD_STS_XACT (1 << 3) /* illegal IN response */ |
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| #define | SITD_STS_MMF (1 << 2) /* incomplete split transaction */ |
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| #define | SITD_STS_STS (1 << 1) /* split transaction state */ |
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| #define | SITD_ACTIVE(ehci) cpu_to_hc32(ehci, SITD_STS_ACTIVE) |
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| #define | ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup) ehci_adjust_port_wakeup_flags(ehci, true, do_wakeup); |
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| #define | ehci_prepare_ports_for_controller_resume(ehci) ehci_adjust_port_wakeup_flags(ehci, false, false); |
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| #define | ehci_is_TDI(e) (0) |
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| #define | ehci_port_speed(ehci, portsc) USB_PORT_STAT_HIGH_SPEED |
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| #define | ehci_has_fsl_portno_bug(e) (0) |
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| #define | ehci_big_endian_mmio(e) 0 |
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| #define | ehci_big_endian_capbase(e) 0 |
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| #define | STUB_DEBUG_FILES |
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1.8.2