exynos_dp.h File Reference

Go to the source code of this file.

Data Structures
struct	video_info
struct	exynos_dp_platdata

Macros
#define	DP_TIMEOUT_LOOP_COUNT   100
#define	MAX_CR_LOOP   5
#define	MAX_EQ_LOOP   5

Enumerations
enum	link_rate_type { LINK_RATE_1_62GBPS = 0x06, LINK_RATE_2_70GBPS = 0x0a }
enum	link_lane_count_type { LANE_COUNT1 = 1, LANE_COUNT2 = 2, LANE_COUNT4 = 4 }
enum	link_training_state {   START, CLOCK_RECOVERY, EQUALIZER_TRAINING, FINISHED,   FAILED }
enum	voltage_swing_level { VOLTAGE_LEVEL_0, VOLTAGE_LEVEL_1, VOLTAGE_LEVEL_2, VOLTAGE_LEVEL_3 }
enum	pre_emphasis_level { PRE_EMPHASIS_LEVEL_0, PRE_EMPHASIS_LEVEL_1, PRE_EMPHASIS_LEVEL_2, PRE_EMPHASIS_LEVEL_3 }
enum	pattern_set {   PRBS7, D10_2, TRAINING_PTN1, TRAINING_PTN2,   DP_NONE }
enum	color_space { COLOR_RGB, COLOR_YCBCR422, COLOR_YCBCR444 }
enum	color_depth { COLOR_6, COLOR_8, COLOR_10, COLOR_12 }
enum	color_coefficient { COLOR_YCBCR601, COLOR_YCBCR709 }
enum	dynamic_range { VESA, CEA }
enum	pll_status { PLL_UNLOCKED, PLL_LOCKED }
enum	clock_recovery_m_value_type { CALCULATED_M, REGISTER_M }
enum	video_timing_recognition_type { VIDEO_TIMING_FROM_CAPTURE, VIDEO_TIMING_FROM_REGISTER }
enum	analog_power_block {   AUX_BLOCK, CH0_BLOCK, CH1_BLOCK, CH2_BLOCK,   CH3_BLOCK, ANALOG_TOTAL, POWER_ALL }

Macro Definition Documentation

#define DP_TIMEOUT_LOOP_COUNT   100

Definition at line 15 of file exynos_dp.h.

#define MAX_CR_LOOP   5

Definition at line 16 of file exynos_dp.h.

#define MAX_EQ_LOOP   5

Definition at line 17 of file exynos_dp.h.

Enumeration Type Documentation

enum analog_power_block

Enumerator:

AUX_BLOCK
CH0_BLOCK
CH1_BLOCK
CH2_BLOCK
CH3_BLOCK
ANALOG_TOTAL
POWER_ALL

Definition at line 98 of file exynos_dp.h.

enum clock_recovery_m_value_type

Enumerator:

CALCULATED_M
REGISTER_M

Definition at line 88 of file exynos_dp.h.

enum color_coefficient

Enumerator:

COLOR_YCBCR601
COLOR_YCBCR709

Definition at line 73 of file exynos_dp.h.

enum u32 color_depth

Enumerator:

COLOR_6
COLOR_8
COLOR_10
COLOR_12

Definition at line 66 of file exynos_dp.h.

enum color_space

Enumerator:

COLOR_RGB
COLOR_YCBCR422
COLOR_YCBCR444

Definition at line 60 of file exynos_dp.h.

enum dynamic_range

Enumerator:

VESA
CEA

Definition at line 78 of file exynos_dp.h.

enum link_lane_count_type

Enumerator:

LANE_COUNT1
LANE_COUNT2
LANE_COUNT4

Definition at line 24 of file exynos_dp.h.

enum link_rate_type

Enumerator:

LINK_RATE_1_62GBPS
LINK_RATE_2_70GBPS

Definition at line 19 of file exynos_dp.h.

enum link_training_state

Enumerator:

START
CLOCK_RECOVERY
EQUALIZER_TRAINING
FINISHED
FAILED

Definition at line 30 of file exynos_dp.h.

enum pattern_set

Enumerator:

PRBS7
D10_2
TRAINING_PTN1
TRAINING_PTN2
DP_NONE

Definition at line 52 of file exynos_dp.h.

enum pll_status

Enumerator:

PLL_UNLOCKED
PLL_LOCKED

Definition at line 83 of file exynos_dp.h.

enum pre_emphasis_level

Enumerator:

PRE_EMPHASIS_LEVEL_0
PRE_EMPHASIS_LEVEL_1
PRE_EMPHASIS_LEVEL_2
PRE_EMPHASIS_LEVEL_3

Definition at line 45 of file exynos_dp.h.

enum video_timing_recognition_type

Enumerator:

VIDEO_TIMING_FROM_CAPTURE
VIDEO_TIMING_FROM_REGISTER

Definition at line 93 of file exynos_dp.h.

enum voltage_swing_level

Enumerator:

VOLTAGE_LEVEL_0
VOLTAGE_LEVEL_1
VOLTAGE_LEVEL_2
VOLTAGE_LEVEL_3

Definition at line 38 of file exynos_dp.h.