#include <linux/ioport.h>
#include <linux/export.h>
#include <linux/clkdev.h>
#include <linux/of_address.h>
#include <asm/delay.h>
#include <lantiq_soc.h>
#include "../clk.h"
Go to the source code of this file.
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| #define | SYS1_INFRAC 0x00bc |
| |
| #define | STATUS_CONFIG 0x0040 |
| |
| #define | GPPC_OFFSET 24 |
| |
| #define | GPEFREQ_MASK 0x00000C0 |
| |
| #define | GPEFREQ_OFFSET 10 |
| |
| #define | SYSCTL_CLKS 0x0000 |
| |
| #define | SYSCTL_CLKEN 0x0004 |
| |
| #define | SYSCTL_CLKCLR 0x0008 |
| |
| #define | SYSCTL_ACTS 0x0020 |
| |
| #define | SYSCTL_ACT 0x0024 |
| |
| #define | SYSCTL_DEACT 0x0028 |
| |
| #define | SYSCTL_RBT 0x002c |
| |
| #define | SYS1_CPU0CC 0x0040 |
| |
| #define | SYS1_HRSTOUTC 0x00c0 |
| |
| #define | CPU0CC_CPUDIV 0x0001 |
| |
| #define | ACTS_ASC1_ACT 0x00000800 |
| |
| #define | ACTS_I2C_ACT 0x00004000 |
| |
| #define | ACTS_P0 0x00010000 |
| |
| #define | ACTS_P1 0x00010000 |
| |
| #define | ACTS_P2 0x00020000 |
| |
| #define | ACTS_P3 0x00020000 |
| |
| #define | ACTS_P4 0x00040000 |
| |
| #define | ACTS_PADCTRL0 0x00100000 |
| |
| #define | ACTS_PADCTRL1 0x00100000 |
| |
| #define | ACTS_PADCTRL2 0x00200000 |
| |
| #define | ACTS_PADCTRL3 0x00200000 |
| |
| #define | ACTS_PADCTRL4 0x00400000 |
| |
| #define | sysctl_w32(m, x, y) ltq_w32((x), sysctl_membase[m] + (y)) |
| |
| #define | sysctl_r32(m, x) ltq_r32(sysctl_membase[m] + (x)) |
| |
| #define | sysctl_w32_mask(m, clear, set, reg) sysctl_w32(m, (sysctl_r32(m, reg) & ~(clear)) | (set), reg) |
| |
| #define | status_w32(x, y) ltq_w32((x), status_membase + (y)) |
| |
| #define | status_r32(x) ltq_r32(status_membase + (x)) |
| |
| #define ACTS_ASC1_ACT 0x00000800 |
| #define ACTS_I2C_ACT 0x00004000 |
| #define ACTS_P0 0x00010000 |
| #define ACTS_P1 0x00010000 |
| #define ACTS_P2 0x00020000 |
| #define ACTS_P3 0x00020000 |
| #define ACTS_P4 0x00040000 |
| #define ACTS_PADCTRL0 0x00100000 |
| #define ACTS_PADCTRL1 0x00100000 |
| #define ACTS_PADCTRL2 0x00200000 |
| #define ACTS_PADCTRL3 0x00200000 |
| #define ACTS_PADCTRL4 0x00400000 |
| #define CPU0CC_CPUDIV 0x0001 |
| #define GPEFREQ_MASK 0x00000C0 |
| #define GPEFREQ_OFFSET 10 |
| #define STATUS_CONFIG 0x0040 |
| #define status_r32 |
( |
|
x | ) |
ltq_r32(status_membase + (x)) |
| #define status_w32 |
( |
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x, |
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y |
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) |
| ltq_w32((x), status_membase + (y)) |
| #define SYS1_CPU0CC 0x0040 |
| #define SYS1_HRSTOUTC 0x00c0 |
| #define SYS1_INFRAC 0x00bc |
| #define SYSCTL_ACT 0x0024 |
| #define SYSCTL_ACTS 0x0020 |
| #define SYSCTL_CLKCLR 0x0008 |
| #define SYSCTL_CLKEN 0x0004 |
| #define SYSCTL_CLKS 0x0000 |
| #define SYSCTL_DEACT 0x0028 |
| #define sysctl_r32 |
( |
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m, |
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x |
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) |
| ltq_r32(sysctl_membase[m] + (x)) |
| #define SYSCTL_RBT 0x002c |
| #define sysctl_w32 |
( |
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m, |
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x, |
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y |
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) |
| ltq_w32((x), sysctl_membase[m] + (y)) |
| void falcon_trigger_hrst |
( |
int |
level | ) |
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1.8.2