Linux Kernel  3.7.1
 All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
Macros
fdreg.h File Reference

Go to the source code of this file.

Macros

#define FD_IOPORT   0x3f0
 
#define FD_STATUS   (4 + FD_IOPORT )
 
#define FD_DATA   (5 + FD_IOPORT )
 
#define FD_DOR   (2 + FD_IOPORT )
 
#define FD_DIR   (7 + FD_IOPORT )
 
#define FD_DCR   (7 + FD_IOPORT )
 
#define STATUS_BUSYMASK   0x0F /* drive busy mask */
 
#define STATUS_BUSY   0x10 /* FDC busy */
 
#define STATUS_DMA   0x20 /* 0- DMA mode */
 
#define STATUS_DIR   0x40 /* 0- cpu->fdc */
 
#define STATUS_READY   0x80 /* Data reg ready */
 
#define ST0_DS   0x03 /* drive select mask */
 
#define ST0_HA   0x04 /* Head (Address) */
 
#define ST0_NR   0x08 /* Not Ready */
 
#define ST0_ECE   0x10 /* Equipment check error */
 
#define ST0_SE   0x20 /* Seek end */
 
#define ST0_INTR   0xC0 /* Interrupt code mask */
 
#define ST1_MAM   0x01 /* Missing Address Mark */
 
#define ST1_WP   0x02 /* Write Protect */
 
#define ST1_ND   0x04 /* No Data - unreadable */
 
#define ST1_OR   0x10 /* OverRun */
 
#define ST1_CRC   0x20 /* CRC error in data or addr */
 
#define ST1_EOC   0x80 /* End Of Cylinder */
 
#define ST2_MAM   0x01 /* Missing Address Mark (again) */
 
#define ST2_BC   0x02 /* Bad Cylinder */
 
#define ST2_SNS   0x04 /* Scan Not Satisfied */
 
#define ST2_SEH   0x08 /* Scan Equal Hit */
 
#define ST2_WC   0x10 /* Wrong Cylinder */
 
#define ST2_CRC   0x20 /* CRC error in data field */
 
#define ST2_CM   0x40 /* Control Mark = deleted */
 
#define ST3_HA   0x04 /* Head (Address) */
 
#define ST3_DS   0x08 /* drive is double-sided */
 
#define ST3_TZ   0x10 /* Track Zero signal (1=track 0) */
 
#define ST3_RY   0x20 /* drive is ready */
 
#define ST3_WP   0x40 /* Write Protect */
 
#define ST3_FT   0x80 /* Drive Fault */
 
#define FD_RECALIBRATE   0x07 /* move to track 0 */
 
#define FD_SEEK   0x0F /* seek track */
 
#define FD_READ   0xE6 /* read with MT, MFM, SKip deleted */
 
#define FD_WRITE   0xC5 /* write with MT, MFM */
 
#define FD_SENSEI   0x08 /* Sense Interrupt Status */
 
#define FD_SPECIFY   0x03 /* specify HUT etc */
 
#define FD_FORMAT   0x4D /* format one track */
 
#define FD_VERSION   0x10 /* get version code */
 
#define FD_CONFIGURE   0x13 /* configure FIFO operation */
 
#define FD_PERPENDICULAR   0x12 /* perpendicular r/w mode */
 
#define FD_GETSTATUS   0x04 /* read ST3 */
 
#define FD_DUMPREGS   0x0E /* dump the contents of the fdc regs */
 
#define FD_READID   0xEA /* prints the header of a sector */
 
#define FD_UNLOCK   0x14 /* Fifo config unlock */
 
#define FD_LOCK   0x94 /* Fifo config lock */
 
#define FD_RSEEK_OUT   0x8f /* seek out (i.e. to lower tracks) */
 
#define FD_RSEEK_IN   0xcf /* seek in (i.e. to higher tracks) */
 
#define FD_PARTID   0x18 /* part id ("extended" version cmd) */
 
#define FD_SAVE   0x2e /* save fdc regs for later restore */
 
#define FD_DRIVESPEC
 
#define FD_RESTORE   0x4e /* later restore */
 
#define FD_POWERDOWN   0x27 /* configure FDC's powersave features */
 
#define FD_FORMAT_N_WRITE   0xef /* format and write in one go. */
 
#define FD_OPTION
 
#define DMA_READ   0x46
 
#define DMA_WRITE   0x4A
 
#define FDC_NONE   0x00
 
#define FDC_UNKNOWN
 
#define FDC_8272A   0x20 /* Intel 8272a, NEC 765 */
 
#define FDC_765ED   0x30 /* Non-Intel 1MB-compatible FDC, can't detect */
 
#define FDC_82072   0x40 /* Intel 82072; 8272a + FIFO + DUMPREGS */
 
#define FDC_82072A   0x45 /* 82072A (on Sparcs) */
 
#define FDC_82077_ORIG   0x51 /* Original version of 82077AA, sans LOCK */
 
#define FDC_82077   0x52 /* 82077AA-1 */
 
#define FDC_82078_UNKN   0x5f /* Unknown 82078 variant */
 
#define FDC_82078   0x60 /* 44pin 82078 or 64pin 82078SL */
 
#define FDC_82078_1   0x61 /* 82078-1 (2Mbps fdc) */
 
#define FDC_S82078B
 
#define FDC_87306   0x63 /* National Semiconductor PC 87306 */
 
#define FD_RESET_DELAY   20
 

Macro Definition Documentation

#define DMA_READ   0x46

Definition at line 104 of file fdreg.h.

#define DMA_WRITE   0x4A

Definition at line 105 of file fdreg.h.

#define FD_CONFIGURE   0x13 /* configure FIFO operation */

Definition at line 79 of file fdreg.h.

#define FD_DATA   (5 + FD_IOPORT )

Definition at line 19 of file fdreg.h.

#define FD_DCR   (7 + FD_IOPORT )

Definition at line 28 of file fdreg.h.

#define FD_DIR   (7 + FD_IOPORT )

Definition at line 25 of file fdreg.h.

#define FD_DOR   (2 + FD_IOPORT )

Definition at line 22 of file fdreg.h.

#define FD_DRIVESPEC
Value:
0x8e /* drive specification: Access to the
* 2 Mbps data transfer rate for tape
* drives */

Definition at line 96 of file fdreg.h.

#define FD_DUMPREGS   0x0E /* dump the contents of the fdc regs */

Definition at line 82 of file fdreg.h.

#define FD_FORMAT   0x4D /* format one track */

Definition at line 77 of file fdreg.h.

#define FD_FORMAT_N_WRITE   0xef /* format and write in one go. */

Definition at line 100 of file fdreg.h.

#define FD_GETSTATUS   0x04 /* read ST3 */

Definition at line 81 of file fdreg.h.

#define FD_IOPORT   0x3f0

Definition at line 14 of file fdreg.h.

#define FD_LOCK   0x94 /* Fifo config lock */

Definition at line 85 of file fdreg.h.

#define FD_OPTION
Value:
0x33 /* ISO format (which is a clean way to
* pack more sectors on a track) */

Definition at line 101 of file fdreg.h.

#define FD_PARTID   0x18 /* part id ("extended" version cmd) */

Definition at line 94 of file fdreg.h.

#define FD_PERPENDICULAR   0x12 /* perpendicular r/w mode */

Definition at line 80 of file fdreg.h.

#define FD_POWERDOWN   0x27 /* configure FDC's powersave features */

Definition at line 99 of file fdreg.h.

#define FD_READ   0xE6 /* read with MT, MFM, SKip deleted */

Definition at line 73 of file fdreg.h.

#define FD_READID   0xEA /* prints the header of a sector */

Definition at line 83 of file fdreg.h.

#define FD_RECALIBRATE   0x07 /* move to track 0 */

Definition at line 71 of file fdreg.h.

#define FD_RESET_DELAY   20

Definition at line 131 of file fdreg.h.

#define FD_RESTORE   0x4e /* later restore */

Definition at line 98 of file fdreg.h.

#define FD_RSEEK_IN   0xcf /* seek in (i.e. to higher tracks) */

Definition at line 87 of file fdreg.h.

#define FD_RSEEK_OUT   0x8f /* seek out (i.e. to lower tracks) */

Definition at line 86 of file fdreg.h.

#define FD_SAVE   0x2e /* save fdc regs for later restore */

Definition at line 95 of file fdreg.h.

#define FD_SEEK   0x0F /* seek track */

Definition at line 72 of file fdreg.h.

#define FD_SENSEI   0x08 /* Sense Interrupt Status */

Definition at line 75 of file fdreg.h.

#define FD_SPECIFY   0x03 /* specify HUT etc */

Definition at line 76 of file fdreg.h.

#define FD_STATUS   (4 + FD_IOPORT )

Definition at line 18 of file fdreg.h.

#define FD_UNLOCK   0x14 /* Fifo config unlock */

Definition at line 84 of file fdreg.h.

#define FD_VERSION   0x10 /* get version code */

Definition at line 78 of file fdreg.h.

#define FD_WRITE   0xC5 /* write with MT, MFM */

Definition at line 74 of file fdreg.h.

#define FDC_765ED   0x30 /* Non-Intel 1MB-compatible FDC, can't detect */

Definition at line 111 of file fdreg.h.

#define FDC_82072   0x40 /* Intel 82072; 8272a + FIFO + DUMPREGS */

Definition at line 112 of file fdreg.h.

#define FDC_82072A   0x45 /* 82072A (on Sparcs) */

Definition at line 113 of file fdreg.h.

#define FDC_82077   0x52 /* 82077AA-1 */

Definition at line 115 of file fdreg.h.

#define FDC_82077_ORIG   0x51 /* Original version of 82077AA, sans LOCK */

Definition at line 114 of file fdreg.h.

#define FDC_82078   0x60 /* 44pin 82078 or 64pin 82078SL */

Definition at line 117 of file fdreg.h.

#define FDC_82078_1   0x61 /* 82078-1 (2Mbps fdc) */

Definition at line 118 of file fdreg.h.

#define FDC_82078_UNKN   0x5f /* Unknown 82078 variant */

Definition at line 116 of file fdreg.h.

#define FDC_8272A   0x20 /* Intel 8272a, NEC 765 */

Definition at line 110 of file fdreg.h.

#define FDC_87306   0x63 /* National Semiconductor PC 87306 */

Definition at line 120 of file fdreg.h.

#define FDC_NONE   0x00

Definition at line 108 of file fdreg.h.

#define FDC_S82078B
Value:
0x62 /* S82078B (first seen on Adaptec AVA-2825 VLB
* SCSI/EIDE/Floppy controller) */

Definition at line 119 of file fdreg.h.

#define FDC_UNKNOWN
Value:
0x10 /* DO NOT USE THIS TYPE EXCEPT IF IDENTIFICATION
FAILS EARLY */

Definition at line 109 of file fdreg.h.

#define ST0_DS   0x03 /* drive select mask */

Definition at line 38 of file fdreg.h.

#define ST0_ECE   0x10 /* Equipment check error */

Definition at line 41 of file fdreg.h.

#define ST0_HA   0x04 /* Head (Address) */

Definition at line 39 of file fdreg.h.

#define ST0_INTR   0xC0 /* Interrupt code mask */

Definition at line 43 of file fdreg.h.

#define ST0_NR   0x08 /* Not Ready */

Definition at line 40 of file fdreg.h.

#define ST0_SE   0x20 /* Seek end */

Definition at line 42 of file fdreg.h.

#define ST1_CRC   0x20 /* CRC error in data or addr */

Definition at line 50 of file fdreg.h.

#define ST1_EOC   0x80 /* End Of Cylinder */

Definition at line 51 of file fdreg.h.

#define ST1_MAM   0x01 /* Missing Address Mark */

Definition at line 46 of file fdreg.h.

#define ST1_ND   0x04 /* No Data - unreadable */

Definition at line 48 of file fdreg.h.

#define ST1_OR   0x10 /* OverRun */

Definition at line 49 of file fdreg.h.

#define ST1_WP   0x02 /* Write Protect */

Definition at line 47 of file fdreg.h.

#define ST2_BC   0x02 /* Bad Cylinder */

Definition at line 55 of file fdreg.h.

#define ST2_CM   0x40 /* Control Mark = deleted */

Definition at line 60 of file fdreg.h.

#define ST2_CRC   0x20 /* CRC error in data field */

Definition at line 59 of file fdreg.h.

#define ST2_MAM   0x01 /* Missing Address Mark (again) */

Definition at line 54 of file fdreg.h.

#define ST2_SEH   0x08 /* Scan Equal Hit */

Definition at line 57 of file fdreg.h.

#define ST2_SNS   0x04 /* Scan Not Satisfied */

Definition at line 56 of file fdreg.h.

#define ST2_WC   0x10 /* Wrong Cylinder */

Definition at line 58 of file fdreg.h.

#define ST3_DS   0x08 /* drive is double-sided */

Definition at line 64 of file fdreg.h.

#define ST3_FT   0x80 /* Drive Fault */

Definition at line 68 of file fdreg.h.

#define ST3_HA   0x04 /* Head (Address) */

Definition at line 63 of file fdreg.h.

#define ST3_RY   0x20 /* drive is ready */

Definition at line 66 of file fdreg.h.

#define ST3_TZ   0x10 /* Track Zero signal (1=track 0) */

Definition at line 65 of file fdreg.h.

#define ST3_WP   0x40 /* Write Protect */

Definition at line 67 of file fdreg.h.

#define STATUS_BUSY   0x10 /* FDC busy */

Definition at line 32 of file fdreg.h.

#define STATUS_BUSYMASK   0x0F /* drive busy mask */

Definition at line 31 of file fdreg.h.

#define STATUS_DIR   0x40 /* 0- cpu->fdc */

Definition at line 34 of file fdreg.h.

#define STATUS_DMA   0x20 /* 0- DMA mode */

Definition at line 33 of file fdreg.h.

#define STATUS_READY   0x80 /* Data reg ready */

Definition at line 35 of file fdreg.h.