12 #include <linux/sched.h>
14 #include <asm/tlbflush.h>
18 static unsigned long cxn_bitmap[
NR_CXN / (
sizeof(
unsigned long) * 8)];
32 INIT_LIST_HEAD(&mm->
context.id_link);
33 mm->
context.itlb_cached_pge = 0xffffffff
UL;
34 mm->
context.dtlb_cached_pge = 0xffffffff
UL;
50 if (!list_empty(&ctx->id_link)) {
51 list_move_tail(&ctx->id_link, &cxn_owners_lru);
70 BUG_ON(_p == &cxn_owners_lru);
74 list_del_init(&p->id_link);
99 asm volatile(
"movsg scr0,%0" :
"=r"(old->itlb_cached_pge));
100 asm volatile(
"movsg dampr4,%0" :
"=r"(old->itlb_ptd_mapping));
101 asm volatile(
"movsg scr1,%0" :
"=r"(old->dtlb_cached_pge));
102 asm volatile(
"movsg dampr5,%0" :
"=r"(old->dtlb_ptd_mapping));
105 spin_lock(&cxn_owners_lock);
108 spin_unlock(&cxn_owners_lock);
110 asm volatile(
"movgs %0,cxnr" : :
"r"(ctx->
id));
113 asm volatile(
"movgs %0,scr0" : :
"r"(ctx->itlb_cached_pge));
114 asm volatile(
"movgs %0,dampr4" : :
"r"(ctx->itlb_ptd_mapping));
115 asm volatile(
"movgs %0,scr1" : :
"r"(ctx->dtlb_cached_pge));
116 asm volatile(
"movgs %0,dampr5" : :
"r"(ctx->dtlb_ptd_mapping));
119 asm volatile(
"movgs %0,ttbr" : :
"r"(_pgd));
120 asm volatile(
"movgs %0,dampr3"
134 spin_lock(&cxn_owners_lock);
136 if (!list_empty(&ctx->id_link)) {
140 list_del_init(&ctx->id_link);
146 spin_unlock(&cxn_owners_lock);
153 #ifdef CONFIG_PROC_FS
156 spin_lock(&cxn_owners_lock);
158 spin_unlock(&cxn_owners_lock);
202 spin_lock(&cxn_owners_lock);
204 spin_unlock(&cxn_owners_lock);