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g2d-regs.h
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1 /*
2  * Samsung S5P G2D - 2D Graphics Accelerator Driver
3  *
4  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
5  * Kamil Debski, <[email protected]>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by the
9  * Free Software Foundation; either version 2 of the
10  * License, or (at your option) any later version
11  */
12 
13 /* General Registers */
14 #define SOFT_RESET_REG 0x0000 /* Software reset reg */
15 #define INTEN_REG 0x0004 /* Interrupt Enable reg */
16 #define INTC_PEND_REG 0x000C /* Interrupt Control Pending reg */
17 #define FIFO_STAT_REG 0x0010 /* Command FIFO Status reg */
18 #define AXI_ID_MODE_REG 0x0014 /* AXI Read ID Mode reg */
19 #define CACHECTL_REG 0x0018 /* Cache & Buffer clear reg */
20 #define AXI_MODE_REG 0x001C /* AXI Mode reg */
21 
22 /* Command Registers */
23 #define BITBLT_START_REG 0x0100 /* BitBLT Start reg */
24 #define BITBLT_COMMAND_REG 0x0104 /* Command reg for BitBLT */
25 
26 /* Parameter Setting Registers (Rotate & Direction) */
27 #define ROTATE_REG 0x0200 /* Rotation reg */
28 #define SRC_MSK_DIRECT_REG 0x0204 /* Src and Mask Direction reg */
29 #define DST_PAT_DIRECT_REG 0x0208 /* Dest and Pattern Direction reg */
30 
31 /* Parameter Setting Registers (Src) */
32 #define SRC_SELECT_REG 0x0300 /* Src Image Selection reg */
33 #define SRC_BASE_ADDR_REG 0x0304 /* Src Image Base Address reg */
34 #define SRC_STRIDE_REG 0x0308 /* Src Stride reg */
35 #define SRC_COLOR_MODE_REG 0x030C /* Src Image Color Mode reg */
36 #define SRC_LEFT_TOP_REG 0x0310 /* Src Left Top Coordinate reg */
37 #define SRC_RIGHT_BOTTOM_REG 0x0314 /* Src Right Bottom Coordinate reg */
38 
39 /* Parameter Setting Registers (Dest) */
40 #define DST_SELECT_REG 0x0400 /* Dest Image Selection reg */
41 #define DST_BASE_ADDR_REG 0x0404 /* Dest Image Base Address reg */
42 #define DST_STRIDE_REG 0x0408 /* Dest Stride reg */
43 #define DST_COLOR_MODE_REG 0x040C /* Dest Image Color Mode reg */
44 #define DST_LEFT_TOP_REG 0x0410 /* Dest Left Top Coordinate reg */
45 #define DST_RIGHT_BOTTOM_REG 0x0414 /* Dest Right Bottom Coordinate reg */
46 
47 /* Parameter Setting Registers (Pattern) */
48 #define PAT_BASE_ADDR_REG 0x0500 /* Pattern Image Base Address reg */
49 #define PAT_SIZE_REG 0x0504 /* Pattern Image Size reg */
50 #define PAT_COLOR_MODE_REG 0x0508 /* Pattern Image Color Mode reg */
51 #define PAT_OFFSET_REG 0x050C /* Pattern Left Top Coordinate reg */
52 #define PAT_STRIDE_REG 0x0510 /* Pattern Stride reg */
53 
54 /* Parameter Setting Registers (Mask) */
55 #define MASK_BASE_ADDR_REG 0x0520 /* Mask Base Address reg */
56 #define MASK_STRIDE_REG 0x0524 /* Mask Stride reg */
57 
58 /* Parameter Setting Registers (Clipping Window) */
59 #define CW_LT_REG 0x0600 /* LeftTop coordinates of Clip Window */
60 #define CW_RB_REG 0x0604 /* RightBottom coordinates of Clip
61  Window */
62 
63 /* Parameter Setting Registers (ROP & Alpha Setting) */
64 #define THIRD_OPERAND_REG 0x0610 /* Third Operand Selection reg */
65 #define ROP4_REG 0x0614 /* Raster Operation reg */
66 #define ALPHA_REG 0x0618 /* Alpha value, Fading offset value */
67 
68 /* Parameter Setting Registers (Color) */
69 #define FG_COLOR_REG 0x0700 /* Foreground Color reg */
70 #define BG_COLOR_REG 0x0704 /* Background Color reg */
71 #define BS_COLOR_REG 0x0708 /* Blue Screen Color reg */
72 
73 /* Parameter Setting Registers (Color Key) */
74 #define SRC_COLORKEY_CTRL_REG 0x0710 /* Src Colorkey control reg */
75 #define SRC_COLORKEY_DR_MIN_REG 0x0714 /* Src Colorkey Decision Reference
76  Min reg */
77 #define SRC_COLORKEY_DR_MAX_REG 0x0718 /* Src Colorkey Decision Reference
78  Max reg */
79 #define DST_COLORKEY_CTRL_REG 0x071C /* Dest Colorkey control reg */
80 #define DST_COLORKEY_DR_MIN_REG 0x0720 /* Dest Colorkey Decision Reference
81  Min reg */
82 #define DST_COLORKEY_DR_MAX_REG 0x0724 /* Dest Colorkey Decision Reference
83  Max reg */
84 
85 /* Color mode values */
86 
87 #define ORDER_XRGB 0
88 #define ORDER_RGBX 1
89 #define ORDER_XBGR 2
90 #define ORDER_BGRX 3
91 
92 #define MODE_XRGB_8888 0
93 #define MODE_ARGB_8888 1
94 #define MODE_RGB_565 2
95 #define MODE_XRGB_1555 3
96 #define MODE_ARGB_1555 4
97 #define MODE_XRGB_4444 5
98 #define MODE_ARGB_4444 6
99 #define MODE_PACKED_RGB_888 7
101 #define COLOR_MODE(o, m) (((o) << 4) | (m))
102 
103 /* ROP4 operation values */
104 #define ROP4_COPY 0xCCCC
105 #define ROP4_INVERT 0x3333
107 /* Hardware limits */
108 #define MAX_WIDTH 8000
109 #define MAX_HEIGHT 8000
110 
111 #define G2D_TIMEOUT 500
112 
113 #define DEFAULT_WIDTH 100
114 #define DEFAULT_HEIGHT 100
115