11 #include <linux/string.h>
12 #include <linux/kernel.h>
13 #include <linux/signal.h>
14 #include <linux/sched.h>
18 #include <linux/tty.h>
19 #include <asm/pgtable.h>
20 #include <asm/gdb-stub.h>
21 #include <asm/exceptions.h>
22 #include <unit/clock.h>
25 #if defined(CONFIG_GDBSTUB_ON_TTYSM0)
27 #elif defined(CONFIG_GDBSTUB_ON_TTYSM1)
61 NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
63 NUM2GxICR_LEVEL(CONFIG_DEBUGGER_IRQ_LEVEL));
67 *gdbstub_port->
rx_icr |= GxICR_ENABLE;
68 tmp = *gdbstub_port->
rx_icr;
71 scxctr = SC01CTR_CLN_8BIT;
74 scxctr |= SC0CTR_CK_TM8UFLOW_8;
79 scxctr |= SC0CTR_CK_TM2UFLOW_8;
83 scxctr |= SC01CTR_TXE | SC01CTR_RXE;
89 arch_local_change_intr_mask_level(
90 NUM2EPSW_IM(CONFIG_DEBUGGER_IRQ_LEVEL + 1));
98 const unsigned bits = 10;
107 }
else if (baud == 134) {
117 tmxmd = TM8MD_SRC_IOCLK;
118 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
119 if (tmp > 0 && tmp <= 65535)
122 tmxmd = TM8MD_SRC_IOCLK_8;
123 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
124 if (tmp > 0 && tmp <= 65535)
127 tmxmd = TM8MD_SRC_IOCLK_32;
128 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
129 if (tmp > 0 && tmp <= 65535)
135 tmxmd = TM2MD_SRC_IOCLK;
136 tmxbr = tmp = (ioclk / (baud * xdiv) + 4) / 8 - 1;
137 if (tmp > 0 && tmp <= 255)
140 tmxmd = TM2MD_SRC_IOCLK_8;
141 tmxbr = tmp = (ioclk / (baud * 8 * xdiv) + 4) / 8 - 1;
142 if (tmp > 0 && tmp <= 255)
145 tmxmd = TM2MD_SRC_IOCLK_32;
146 tmxbr = tmp = (ioclk / (baud * 32 * xdiv) + 4) / 8 - 1;
147 if (tmp > 0 && tmp <= 255)
154 goto try_alternative;
157 gdbstub_port->
uart.timeout = (2 * bits *
HZ) / baud;
158 gdbstub_port->
uart.timeout +=
HZ / 50;
163 *gdbstub_port->
_tmxmd = 0;
164 *gdbstub_port->
_tmxbr = tmxbr;
165 *gdbstub_port->
_tmxmd = TM8MD_INIT_COUNTER;
166 *gdbstub_port->
_tmxmd = tmxmd | TM8MD_COUNT_ENABLE;
170 *gdbstub_port->
_tmxmd = 0;
171 *(
volatile u8 *) gdbstub_port->
_tmxbr = (
u8)tmxbr;
172 *gdbstub_port->
_tmxmd = TM2MD_INIT_COUNTER;
173 *gdbstub_port->
_tmxmd = tmxmd | TM2MD_COUNT_ENABLE;
185 #if defined(CONFIG_MN10300_WD_TIMER)
204 #ifdef CONFIG_MN10300_WD_TIMER
205 for (cpu = 0; cpu <
NR_CPUS; cpu++)
216 st &= SC01STR_RXF | SC01STR_RBF | SC01STR_FEF | SC01STR_PEF |
222 if (st & SC01STR_FEF && ch == 0) {
223 switch (gdbstub_port->
rx_brk) {
224 case 0: gdbstub_port->
rx_brk = 1;
goto try_again;
225 case 1: gdbstub_port->
rx_brk = 2;
goto try_again;
234 }
else if (st & SC01STR_FEF) {
240 }
else if (st & SC01STR_OEF) {
246 }
else if (st & SC01STR_PEF) {
254 if (gdbstub_port->
rx_brk == 3) {
273 gdbstub_io(
"### GDB Rx %02x (st=%02x) ###\n", ch, st);
284 while (*gdbstub_port->
_status & SC01STR_TBF)
288 *(
u8 *) gdbstub_port->
_txb = 0x0d;
289 while (*gdbstub_port->
_status & SC01STR_TBF)
293 *(
u8 *) gdbstub_port->
_txb = ch;
301 while (*gdbstub_port->
_status & (SC01STR_TBF | SC01STR_TXF))