irq.c File Reference

#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/seq_file.h>
#include <linux/cpumask.h>
#include <asm/setup.h>
#include <asm/serial-regs.h>

Go to the source code of this file.

Functions
	EXPORT_SYMBOL (__mn10300_irq_enabled_epsw)
void	ack_bad_irq (int irq)
void	set_intr_level (int irq, u16 level)
void	mn10300_set_lateack_irq_type (int irq)
void __init	init_IRQ (void)
asmlinkage void	do_IRQ (void)
int	arch_show_interrupts (struct seq_file *p, int prec)

Variables
unsigned long __mn10300_irq_enabled_epsw[NR_CPUS]	__cacheline_aligned_in_smp
atomic_t	irq_err_count

Function Documentation

void ack_bad_irq

(

int

irq

)

Definition at line 244 of file irq.c.

int arch_show_interrupts	(	struct seq_file *	p,
		int	prec
	)

Definition at line 338 of file irq.c.

asmlinkage void do_IRQ

(

void

)

Definition at line 292 of file irq.c.

EXPORT_SYMBOL

(

__mn10300_irq_enabled_epsw

)

void __init init_IRQ

(

void

)

The hexagon core comes with a first-level interrupt controller with 32 total possible interrupts. When the core is embedded into different systems/platforms, it is typically wrapped by macro cells that provide one or more second-level interrupt controllers that are cascaded into one or more of the first-level interrupts handled here. The precise wiring of these other irqs varies from platform to platform, and are set up & configured in the platform-specific files.

The first-level interrupt controller is wrapped by the VM, which virtualizes the interrupt controller for us. It provides a very simple, fast & efficient API, and so the fasteoi handler is appropriate for this case.

Definition at line 273 of file irq.c.

void mn10300_set_lateack_irq_type

(

int

irq

)

Definition at line 264 of file irq.c.

void set_intr_level	(	int	irq,
		u16	level
	)

Definition at line 253 of file irq.c.

Variable Documentation

unsigned long __mn10300_irq_enabled_epsw [NR_CPUS] __cacheline_aligned_in_smp

Initial value:

= {
    [0 ... NR_CPUS - 1] = EPSW_IE | EPSW_IM_7
}

Definition at line 19 of file irq.c.

atomic_t irq_err_count

Definition at line 35 of file irq.c.