Linux Kernel
3.7.1
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#include <linux/delay.h>
#include <linux/hdlc.h>
#include <linux/i2c-gpio.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/serial_8250.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/pci.h>
#include <asm/system_info.h>
Go to the source code of this file.
Macros | |
#define | SLOT_ETHA 0x0B /* IDSEL = AD21 */ |
#define | SLOT_ETHB 0x0C /* IDSEL = AD20 */ |
#define | SLOT_MPCI 0x0D /* IDSEL = AD19 */ |
#define | SLOT_NEC 0x0E /* IDSEL = AD18 */ |
#define | GPIO_SCL 0 |
#define | GPIO_SDA 1 |
#define | GPIO_STR 2 |
#define | GPIO_IRQ_NEC 3 |
#define | GPIO_IRQ_ETHA 4 |
#define | GPIO_IRQ_ETHB 5 |
#define | GPIO_HSS0_DCD_N 6 |
#define | GPIO_HSS1_DCD_N 7 |
#define | GPIO_UART0_DCD 8 |
#define | GPIO_UART1_DCD 9 |
#define | GPIO_HSS0_CTS_N 10 |
#define | GPIO_HSS1_CTS_N 11 |
#define | GPIO_IRQ_MPCI 12 |
#define | GPIO_HSS1_RTS_N 13 |
#define | GPIO_HSS0_RTS_N 14 |
#define | CONTROL_HSS0_CLK_INT 0 |
#define | CONTROL_HSS1_CLK_INT 1 |
#define | CONTROL_HSS0_DTR_N 2 |
#define | CONTROL_HSS1_DTR_N 3 |
#define | CONTROL_EXT 4 |
#define | CONTROL_AUTO_RESET 5 |
#define | CONTROL_PCI_RESET_N 6 |
#define | CONTROL_EEPROM_WC_N 7 |
#define | CFG_ETH0_ADDRESS 0x40 /* 6 bytes */ |
#define | CFG_ETH1_ADDRESS 0x46 /* 6 bytes */ |
#define | CFG_REV 0x4C /* u32 */ |
#define | CFG_SDRAM_SIZE 0x50 /* u32 */ |
#define | CFG_SDRAM_CONF 0x54 /* u32 */ |
#define | CFG_SDRAM_MODE 0x58 /* u32 */ |
#define | CFG_SDRAM_REFRESH 0x5C /* u32 */ |
#define | CFG_HW_BITS 0x60 /* u32 */ |
#define | CFG_HW_USB_PORTS 0x00000007 /* 0 = no NEC chip, 1-5 = ports # */ |
#define | CFG_HW_HAS_PCI_SLOT 0x00000008 |
#define | CFG_HW_HAS_ETH0 0x00000010 |
#define | CFG_HW_HAS_ETH1 0x00000020 |
#define | CFG_HW_HAS_HSS0 0x00000040 |
#define | CFG_HW_HAS_HSS1 0x00000080 |
#define | CFG_HW_HAS_UART0 0x00000100 |
#define | CFG_HW_HAS_UART1 0x00000200 |
#define | CFG_HW_HAS_EEPROM 0x00000400 |
#define | FLASH_CMD_READ_ARRAY 0xFF |
#define | FLASH_CMD_READ_ID 0x90 |
#define | FLASH_SER_OFF 0x102 /* 0x81 in 16-bit mode */ |
Variables | |
map_io = ixp4xx_map_io | |
init_early = ixp4xx_init_early | |
init_irq = ixp4xx_init_irq | |
timer = &ixp4xx_timer | |
atag_offset = 0x100 | |
init_machine = gmlr_init | |
restart = ixp4xx_restart | |
#define CFG_ETH0_ADDRESS 0x40 /* 6 bytes */ |
Definition at line 54 of file goramo_mlr.c.
#define CFG_ETH1_ADDRESS 0x46 /* 6 bytes */ |
Definition at line 55 of file goramo_mlr.c.
#define CFG_HW_BITS 0x60 /* u32 */ |
Definition at line 62 of file goramo_mlr.c.
#define CFG_HW_HAS_EEPROM 0x00000400 |
Definition at line 71 of file goramo_mlr.c.
#define CFG_HW_HAS_ETH0 0x00000010 |
Definition at line 65 of file goramo_mlr.c.
#define CFG_HW_HAS_ETH1 0x00000020 |
Definition at line 66 of file goramo_mlr.c.
#define CFG_HW_HAS_HSS0 0x00000040 |
Definition at line 67 of file goramo_mlr.c.
#define CFG_HW_HAS_HSS1 0x00000080 |
Definition at line 68 of file goramo_mlr.c.
#define CFG_HW_HAS_PCI_SLOT 0x00000008 |
Definition at line 64 of file goramo_mlr.c.
#define CFG_HW_HAS_UART0 0x00000100 |
Definition at line 69 of file goramo_mlr.c.
#define CFG_HW_HAS_UART1 0x00000200 |
Definition at line 70 of file goramo_mlr.c.
#define CFG_HW_USB_PORTS 0x00000007 /* 0 = no NEC chip, 1-5 = ports # */ |
Definition at line 63 of file goramo_mlr.c.
#define CFG_REV 0x4C /* u32 */ |
Definition at line 56 of file goramo_mlr.c.
#define CFG_SDRAM_CONF 0x54 /* u32 */ |
Definition at line 58 of file goramo_mlr.c.
#define CFG_SDRAM_MODE 0x58 /* u32 */ |
Definition at line 59 of file goramo_mlr.c.
#define CFG_SDRAM_REFRESH 0x5C /* u32 */ |
Definition at line 60 of file goramo_mlr.c.
#define CFG_SDRAM_SIZE 0x50 /* u32 */ |
Definition at line 57 of file goramo_mlr.c.
#define CONTROL_AUTO_RESET 5 |
Definition at line 49 of file goramo_mlr.c.
#define CONTROL_EEPROM_WC_N 7 |
Definition at line 51 of file goramo_mlr.c.
#define CONTROL_EXT 4 |
Definition at line 48 of file goramo_mlr.c.
#define CONTROL_HSS0_CLK_INT 0 |
Definition at line 44 of file goramo_mlr.c.
#define CONTROL_HSS0_DTR_N 2 |
Definition at line 46 of file goramo_mlr.c.
#define CONTROL_HSS1_CLK_INT 1 |
Definition at line 45 of file goramo_mlr.c.
#define CONTROL_HSS1_DTR_N 3 |
Definition at line 47 of file goramo_mlr.c.
#define CONTROL_PCI_RESET_N 6 |
Definition at line 50 of file goramo_mlr.c.
#define FLASH_CMD_READ_ARRAY 0xFF |
Definition at line 73 of file goramo_mlr.c.
#define FLASH_CMD_READ_ID 0x90 |
Definition at line 74 of file goramo_mlr.c.
#define FLASH_SER_OFF 0x102 /* 0x81 in 16-bit mode */ |
Definition at line 75 of file goramo_mlr.c.
#define GPIO_HSS0_CTS_N 10 |
Definition at line 36 of file goramo_mlr.c.
#define GPIO_HSS0_DCD_N 6 |
Definition at line 32 of file goramo_mlr.c.
#define GPIO_HSS0_RTS_N 14 |
Definition at line 40 of file goramo_mlr.c.
#define GPIO_HSS1_CTS_N 11 |
Definition at line 37 of file goramo_mlr.c.
#define GPIO_HSS1_DCD_N 7 |
Definition at line 33 of file goramo_mlr.c.
#define GPIO_HSS1_RTS_N 13 |
Definition at line 39 of file goramo_mlr.c.
#define GPIO_IRQ_ETHA 4 |
Definition at line 30 of file goramo_mlr.c.
#define GPIO_IRQ_ETHB 5 |
Definition at line 31 of file goramo_mlr.c.
#define GPIO_IRQ_MPCI 12 |
Definition at line 38 of file goramo_mlr.c.
#define GPIO_IRQ_NEC 3 |
Definition at line 29 of file goramo_mlr.c.
#define GPIO_SCL 0 |
Definition at line 26 of file goramo_mlr.c.
#define GPIO_SDA 1 |
Definition at line 27 of file goramo_mlr.c.
#define GPIO_STR 2 |
Definition at line 28 of file goramo_mlr.c.
#define GPIO_UART0_DCD 8 |
Definition at line 34 of file goramo_mlr.c.
#define GPIO_UART1_DCD 9 |
Definition at line 35 of file goramo_mlr.c.
#define SLOT_ETHA 0x0B /* IDSEL = AD21 */ |
Definition at line 20 of file goramo_mlr.c.
#define SLOT_ETHB 0x0C /* IDSEL = AD20 */ |
Definition at line 21 of file goramo_mlr.c.
#define SLOT_MPCI 0x0D /* IDSEL = AD19 */ |
Definition at line 22 of file goramo_mlr.c.
#define SLOT_NEC 0x0E /* IDSEL = AD18 */ |
Definition at line 23 of file goramo_mlr.c.
atag_offset = 0x100 |
Definition at line 502 of file goramo_mlr.c.
init_early = ixp4xx_init_early |
Definition at line 499 of file goramo_mlr.c.
init_irq = ixp4xx_init_irq |
Definition at line 500 of file goramo_mlr.c.
init_machine = gmlr_init |
Definition at line 503 of file goramo_mlr.c.
map_io = ixp4xx_map_io |
Definition at line 498 of file goramo_mlr.c.
restart = ixp4xx_restart |
Definition at line 507 of file goramo_mlr.c.
Definition at line 501 of file goramo_mlr.c.