Macros
#define	__reg(ADDR) ((volatile unsigned long )(ADDR))

#define	__get_PDR() ({ __reg(0xfeff0400); })

#define	__set_PDR(V) do { __reg(0xfeff0400) = (V); mb(); } while(0)

#define	__get_GPDR() ({ __reg(0xfeff0408); })

#define	__set_GPDR(V) do { __reg(0xfeff0408) = (V); mb(); } while(0)

#define	__get_SIR() ({ __reg(0xfeff0410); })

#define	__set_SIR(V) do { __reg(0xfeff0410) = (V); mb(); } while(0)

#define	__get_SOR() ({ __reg(0xfeff0418); })

#define	__set_SOR(V) do { __reg(0xfeff0418) = (V); mb(); } while(0)

#define	__set_PDSR(V) do { __reg(0xfeff0420) = (V); mb(); } while(0)

#define	__set_PDCR(V) do { __reg(0xfeff0428) = (V); mb(); } while(0)

#define	__get_RSTR() ({ __reg(0xfeff0500); })

#define	__set_RSTR(V) do { __reg(0xfeff0500) = (V); mb(); } while(0)

#define	PDR_GPIO_DATA(X) (1 << (X))

#define	GPDR_INPUT 0

#define	GPDR_OUTPUT 1

#define	GPDR_DREQ0_BIT 0x00001000

#define	GPDR_DREQ1_BIT 0x00008000

#define	GPDR_DREQ2_BIT 0x00040000

#define	GPDR_DREQ3_BIT 0x00080000

#define	GPDR_DREQ4_BIT 0x00004000

#define	GPDR_DREQ5_BIT 0x00020000

#define	GPDR_DREQ6_BIT 0x00100000

#define	GPDR_DREQ7_BIT 0x00200000

#define	GPDR_DACK0_BIT 0x00002000

#define	GPDR_DACK1_BIT 0x00010000

#define	GPDR_DACK2_BIT 0x00100000

#define	GPDR_DACK3_BIT 0x00200000

#define	GPDR_DONE0_BIT 0x00004000

#define	GPDR_DONE1_BIT 0x00020000

#define	GPDR_GPIO_DIR(X, D) ((D) << (X))

#define	SIR_GPIO_INPUT 0

#define	SIR_DREQ7_INPUT 0x00200000

#define	SIR_DREQ6_INPUT 0x00100000

#define	SIR_DREQ3_INPUT 0x00080000

#define	SIR_DREQ2_INPUT 0x00040000

#define	SIR_DREQ5_INPUT 0x00020000

#define	SIR_DREQ1_INPUT 0x00008000

#define	SIR_DREQ4_INPUT 0x00004000

#define	SIR_DREQ0_INPUT 0x00001000

#define	SIR_RXD1_INPUT 0x00000400

#define	SIR_CTS0_INPUT 0x00000100

#define	SIR_RXD0_INPUT 0x00000040

#define	SIR_GATE1_INPUT 0x00000020

#define	SIR_GATE0_INPUT 0x00000010

#define	SIR_IRQ3_INPUT 0x00000008

#define	SIR_IRQ2_INPUT 0x00000004

#define	SIR_IRQ1_INPUT 0x00000002

#define	SIR_IRQ0_INPUT 0x00000001

#define	SIR_DREQ_BITS

#define	SOR_GPIO_OUTPUT 0

#define	SOR_DACK3_OUTPUT 0x00200000

#define	SOR_DACK2_OUTPUT 0x00100000

#define	SOR_DONE1_OUTPUT 0x00020000

#define	SOR_DACK1_OUTPUT 0x00010000

#define	SOR_DONE0_OUTPUT 0x00004000

#define	SOR_DACK0_OUTPUT 0x00002000

#define	SOR_TXD1_OUTPUT 0x00000800

#define	SOR_RTS0_OUTPUT 0x00000200

#define	SOR_TXD0_OUTPUT 0x00000080

#define	SOR_TOUT1_OUTPUT 0x00000020

#define	SOR_TOUT0_OUTPUT 0x00000010

#define	SOR_DONE_BITS (SOR_DONE0_OUTPUT \| SOR_DONE1_OUTPUT)

#define	SOR_DACK_BITS

#define	PDSR_UNCHANGED 0

#define	PDSR_SET_BIT(X) (1 << (X))

#define	PDCR_UNCHANGED 0

#define	PDCR_CLEAR_BIT(X) (1 << (X))

#define	RSTR_POWERON 0x00000400

#define	RSTR_SOFTRESET_STATUS 0x00000100

#define	RSTR_SOFTRESET 0x00000001

Macro Definition Documentation

#define __get_GPDR ( ) ({ __reg(0xfeff0408); })

Definition at line 20 of file gpio-regs.h.

#define __get_PDR ( ) ({ __reg(0xfeff0400); })

Definition at line 17 of file gpio-regs.h.

#define __get_RSTR ( ) ({ __reg(0xfeff0500); })

Definition at line 33 of file gpio-regs.h.

#define __get_SIR ( ) ({ __reg(0xfeff0410); })

Definition at line 23 of file gpio-regs.h.

#define __get_SOR ( ) ({ __reg(0xfeff0418); })

Definition at line 26 of file gpio-regs.h.

#define __reg ( ADDR ) (*(volatile unsigned long *)(ADDR))

Definition at line 15 of file gpio-regs.h.

#define __set_GPDR ( V ) do { __reg(0xfeff0408) = (V); mb(); } while(0)

Definition at line 21 of file gpio-regs.h.

#define __set_PDCR ( V ) do { __reg(0xfeff0428) = (V); mb(); } while(0)

Definition at line 31 of file gpio-regs.h.

#define __set_PDR ( V ) do { __reg(0xfeff0400) = (V); mb(); } while(0)

Definition at line 18 of file gpio-regs.h.

#define __set_PDSR ( V ) do { __reg(0xfeff0420) = (V); mb(); } while(0)

Definition at line 29 of file gpio-regs.h.

#define __set_RSTR ( V ) do { __reg(0xfeff0500) = (V); mb(); } while(0)

Definition at line 34 of file gpio-regs.h.

#define __set_SIR ( V ) do { __reg(0xfeff0410) = (V); mb(); } while(0)

Definition at line 24 of file gpio-regs.h.

#define __set_SOR ( V ) do { __reg(0xfeff0418) = (V); mb(); } while(0)

Definition at line 27 of file gpio-regs.h.

#define GPDR_DACK0_BIT 0x00002000

Definition at line 52 of file gpio-regs.h.

#define GPDR_DACK1_BIT 0x00010000

Definition at line 53 of file gpio-regs.h.

#define GPDR_DACK2_BIT 0x00100000

Definition at line 54 of file gpio-regs.h.

#define GPDR_DACK3_BIT 0x00200000

Definition at line 55 of file gpio-regs.h.

#define GPDR_DONE0_BIT 0x00004000

Definition at line 56 of file gpio-regs.h.

#define GPDR_DONE1_BIT 0x00020000

Definition at line 57 of file gpio-regs.h.

#define GPDR_DREQ0_BIT 0x00001000

Definition at line 44 of file gpio-regs.h.

#define GPDR_DREQ1_BIT 0x00008000

Definition at line 45 of file gpio-regs.h.

#define GPDR_DREQ2_BIT 0x00040000

Definition at line 46 of file gpio-regs.h.

#define GPDR_DREQ3_BIT 0x00080000

Definition at line 47 of file gpio-regs.h.

#define GPDR_DREQ4_BIT 0x00004000

Definition at line 48 of file gpio-regs.h.

#define GPDR_DREQ5_BIT 0x00020000

Definition at line 49 of file gpio-regs.h.

#define GPDR_DREQ6_BIT 0x00100000

Definition at line 50 of file gpio-regs.h.

#define GPDR_DREQ7_BIT 0x00200000

Definition at line 51 of file gpio-regs.h.

#define GPDR_GPIO_DIR	(	X,
		D
	)	((D) << (X))

Definition at line 58 of file gpio-regs.h.

#define GPDR_INPUT 0

Definition at line 42 of file gpio-regs.h.

#define GPDR_OUTPUT 1

Definition at line 43 of file gpio-regs.h.

#define PDCR_CLEAR_BIT ( X ) (1 << (X))

Definition at line 107 of file gpio-regs.h.

#define PDCR_UNCHANGED 0

Definition at line 106 of file gpio-regs.h.

#define PDR_GPIO_DATA ( X ) (1 << (X))

Definition at line 39 of file gpio-regs.h.

#define PDSR_SET_BIT ( X ) (1 << (X))

Definition at line 103 of file gpio-regs.h.

#define PDSR_UNCHANGED 0

Definition at line 102 of file gpio-regs.h.

#define RSTR_POWERON 0x00000400

Definition at line 111 of file gpio-regs.h.

#define RSTR_SOFTRESET 0x00000001

Definition at line 114 of file gpio-regs.h.

#define RSTR_SOFTRESET_STATUS 0x00000100

Definition at line 112 of file gpio-regs.h.

#define SIR_CTS0_INPUT 0x00000100

Definition at line 71 of file gpio-regs.h.

#define SIR_DREQ0_INPUT 0x00001000

Definition at line 69 of file gpio-regs.h.

#define SIR_DREQ1_INPUT 0x00008000

Definition at line 67 of file gpio-regs.h.

#define SIR_DREQ2_INPUT 0x00040000

Definition at line 65 of file gpio-regs.h.

#define SIR_DREQ3_INPUT 0x00080000

Definition at line 64 of file gpio-regs.h.

#define SIR_DREQ4_INPUT 0x00004000

Definition at line 68 of file gpio-regs.h.

#define SIR_DREQ5_INPUT 0x00020000

Definition at line 66 of file gpio-regs.h.

#define SIR_DREQ6_INPUT 0x00100000

Definition at line 63 of file gpio-regs.h.

#define SIR_DREQ7_INPUT 0x00200000

Definition at line 62 of file gpio-regs.h.

#define SIR_DREQ_BITS

Value:

(SIR_DREQ0_INPUT | SIR_DREQ1_INPUT | \
                 SIR_DREQ2_INPUT | SIR_DREQ3_INPUT | \
                 SIR_DREQ4_INPUT | SIR_DREQ5_INPUT | \
                 SIR_DREQ6_INPUT | SIR_DREQ7_INPUT)

Definition at line 79 of file gpio-regs.h.

#define SIR_GATE0_INPUT 0x00000010

Definition at line 74 of file gpio-regs.h.

#define SIR_GATE1_INPUT 0x00000020

Definition at line 73 of file gpio-regs.h.

#define SIR_GPIO_INPUT 0

Definition at line 61 of file gpio-regs.h.

#define SIR_IRQ0_INPUT 0x00000001

Definition at line 78 of file gpio-regs.h.

#define SIR_IRQ1_INPUT 0x00000002

Definition at line 77 of file gpio-regs.h.

#define SIR_IRQ2_INPUT 0x00000004

Definition at line 76 of file gpio-regs.h.

#define SIR_IRQ3_INPUT 0x00000008

Definition at line 75 of file gpio-regs.h.

#define SIR_RXD0_INPUT 0x00000040

Definition at line 72 of file gpio-regs.h.

#define SIR_RXD1_INPUT 0x00000400

Definition at line 70 of file gpio-regs.h.

#define SOR_DACK0_OUTPUT 0x00002000

Definition at line 91 of file gpio-regs.h.

#define SOR_DACK1_OUTPUT 0x00010000

Definition at line 89 of file gpio-regs.h.

#define SOR_DACK2_OUTPUT 0x00100000

Definition at line 87 of file gpio-regs.h.

#define SOR_DACK3_OUTPUT 0x00200000

Definition at line 86 of file gpio-regs.h.

#define SOR_DACK_BITS

Value:

(SOR_DACK0_OUTPUT | SOR_DACK1_OUTPUT | \

SOR_DACK2_OUTPUT | SOR_DACK3_OUTPUT)

Definition at line 98 of file gpio-regs.h.

#define SOR_DONE0_OUTPUT 0x00004000

Definition at line 90 of file gpio-regs.h.

#define SOR_DONE1_OUTPUT 0x00020000

Definition at line 88 of file gpio-regs.h.

#define SOR_DONE_BITS (SOR_DONE0_OUTPUT | SOR_DONE1_OUTPUT)

Definition at line 97 of file gpio-regs.h.

#define SOR_GPIO_OUTPUT 0

Definition at line 85 of file gpio-regs.h.

#define SOR_RTS0_OUTPUT 0x00000200

Definition at line 93 of file gpio-regs.h.

#define SOR_TOUT0_OUTPUT 0x00000010

Definition at line 96 of file gpio-regs.h.

#define SOR_TOUT1_OUTPUT 0x00000020

Definition at line 95 of file gpio-regs.h.

#define SOR_TXD0_OUTPUT 0x00000080

Definition at line 94 of file gpio-regs.h.

#define SOR_TXD1_OUTPUT 0x00000800

Definition at line 92 of file gpio-regs.h.

Macros

Macro Definition Documentation