#include <linux/init.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/serio.h>
#include <linux/input.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <linux/pci_ids.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/parisc-device.h>
Go to the source code of this file.
| #define GSC_CONTROL 0x08 /* see: Control register bits */ |
| #define GSC_CTRL_CLKDIR 0x80 /* clock line direct control */ |
| #define GSC_CTRL_DATDIR 0x40 /* data line direct control */ |
| #define GSC_CTRL_DIAG 0x20 /* directly control clock/data line */ |
| #define GSC_CTRL_ENBL 0x01 /* enable interface */ |
| #define GSC_CTRL_LPBXR 0x02 /* loopback operation */ |
| #define GSC_DINO_OFFSET 0x0800 /* offset for DINO controller versus LASI one */ |
| #define GSC_ID 0x00 /* device ID offset (see: GSC_ID_XXX) */ |
| #define GSC_RCVDATA 0x04 /* receive port offset */ |
| #define GSC_RESET 0x00 /* reset port offset */ |
| #define GSC_STAT_CLKSHD 0x80 /* Clock Line Shadow */ |
| #define GSC_STAT_CMPINTR 0x10 /* Composite Interrupt = irq on any port */ |
| #define GSC_STAT_DATSHD 0x40 /* Data Line Shadow */ |
| #define GSC_STAT_PERR 0x08 /* Parity Error */ |
| #define GSC_STAT_RBNE 0x01 /* Receive Buffer Not Empty */ |
| #define GSC_STAT_TBNE 0x02 /* Transmit Buffer Not Empty */ |
| #define GSC_STAT_TERR 0x04 /* Timeout Error */ |
| #define GSC_STATUS 0x0C /* see: Status register bits */ |
| #define GSC_XMTDATA 0x04 /* transmit port offset */ |
| MODULE_AUTHOR |
( |
"Laurent Canet <[email protected]> |
, |
|
|
Thibaut Varene< varenet @parisc-linux.org > |
, |
|
|
Helge Deller< deller @gmx.de >" |
|
|
) |
| |
| MODULE_DEVICE_TABLE |
( |
parisc |
, |
|
|
gscps2_device_tbl |
|
|
) |
| |
| module_exit |
( |
gscps2_exit |
| ) |
|
| module_init |
( |
gscps2_init |
| ) |
|
1.8.2