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hwdrv_apci1500.h
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1 /*
2  * Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
3  *
4  * ADDI-DATA GmbH
5  * Dieselstrasse 3
6  * D-77833 Ottersweier
7  * Tel: +19(0)7223/9493-0
8  * Fax: +49(0)7223/9493-92
9  * http://www.addi-data.com
10  * [email protected]
11  *
12  * This program is free software; you can redistribute it and/or modify it
13  * under the terms of the GNU General Public License as published by the Free
14  * Software Foundation; either version 2 of the License, or (at your option)
15  * any later version.
16  */
17 
18 /********* Definitions for APCI-1500 card *****/
19 
20 /* Card Specific information */
21 #define APCI1500_BOARD_VENDOR_ID 0x10e8
22 #define APCI1500_ADDRESS_RANGE 4
23 
24 /* DIGITAL INPUT-OUTPUT DEFINE */
25 
26 #define APCI1500_DIGITAL_OP 2
27 #define APCI1500_DIGITAL_IP 0
28 #define APCI1500_AND 2
29 #define APCI1500_OR 4
30 #define APCI1500_OR_PRIORITY 6
31 #define APCI1500_CLK_SELECT 0
32 #define COUNTER1 0
33 #define COUNTER2 1
34 #define COUNTER3 2
35 #define APCI1500_COUNTER 0x20
36 #define APCI1500_TIMER 0
37 #define APCI1500_WATCHDOG 0
38 #define APCI1500_SINGLE 0
39 #define APCI1500_CONTINUOUS 0x80
40 #define APCI1500_DISABLE 0
41 #define APCI1500_ENABLE 1
42 #define APCI1500_SOFTWARE_TRIGGER 0x4
43 #define APCI1500_HARDWARE_TRIGGER 0x10
44 #define APCI1500_SOFTWARE_GATE 0
45 #define APCI1500_HARDWARE_GATE 0x8
46 #define START 0
47 #define STOP 1
48 #define TRIGGER 2
49 
50 /*
51  * Zillog I/O enumeration
52  */
53 enum {
54  APCI1500_Z8536_PORT_C,
55  APCI1500_Z8536_PORT_B,
56  APCI1500_Z8536_PORT_A,
57  APCI1500_Z8536_CONTROL_REGISTER
58 };
59 
60 /*
61  * Z8536 CIO Internal Address
62  */
63 enum {
64  APCI1500_RW_MASTER_INTERRUPT_CONTROL,
65  APCI1500_RW_MASTER_CONFIGURATION_CONTROL,
66  APCI1500_RW_PORT_A_INTERRUPT_CONTROL,
67  APCI1500_RW_PORT_B_INTERRUPT_CONTROL,
68  APCI1500_RW_TIMER_COUNTER_INTERRUPT_VECTOR,
69  APCI1500_RW_PORT_C_DATA_PCITCH_POLARITY,
70  APCI1500_RW_PORT_C_DATA_DIRECTION,
71  APCI1500_RW_PORT_C_SPECIAL_IO_CONTROL,
72 
73  APCI1500_RW_PORT_A_COMMAND_AND_STATUS,
74  APCI1500_RW_PORT_B_COMMAND_AND_STATUS,
75  APCI1500_RW_CPT_TMR1_CMD_STATUS,
76  APCI1500_RW_CPT_TMR2_CMD_STATUS,
77  APCI1500_RW_CPT_TMR3_CMD_STATUS,
78  APCI1500_RW_PORT_A_DATA,
79  APCI1500_RW_PORT_B_DATA,
80  APCI1500_RW_PORT_C_DATA,
81 
82  APCI1500_R_CPT_TMR1_VALUE_HIGH,
83  APCI1500_R_CPT_TMR1_VALUE_LOW,
84  APCI1500_R_CPT_TMR2_VALUE_HIGH,
85  APCI1500_R_CPT_TMR2_VALUE_LOW,
86  APCI1500_R_CPT_TMR3_VALUE_HIGH,
87  APCI1500_R_CPT_TMR3_VALUE_LOW,
88  APCI1500_RW_CPT_TMR1_TIME_CST_HIGH,
89  APCI1500_RW_CPT_TMR1_TIME_CST_LOW,
90  APCI1500_RW_CPT_TMR2_TIME_CST_HIGH,
91  APCI1500_RW_CPT_TMR2_TIME_CST_LOW,
92  APCI1500_RW_CPT_TMR3_TIME_CST_HIGH,
93  APCI1500_RW_CPT_TMR3_TIME_CST_LOW,
94  APCI1500_RW_CPT_TMR1_MODE_SPECIFICATION,
95  APCI1500_RW_CPT_TMR2_MODE_SPECIFICATION,
96  APCI1500_RW_CPT_TMR3_MODE_SPECIFICATION,
97  APCI1500_R_CURRENT_VECTOR,
98 
99  APCI1500_RW_PORT_A_SPECIFICATION,
100  APCI1500_RW_PORT_A_HANDSHAKE_SPECIFICATION,
101  APCI1500_RW_PORT_A_DATA_PCITCH_POLARITY,
102  APCI1500_RW_PORT_A_DATA_DIRECTION,
103  APCI1500_RW_PORT_A_SPECIAL_IO_CONTROL,
104  APCI1500_RW_PORT_A_PATTERN_POLARITY,
105  APCI1500_RW_PORT_A_PATTERN_TRANSITION,
106  APCI1500_RW_PORT_A_PATTERN_MASK,
107 
108  APCI1500_RW_PORT_B_SPECIFICATION,
109  APCI1500_RW_PORT_B_HANDSHAKE_SPECIFICATION,
110  APCI1500_RW_PORT_B_DATA_PCITCH_POLARITY,
111  APCI1500_RW_PORT_B_DATA_DIRECTION,
112  APCI1500_RW_PORT_B_SPECIAL_IO_CONTROL,
113  APCI1500_RW_PORT_B_PATTERN_POLARITY,
114  APCI1500_RW_PORT_B_PATTERN_TRANSITION,
115  APCI1500_RW_PORT_B_PATTERN_MASK
116 };
117 
118  /*----------DIGITAL INPUT----------------*/
119 static int i_APCI1500_Initialisation(struct comedi_device *dev, struct comedi_subdevice *s,
120  struct comedi_insn *insn, unsigned int *data);
121 static int i_APCI1500_ConfigDigitalInputEvent(struct comedi_device *dev,
122  struct comedi_subdevice *s,
123  struct comedi_insn *insn,
124  unsigned int *data);
125 
126 static int i_APCI1500_StartStopInputEvent(struct comedi_device *dev,
127  struct comedi_subdevice *s,
128  struct comedi_insn *insn, unsigned int *data);
129 static int i_APCI1500_ReadMoreDigitalInput(struct comedi_device *dev,
130  struct comedi_subdevice *s,
131  struct comedi_insn *insn, unsigned int *data);
132 
133 /*---------- DIGITAL OUTPUT------------*/
134 static int i_APCI1500_ConfigDigitalOutputErrorInterrupt(struct comedi_device *dev,
135  struct comedi_subdevice *s,
136  struct comedi_insn *insn,
137  unsigned int *data);
138 static int i_APCI1500_WriteDigitalOutput(struct comedi_device *dev,
139  struct comedi_subdevice *s,
140  struct comedi_insn *insn, unsigned int *data);
141 
142 /*----------TIMER----------------*/
143 static int i_APCI1500_ConfigCounterTimerWatchdog(struct comedi_device *dev,
144  struct comedi_subdevice *s,
145  struct comedi_insn *insn,
146  unsigned int *data);
147 static int i_APCI1500_StartStopTriggerTimerCounterWatchdog(struct comedi_device *dev,
148  struct comedi_subdevice *s,
149  struct comedi_insn *insn,
150  unsigned int *data);
151 static int i_APCI1500_ReadCounterTimerWatchdog(struct comedi_device *dev,
152  struct comedi_subdevice *s,
153  struct comedi_insn *insn,
154  unsigned int *data);
155 static int i_APCI1500_ReadInterruptMask(struct comedi_device *dev,
156  struct comedi_subdevice *s,
157  struct comedi_insn *insn, unsigned int *data);
158 
159 /*----------INTERRUPT HANDLER------*/
160 static void v_APCI1500_Interrupt(int irq, void *d);
161 static int i_APCI1500_ConfigureInterrupt(struct comedi_device *dev,
162  struct comedi_subdevice *s,
163  struct comedi_insn *insn, unsigned int *data);
164 /*----------RESET---------------*/
165 static int i_APCI1500_Reset(struct comedi_device *dev);
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